Commit | Line | Data |
---|---|---|
ec6bced6 | 1 | /* |
ffe4f0f1 | 2 | * CPU frequency scaling for OMAP using OPP information |
ec6bced6 TL |
3 | * |
4 | * Copyright (C) 2005 Nokia Corporation | |
5 | * Written by Tony Lindgren <tony@atomide.com> | |
6 | * | |
7 | * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | |
8 | * | |
731e0cc6 SS |
9 | * Copyright (C) 2007-2011 Texas Instruments, Inc. |
10 | * - OMAP3/4 support by Rajendra Nayak, Santosh Shilimkar | |
11 | * | |
ec6bced6 TL |
12 | * This program is free software; you can redistribute it and/or modify |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | #include <linux/types.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/sched.h> | |
19 | #include <linux/cpufreq.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/err.h> | |
f8ce2547 | 23 | #include <linux/clk.h> |
fced80c7 | 24 | #include <linux/io.h> |
731e0cc6 | 25 | #include <linux/opp.h> |
46c12216 | 26 | #include <linux/cpu.h> |
c1b547bc | 27 | #include <linux/module.h> |
53dfe8a8 | 28 | #include <linux/regulator/consumer.h> |
ec6bced6 | 29 | |
731e0cc6 | 30 | #include <asm/smp_plat.h> |
46c12216 | 31 | #include <asm/cpu.h> |
ec6bced6 | 32 | |
731e0cc6 SS |
33 | #include <plat/clock.h> |
34 | #include <plat/omap-pm.h> | |
35 | #include <plat/common.h> | |
c1b547bc | 36 | #include <plat/omap_device.h> |
a7ca9d2b | 37 | |
731e0cc6 | 38 | #include <mach/hardware.h> |
aeec2990 | 39 | |
42daffd2 AM |
40 | /* OPP tolerance in percentage */ |
41 | #define OPP_TOLERANCE 4 | |
42 | ||
46c12216 RK |
43 | #ifdef CONFIG_SMP |
44 | struct lpj_info { | |
45 | unsigned long ref; | |
46 | unsigned int freq; | |
47 | }; | |
48 | ||
49 | static DEFINE_PER_CPU(struct lpj_info, lpj_ref); | |
50 | static struct lpj_info global_lpj_ref; | |
51 | #endif | |
52 | ||
731e0cc6 | 53 | static struct cpufreq_frequency_table *freq_table; |
1c78217f | 54 | static atomic_t freq_table_users = ATOMIC_INIT(0); |
b8488fbe | 55 | static struct clk *mpu_clk; |
08ca3e3b | 56 | static char *mpu_clk_name; |
a820ffa8 | 57 | static struct device *mpu_dev; |
53dfe8a8 | 58 | static struct regulator *mpu_reg; |
b8488fbe | 59 | |
b0a330dc | 60 | static int omap_verify_speed(struct cpufreq_policy *policy) |
ec6bced6 | 61 | { |
bf2a359d | 62 | if (!freq_table) |
ec6bced6 | 63 | return -EINVAL; |
bf2a359d | 64 | return cpufreq_frequency_table_verify(policy, freq_table); |
ec6bced6 TL |
65 | } |
66 | ||
b0a330dc | 67 | static unsigned int omap_getspeed(unsigned int cpu) |
ec6bced6 | 68 | { |
ec6bced6 TL |
69 | unsigned long rate; |
70 | ||
46c12216 | 71 | if (cpu >= NR_CPUS) |
ec6bced6 TL |
72 | return 0; |
73 | ||
ec6bced6 | 74 | rate = clk_get_rate(mpu_clk) / 1000; |
ec6bced6 TL |
75 | return rate; |
76 | } | |
77 | ||
78 | static int omap_target(struct cpufreq_policy *policy, | |
79 | unsigned int target_freq, | |
80 | unsigned int relation) | |
81 | { | |
bf2a359d | 82 | unsigned int i; |
53dfe8a8 | 83 | int r, ret = 0; |
731e0cc6 | 84 | struct cpufreq_freqs freqs; |
53dfe8a8 | 85 | struct opp *opp; |
42daffd2 | 86 | unsigned long freq, volt = 0, volt_old = 0, tol = 0; |
ec6bced6 | 87 | |
bf2a359d NM |
88 | if (!freq_table) { |
89 | dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, | |
90 | policy->cpu); | |
91 | return -EINVAL; | |
92 | } | |
93 | ||
94 | ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, | |
95 | relation, &i); | |
96 | if (ret) { | |
97 | dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", | |
98 | __func__, policy->cpu, target_freq, ret); | |
99 | return ret; | |
100 | } | |
101 | freqs.new = freq_table[i].frequency; | |
102 | if (!freqs.new) { | |
103 | dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, | |
104 | policy->cpu, target_freq); | |
105 | return -EINVAL; | |
106 | } | |
aeec2990 | 107 | |
46c12216 | 108 | freqs.old = omap_getspeed(policy->cpu); |
46c12216 | 109 | freqs.cpu = policy->cpu; |
ec6bced6 | 110 | |
022ac03b | 111 | if (freqs.old == freqs.new && policy->cur == freqs.new) |
aeec2990 KH |
112 | return ret; |
113 | ||
46c12216 RK |
114 | /* notifiers */ |
115 | for_each_cpu(i, policy->cpus) { | |
116 | freqs.cpu = i; | |
117 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
118 | } | |
731e0cc6 | 119 | |
53dfe8a8 KH |
120 | freq = freqs.new * 1000; |
121 | ||
122 | if (mpu_reg) { | |
123 | opp = opp_find_freq_ceil(mpu_dev, &freq); | |
124 | if (IS_ERR(opp)) { | |
125 | dev_err(mpu_dev, "%s: unable to find MPU OPP for %d\n", | |
126 | __func__, freqs.new); | |
127 | return -EINVAL; | |
128 | } | |
129 | volt = opp_get_voltage(opp); | |
42daffd2 | 130 | tol = volt * OPP_TOLERANCE / 100; |
53dfe8a8 KH |
131 | volt_old = regulator_get_voltage(mpu_reg); |
132 | } | |
133 | ||
134 | dev_dbg(mpu_dev, "cpufreq-omap: %u MHz, %ld mV --> %u MHz, %ld mV\n", | |
135 | freqs.old / 1000, volt_old ? volt_old / 1000 : -1, | |
136 | freqs.new / 1000, volt ? volt / 1000 : -1); | |
137 | ||
138 | /* scaling up? scale voltage before frequency */ | |
139 | if (mpu_reg && (freqs.new > freqs.old)) { | |
42daffd2 | 140 | r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); |
53dfe8a8 KH |
141 | if (r < 0) { |
142 | dev_warn(mpu_dev, "%s: unable to scale voltage up.\n", | |
143 | __func__); | |
144 | freqs.new = freqs.old; | |
145 | goto done; | |
146 | } | |
147 | } | |
731e0cc6 | 148 | |
aeec2990 | 149 | ret = clk_set_rate(mpu_clk, freqs.new * 1000); |
46c12216 | 150 | |
53dfe8a8 KH |
151 | /* scaling down? scale voltage after frequency */ |
152 | if (mpu_reg && (freqs.new < freqs.old)) { | |
42daffd2 | 153 | r = regulator_set_voltage(mpu_reg, volt - tol, volt + tol); |
53dfe8a8 KH |
154 | if (r < 0) { |
155 | dev_warn(mpu_dev, "%s: unable to scale voltage down.\n", | |
156 | __func__); | |
157 | ret = clk_set_rate(mpu_clk, freqs.old * 1000); | |
158 | freqs.new = freqs.old; | |
159 | goto done; | |
160 | } | |
161 | } | |
162 | ||
163 | freqs.new = omap_getspeed(policy->cpu); | |
46c12216 RK |
164 | #ifdef CONFIG_SMP |
165 | /* | |
166 | * Note that loops_per_jiffy is not updated on SMP systems in | |
167 | * cpufreq driver. So, update the per-CPU loops_per_jiffy value | |
168 | * on frequency transition. We need to update all dependent CPUs. | |
169 | */ | |
170 | for_each_cpu(i, policy->cpus) { | |
171 | struct lpj_info *lpj = &per_cpu(lpj_ref, i); | |
172 | if (!lpj->freq) { | |
173 | lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; | |
174 | lpj->freq = freqs.old; | |
175 | } | |
176 | ||
177 | per_cpu(cpu_data, i).loops_per_jiffy = | |
178 | cpufreq_scale(lpj->ref, lpj->freq, freqs.new); | |
179 | } | |
731e0cc6 | 180 | |
46c12216 RK |
181 | /* And don't forget to adjust the global one */ |
182 | if (!global_lpj_ref.freq) { | |
183 | global_lpj_ref.ref = loops_per_jiffy; | |
184 | global_lpj_ref.freq = freqs.old; | |
185 | } | |
186 | loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, | |
187 | freqs.new); | |
188 | #endif | |
189 | ||
53dfe8a8 | 190 | done: |
46c12216 RK |
191 | /* notifiers */ |
192 | for_each_cpu(i, policy->cpus) { | |
193 | freqs.cpu = i; | |
194 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
195 | } | |
ec6bced6 TL |
196 | |
197 | return ret; | |
198 | } | |
199 | ||
1c78217f NM |
200 | static inline void freq_table_free(void) |
201 | { | |
202 | if (atomic_dec_and_test(&freq_table_users)) | |
203 | opp_free_cpufreq_table(mpu_dev, &freq_table); | |
204 | } | |
205 | ||
790ab7e9 | 206 | static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) |
ec6bced6 | 207 | { |
aeec2990 | 208 | int result = 0; |
731e0cc6 | 209 | |
08ca3e3b | 210 | mpu_clk = clk_get(NULL, mpu_clk_name); |
ec6bced6 TL |
211 | if (IS_ERR(mpu_clk)) |
212 | return PTR_ERR(mpu_clk); | |
213 | ||
11e04fdd NM |
214 | if (policy->cpu >= NR_CPUS) { |
215 | result = -EINVAL; | |
216 | goto fail_ck; | |
217 | } | |
aeec2990 | 218 | |
46c12216 | 219 | policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); |
1c78217f | 220 | |
1b865214 | 221 | if (!freq_table) |
1c78217f | 222 | result = opp_init_cpufreq_table(mpu_dev, &freq_table); |
bf2a359d NM |
223 | |
224 | if (result) { | |
225 | dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", | |
226 | __func__, policy->cpu, result); | |
11e04fdd | 227 | goto fail_ck; |
aeec2990 KH |
228 | } |
229 | ||
1b865214 RN |
230 | atomic_inc_return(&freq_table_users); |
231 | ||
bf2a359d | 232 | result = cpufreq_frequency_table_cpuinfo(policy, freq_table); |
1c78217f NM |
233 | if (result) |
234 | goto fail_table; | |
235 | ||
236 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | |
bf2a359d | 237 | |
731e0cc6 SS |
238 | policy->min = policy->cpuinfo.min_freq; |
239 | policy->max = policy->cpuinfo.max_freq; | |
46c12216 RK |
240 | policy->cur = omap_getspeed(policy->cpu); |
241 | ||
242 | /* | |
243 | * On OMAP SMP configuartion, both processors share the voltage | |
244 | * and clock. So both CPUs needs to be scaled together and hence | |
245 | * needs software co-ordination. Use cpufreq affected_cpus | |
246 | * interface to handle this scenario. Additional is_smp() check | |
247 | * is to keep SMP_ON_UP build working. | |
248 | */ | |
249 | if (is_smp()) { | |
250 | policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; | |
ed8ce00c | 251 | cpumask_setall(policy->cpus); |
46c12216 | 252 | } |
731e0cc6 | 253 | |
aeec2990 | 254 | /* FIXME: what's the actual transition time? */ |
b029839c | 255 | policy->cpuinfo.transition_latency = 300 * 1000; |
ec6bced6 TL |
256 | |
257 | return 0; | |
11e04fdd | 258 | |
1c78217f NM |
259 | fail_table: |
260 | freq_table_free(); | |
11e04fdd NM |
261 | fail_ck: |
262 | clk_put(mpu_clk); | |
263 | return result; | |
ec6bced6 TL |
264 | } |
265 | ||
b8488fbe HD |
266 | static int omap_cpu_exit(struct cpufreq_policy *policy) |
267 | { | |
1c78217f | 268 | freq_table_free(); |
b8488fbe HD |
269 | clk_put(mpu_clk); |
270 | return 0; | |
271 | } | |
272 | ||
aeec2990 KH |
273 | static struct freq_attr *omap_cpufreq_attr[] = { |
274 | &cpufreq_freq_attr_scaling_available_freqs, | |
275 | NULL, | |
276 | }; | |
277 | ||
ec6bced6 TL |
278 | static struct cpufreq_driver omap_driver = { |
279 | .flags = CPUFREQ_STICKY, | |
280 | .verify = omap_verify_speed, | |
281 | .target = omap_target, | |
282 | .get = omap_getspeed, | |
283 | .init = omap_cpu_init, | |
b8488fbe | 284 | .exit = omap_cpu_exit, |
ec6bced6 | 285 | .name = "omap", |
aeec2990 | 286 | .attr = omap_cpufreq_attr, |
ec6bced6 TL |
287 | }; |
288 | ||
289 | static int __init omap_cpufreq_init(void) | |
290 | { | |
08ca3e3b NM |
291 | if (cpu_is_omap24xx()) |
292 | mpu_clk_name = "virt_prcm_set"; | |
293 | else if (cpu_is_omap34xx()) | |
294 | mpu_clk_name = "dpll1_ck"; | |
295 | else if (cpu_is_omap44xx()) | |
296 | mpu_clk_name = "dpll_mpu_ck"; | |
297 | ||
298 | if (!mpu_clk_name) { | |
299 | pr_err("%s: unsupported Silicon?\n", __func__); | |
300 | return -EINVAL; | |
301 | } | |
a820ffa8 | 302 | |
c1b547bc | 303 | mpu_dev = omap_device_get_by_hwmod_name("mpu"); |
a820ffa8 NM |
304 | if (!mpu_dev) { |
305 | pr_warning("%s: unable to get the mpu device\n", __func__); | |
306 | return -EINVAL; | |
307 | } | |
308 | ||
53dfe8a8 KH |
309 | mpu_reg = regulator_get(mpu_dev, "vcc"); |
310 | if (IS_ERR(mpu_reg)) { | |
311 | pr_warning("%s: unable to get MPU regulator\n", __func__); | |
312 | mpu_reg = NULL; | |
313 | } else { | |
314 | /* | |
315 | * Ensure physical regulator is present. | |
316 | * (e.g. could be dummy regulator.) | |
317 | */ | |
318 | if (regulator_get_voltage(mpu_reg) < 0) { | |
319 | pr_warn("%s: physical regulator not present for MPU\n", | |
320 | __func__); | |
321 | regulator_put(mpu_reg); | |
322 | mpu_reg = NULL; | |
323 | } | |
324 | } | |
325 | ||
ec6bced6 TL |
326 | return cpufreq_register_driver(&omap_driver); |
327 | } | |
328 | ||
731e0cc6 SS |
329 | static void __exit omap_cpufreq_exit(void) |
330 | { | |
331 | cpufreq_unregister_driver(&omap_driver); | |
332 | } | |
aeec2990 | 333 | |
731e0cc6 SS |
334 | MODULE_DESCRIPTION("cpufreq driver for OMAP SoCs"); |
335 | MODULE_LICENSE("GPL"); | |
336 | module_init(omap_cpufreq_init); | |
337 | module_exit(omap_cpufreq_exit); |