Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
b2bd68e1 | 2 | * (c) 2003-2012 Advanced Micro Devices, Inc. |
1da177e4 LT |
3 | * Your use of this code is subject to the terms and conditions of the |
4 | * GNU general public license version 2. See "COPYING" or | |
5 | * http://www.gnu.org/licenses/gpl.html | |
6 | * | |
b2bd68e1 | 7 | * Maintainer: |
29c4bcdd | 8 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
1da177e4 LT |
9 | * |
10 | * Based on the powernow-k7.c module written by Dave Jones. | |
f4432c5c | 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
1da177e4 | 12 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
a2531293 | 13 | * (C) 2004 Pavel Machek <pavel@ucw.cz> |
1da177e4 LT |
14 | * Licensed under the terms of the GNU GPL License version 2. |
15 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
16 | * | |
17 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 18 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 19 | * Originally developed by Paul Devriendt. |
1da177e4 | 20 | * |
b2bd68e1 AH |
21 | * Processor information obtained from Chapter 9 (Power and Thermal |
22 | * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for | |
23 | * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x | |
24 | * Power Management" in BKDGs for newer AMD CPU families. | |
25 | * | |
26 | * Tables for specific CPUs can be inferred from AMD's processor | |
27 | * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf) | |
1da177e4 LT |
28 | */ |
29 | ||
e54173b4 SK |
30 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
31 | ||
1da177e4 LT |
32 | #include <linux/kernel.h> |
33 | #include <linux/smp.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/cpufreq.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/string.h> | |
065b807c | 39 | #include <linux/cpumask.h> |
0e64a0c9 DJ |
40 | #include <linux/io.h> |
41 | #include <linux/delay.h> | |
1da177e4 LT |
42 | |
43 | #include <asm/msr.h> | |
fa8031ae | 44 | #include <asm/cpu_device_id.h> |
1da177e4 | 45 | |
1da177e4 | 46 | #include <linux/acpi.h> |
14cc3e2b | 47 | #include <linux/mutex.h> |
1da177e4 | 48 | #include <acpi/processor.h> |
1da177e4 | 49 | |
c5829cd0 | 50 | #define VERSION "version 2.20.00" |
1da177e4 LT |
51 | #include "powernow-k8.h" |
52 | ||
53 | /* serialize freq changes */ | |
14cc3e2b | 54 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 55 | |
2c6b8c03 | 56 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 57 | |
a2fed573 ML |
58 | static struct cpufreq_driver cpufreq_amd64_driver; |
59 | ||
1da177e4 LT |
60 | /* Return a frequency in MHz, given an input fid */ |
61 | static u32 find_freq_from_fid(u32 fid) | |
62 | { | |
63 | return 800 + (fid * 100); | |
64 | } | |
65 | ||
66 | /* Return a frequency in KHz, given an input fid */ | |
67 | static u32 find_khz_freq_from_fid(u32 fid) | |
68 | { | |
69 | return 1000 * find_freq_from_fid(fid); | |
70 | } | |
71 | ||
1da177e4 LT |
72 | /* Return the vco fid for an input fid |
73 | * | |
74 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
75 | * only from corresponding high fids. This returns "high" fid corresponding to | |
76 | * "low" one. | |
77 | */ | |
78 | static u32 convert_fid_to_vco_fid(u32 fid) | |
79 | { | |
32ee8c3e | 80 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 81 | return 8 + (2 * fid); |
32ee8c3e | 82 | else |
1da177e4 | 83 | return fid; |
1da177e4 LT |
84 | } |
85 | ||
86 | /* | |
87 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
88 | * to transition to a new state, seeing this bit set is really bad news. | |
89 | */ | |
90 | static int pending_bit_stuck(void) | |
91 | { | |
92 | u32 lo, hi; | |
93 | ||
94 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
95 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
96 | } | |
97 | ||
98 | /* | |
99 | * Update the global current fid / vid values from the status msr. | |
100 | * Returns 1 on error. | |
101 | */ | |
102 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
103 | { | |
104 | u32 lo, hi; | |
105 | u32 i = 0; | |
106 | ||
7153d961 | 107 | do { |
0213df74 | 108 | if (i++ > 10000) { |
2d06d8c4 | 109 | pr_debug("detected change pending stuck\n"); |
1da177e4 LT |
110 | return 1; |
111 | } | |
112 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 113 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
114 | |
115 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
116 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
117 | ||
118 | return 0; | |
119 | } | |
120 | ||
121 | /* the isochronous relief time */ | |
122 | static void count_off_irt(struct powernow_k8_data *data) | |
123 | { | |
124 | udelay((1 << data->irt) * 10); | |
125 | return; | |
126 | } | |
127 | ||
27b46d76 | 128 | /* the voltage stabilization time */ |
1da177e4 LT |
129 | static void count_off_vst(struct powernow_k8_data *data) |
130 | { | |
131 | udelay(data->vstable * VST_UNITS_20US); | |
132 | return; | |
133 | } | |
134 | ||
135 | /* need to init the control msr to a safe value (for each cpu) */ | |
136 | static void fidvid_msr_init(void) | |
137 | { | |
138 | u32 lo, hi; | |
139 | u8 fid, vid; | |
140 | ||
141 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
142 | vid = hi & MSR_S_HI_CURRENT_VID; | |
143 | fid = lo & MSR_S_LO_CURRENT_FID; | |
144 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
145 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
2d06d8c4 | 146 | pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); |
1da177e4 LT |
147 | wrmsr(MSR_FIDVID_CTL, lo, hi); |
148 | } | |
149 | ||
1da177e4 LT |
150 | /* write the new fid value along with the other control fields to the msr */ |
151 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
152 | { | |
153 | u32 lo; | |
154 | u32 savevid = data->currvid; | |
0213df74 | 155 | u32 i = 0; |
1da177e4 LT |
156 | |
157 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
e54173b4 | 158 | pr_err("internal error - overflow on fid write\n"); |
1da177e4 LT |
159 | return 1; |
160 | } | |
161 | ||
0e64a0c9 DJ |
162 | lo = fid; |
163 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); | |
164 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 165 | |
2d06d8c4 | 166 | pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
167 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); |
168 | ||
0213df74 DJ |
169 | do { |
170 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
171 | if (i++ > 100) { | |
e54173b4 | 172 | pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n"); |
63172cb3 | 173 | return 1; |
32ee8c3e | 174 | } |
0213df74 | 175 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
176 | |
177 | count_off_irt(data); | |
178 | ||
179 | if (savevid != data->currvid) { | |
e54173b4 SK |
180 | pr_err("vid change on fid trans, old 0x%x, new 0x%x\n", |
181 | savevid, data->currvid); | |
1da177e4 LT |
182 | return 1; |
183 | } | |
184 | ||
185 | if (fid != data->currfid) { | |
e54173b4 | 186 | pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid, |
0e64a0c9 | 187 | data->currfid); |
1da177e4 LT |
188 | return 1; |
189 | } | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | /* Write a new vid to the hardware */ | |
195 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
196 | { | |
197 | u32 lo; | |
198 | u32 savefid = data->currfid; | |
0213df74 | 199 | int i = 0; |
1da177e4 LT |
200 | |
201 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
e54173b4 | 202 | pr_err("internal error - overflow on vid write\n"); |
1da177e4 LT |
203 | return 1; |
204 | } | |
205 | ||
0e64a0c9 DJ |
206 | lo = data->currfid; |
207 | lo |= (vid << MSR_C_LO_VID_SHIFT); | |
208 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 209 | |
2d06d8c4 | 210 | pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
211 | vid, lo, STOP_GRANT_5NS); |
212 | ||
0213df74 DJ |
213 | do { |
214 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 | 215 | if (i++ > 100) { |
e54173b4 | 216 | pr_err("internal error - pending bit very stuck - no further pstate changes possible\n"); |
6df89006 DJ |
217 | return 1; |
218 | } | |
0213df74 | 219 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
220 | |
221 | if (savefid != data->currfid) { | |
e54173b4 SK |
222 | pr_err("fid changed on vid trans, old 0x%x new 0x%x\n", |
223 | savefid, data->currfid); | |
1da177e4 LT |
224 | return 1; |
225 | } | |
226 | ||
227 | if (vid != data->currvid) { | |
e54173b4 | 228 | pr_err("vid trans failed, vid 0x%x, curr 0x%x\n", |
0e64a0c9 | 229 | vid, data->currvid); |
1da177e4 LT |
230 | return 1; |
231 | } | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | /* | |
237 | * Reduce the vid by the max of step or reqvid. | |
238 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 239 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 | 240 | */ |
0e64a0c9 DJ |
241 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
242 | u32 reqvid, u32 step) | |
1da177e4 LT |
243 | { |
244 | if ((data->currvid - reqvid) > step) | |
245 | reqvid = data->currvid - step; | |
246 | ||
247 | if (write_new_vid(data, reqvid)) | |
248 | return 1; | |
249 | ||
250 | count_off_vst(data); | |
251 | ||
252 | return 0; | |
253 | } | |
254 | ||
1f729e06 | 255 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ |
0e64a0c9 DJ |
256 | static int transition_fid_vid(struct powernow_k8_data *data, |
257 | u32 reqfid, u32 reqvid) | |
1da177e4 | 258 | { |
a2e1b4c3 | 259 | if (core_voltage_pre_transition(data, reqvid, reqfid)) |
1da177e4 LT |
260 | return 1; |
261 | ||
262 | if (core_frequency_transition(data, reqfid)) | |
263 | return 1; | |
264 | ||
265 | if (core_voltage_post_transition(data, reqvid)) | |
266 | return 1; | |
267 | ||
268 | if (query_current_values_with_pending_wait(data)) | |
269 | return 1; | |
270 | ||
271 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
e54173b4 | 272 | pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", |
1da177e4 LT |
273 | smp_processor_id(), |
274 | reqfid, reqvid, data->currfid, data->currvid); | |
275 | return 1; | |
276 | } | |
277 | ||
2d06d8c4 | 278 | pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
279 | smp_processor_id(), data->currfid, data->currvid); |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
284 | /* Phase 1 - core voltage transition ... setup voltage */ | |
0e64a0c9 | 285 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
a2e1b4c3 | 286 | u32 reqvid, u32 reqfid) |
1da177e4 LT |
287 | { |
288 | u32 rvosteps = data->rvo; | |
289 | u32 savefid = data->currfid; | |
a2e1b4c3 | 290 | u32 maxvid, lo, rvomult = 1; |
1da177e4 | 291 | |
e54173b4 | 292 | pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", |
1da177e4 LT |
293 | smp_processor_id(), |
294 | data->currfid, data->currvid, reqvid, data->rvo); | |
295 | ||
a2e1b4c3 ML |
296 | if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) |
297 | rvomult = 2; | |
298 | rvosteps *= rvomult; | |
065b807c DJ |
299 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
300 | maxvid = 0x1f & (maxvid >> 16); | |
2d06d8c4 | 301 | pr_debug("ph1 maxvid=0x%x\n", maxvid); |
065b807c DJ |
302 | if (reqvid < maxvid) /* lower numbers are higher voltages */ |
303 | reqvid = maxvid; | |
304 | ||
1da177e4 | 305 | while (data->currvid > reqvid) { |
2d06d8c4 | 306 | pr_debug("ph1: curr 0x%x, req vid 0x%x\n", |
1da177e4 LT |
307 | data->currvid, reqvid); |
308 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
309 | return 1; | |
310 | } | |
311 | ||
a2e1b4c3 ML |
312 | while ((rvosteps > 0) && |
313 | ((rvomult * data->rvo + data->currvid) > reqvid)) { | |
065b807c | 314 | if (data->currvid == maxvid) { |
1da177e4 LT |
315 | rvosteps = 0; |
316 | } else { | |
2d06d8c4 | 317 | pr_debug("ph1: changing vid for rvo, req 0x%x\n", |
1da177e4 | 318 | data->currvid - 1); |
0e64a0c9 | 319 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
1da177e4 LT |
320 | return 1; |
321 | rvosteps--; | |
322 | } | |
323 | } | |
324 | ||
325 | if (query_current_values_with_pending_wait(data)) | |
326 | return 1; | |
327 | ||
328 | if (savefid != data->currfid) { | |
e54173b4 | 329 | pr_err("ph1 err, currfid changed 0x%x\n", data->currfid); |
1da177e4 LT |
330 | return 1; |
331 | } | |
332 | ||
2d06d8c4 | 333 | pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
334 | data->currfid, data->currvid); |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
339 | /* Phase 2 - core frequency transition */ | |
340 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
341 | { | |
0e64a0c9 DJ |
342 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
343 | u32 fid_interval, savevid = data->currvid; | |
1da177e4 | 344 | |
1da177e4 | 345 | if (data->currfid == reqfid) { |
e54173b4 | 346 | pr_err("ph2 null fid transition 0x%x\n", data->currfid); |
1da177e4 LT |
347 | return 0; |
348 | } | |
349 | ||
e54173b4 | 350 | pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", |
1da177e4 LT |
351 | smp_processor_id(), |
352 | data->currfid, data->currvid, reqfid); | |
353 | ||
354 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
355 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
356 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
357 | : vcoreqfid - vcocurrfid; | |
358 | ||
a2e1b4c3 ML |
359 | if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) |
360 | vcofiddiff = 0; | |
361 | ||
1da177e4 | 362 | while (vcofiddiff > 2) { |
019a61b9 LM |
363 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
364 | ||
1da177e4 LT |
365 | if (reqfid > data->currfid) { |
366 | if (data->currfid > LO_FID_TABLE_TOP) { | |
0e64a0c9 DJ |
367 | if (write_new_fid(data, |
368 | data->currfid + fid_interval)) | |
1da177e4 | 369 | return 1; |
1da177e4 LT |
370 | } else { |
371 | if (write_new_fid | |
0e64a0c9 DJ |
372 | (data, |
373 | 2 + convert_fid_to_vco_fid(data->currfid))) | |
1da177e4 | 374 | return 1; |
1da177e4 LT |
375 | } |
376 | } else { | |
019a61b9 | 377 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
378 | return 1; |
379 | } | |
380 | ||
381 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
382 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
383 | : vcoreqfid - vcocurrfid; | |
384 | } | |
385 | ||
386 | if (write_new_fid(data, reqfid)) | |
387 | return 1; | |
388 | ||
389 | if (query_current_values_with_pending_wait(data)) | |
390 | return 1; | |
391 | ||
392 | if (data->currfid != reqfid) { | |
e54173b4 | 393 | pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", |
1da177e4 LT |
394 | data->currfid, reqfid); |
395 | return 1; | |
396 | } | |
397 | ||
398 | if (savevid != data->currvid) { | |
e54173b4 | 399 | pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n", |
1da177e4 LT |
400 | savevid, data->currvid); |
401 | return 1; | |
402 | } | |
403 | ||
2d06d8c4 | 404 | pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
405 | data->currfid, data->currvid); |
406 | ||
407 | return 0; | |
408 | } | |
409 | ||
410 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
0e64a0c9 DJ |
411 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
412 | u32 reqvid) | |
1da177e4 LT |
413 | { |
414 | u32 savefid = data->currfid; | |
415 | u32 savereqvid = reqvid; | |
416 | ||
2d06d8c4 | 417 | pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
418 | smp_processor_id(), |
419 | data->currfid, data->currvid); | |
420 | ||
421 | if (reqvid != data->currvid) { | |
422 | if (write_new_vid(data, reqvid)) | |
423 | return 1; | |
424 | ||
425 | if (savefid != data->currfid) { | |
e54173b4 SK |
426 | pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n", |
427 | savefid, data->currfid); | |
1da177e4 LT |
428 | return 1; |
429 | } | |
430 | ||
431 | if (data->currvid != reqvid) { | |
e54173b4 SK |
432 | pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x", |
433 | reqvid, data->currvid); | |
1da177e4 LT |
434 | return 1; |
435 | } | |
436 | } | |
437 | ||
438 | if (query_current_values_with_pending_wait(data)) | |
439 | return 1; | |
440 | ||
441 | if (savereqvid != data->currvid) { | |
2d06d8c4 | 442 | pr_debug("ph3 failed, currvid 0x%x\n", data->currvid); |
1da177e4 LT |
443 | return 1; |
444 | } | |
445 | ||
446 | if (savefid != data->currfid) { | |
2d06d8c4 | 447 | pr_debug("ph3 failed, currfid changed 0x%x\n", |
1da177e4 LT |
448 | data->currfid); |
449 | return 1; | |
450 | } | |
451 | ||
2d06d8c4 | 452 | pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
453 | data->currfid, data->currvid); |
454 | ||
455 | return 0; | |
456 | } | |
457 | ||
fa8031ae AK |
458 | static const struct x86_cpu_id powernow_k8_ids[] = { |
459 | /* IO based frequency switching */ | |
460 | { X86_VENDOR_AMD, 0xf }, | |
fa8031ae AK |
461 | {} |
462 | }; | |
463 | MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids); | |
464 | ||
1ff6e97f | 465 | static void check_supported_cpu(void *_rc) |
1da177e4 | 466 | { |
1da177e4 | 467 | u32 eax, ebx, ecx, edx; |
1ff6e97f | 468 | int *rc = _rc; |
1da177e4 | 469 | |
1ff6e97f | 470 | *rc = -ENODEV; |
1da177e4 | 471 | |
1da177e4 | 472 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
2c906ae6 | 473 | |
1f729e06 DJ |
474 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
475 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 476 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
e54173b4 | 477 | pr_info("Processor cpuid %x not supported\n", eax); |
1ff6e97f | 478 | return; |
1f729e06 | 479 | } |
1da177e4 | 480 | |
1f729e06 DJ |
481 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
482 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
e54173b4 | 483 | pr_info("No frequency change capabilities detected\n"); |
1ff6e97f | 484 | return; |
1f729e06 | 485 | } |
1da177e4 | 486 | |
1f729e06 | 487 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
0e64a0c9 DJ |
488 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
489 | != P_STATE_TRANSITION_CAPABLE) { | |
e54173b4 | 490 | pr_info("Power state transitions not supported\n"); |
1ff6e97f | 491 | return; |
1f729e06 | 492 | } |
e1f0b8e9 | 493 | *rc = 0; |
1da177e4 | 494 | } |
1da177e4 LT |
495 | } |
496 | ||
0e64a0c9 DJ |
497 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
498 | u8 maxvid) | |
1da177e4 LT |
499 | { |
500 | unsigned int j; | |
501 | u8 lastfid = 0xff; | |
502 | ||
503 | for (j = 0; j < data->numps; j++) { | |
504 | if (pst[j].vid > LEAST_VID) { | |
e54173b4 SK |
505 | pr_err(FW_BUG "vid %d invalid : 0x%x\n", j, |
506 | pst[j].vid); | |
1da177e4 LT |
507 | return -EINVAL; |
508 | } | |
0e64a0c9 DJ |
509 | if (pst[j].vid < data->rvo) { |
510 | /* vid + rvo >= 0 */ | |
e54173b4 | 511 | pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j); |
1da177e4 LT |
512 | return -ENODEV; |
513 | } | |
0e64a0c9 DJ |
514 | if (pst[j].vid < maxvid + data->rvo) { |
515 | /* vid + rvo >= maxvid */ | |
e54173b4 | 516 | pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j); |
1da177e4 LT |
517 | return -ENODEV; |
518 | } | |
8aae8284 | 519 | if (pst[j].fid > MAX_FID) { |
e54173b4 | 520 | pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j); |
8aae8284 JS |
521 | return -ENODEV; |
522 | } | |
8aae8284 | 523 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 524 | /* Only first fid is allowed to be in "low" range */ |
e54173b4 SK |
525 | pr_err(FW_BUG "two low fids - %d : 0x%x\n", j, |
526 | pst[j].fid); | |
1da177e4 LT |
527 | return -EINVAL; |
528 | } | |
529 | if (pst[j].fid < lastfid) | |
530 | lastfid = pst[j].fid; | |
531 | } | |
532 | if (lastfid & 1) { | |
e54173b4 | 533 | pr_err(FW_BUG "lastfid invalid\n"); |
1da177e4 LT |
534 | return -EINVAL; |
535 | } | |
536 | if (lastfid > LO_FID_TABLE_TOP) | |
e54173b4 | 537 | pr_info(FW_BUG "first fid not from lo freq table\n"); |
1da177e4 LT |
538 | |
539 | return 0; | |
540 | } | |
541 | ||
f0adb134 KR |
542 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
543 | unsigned int entry) | |
0e64a0c9 | 544 | { |
f0adb134 | 545 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
0e64a0c9 DJ |
546 | } |
547 | ||
1da177e4 LT |
548 | static void print_basics(struct powernow_k8_data *data) |
549 | { | |
550 | int j; | |
551 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 DJ |
552 | if (data->powernow_table[j].frequency != |
553 | CPUFREQ_ENTRY_INVALID) { | |
e54173b4 SK |
554 | pr_info("fid 0x%x (%d MHz), vid 0x%x\n", |
555 | data->powernow_table[j].driver_data & 0xff, | |
556 | data->powernow_table[j].frequency/1000, | |
557 | data->powernow_table[j].driver_data >> 8); | |
1f729e06 | 558 | } |
1da177e4 LT |
559 | } |
560 | if (data->batps) | |
e54173b4 | 561 | pr_info("Only %d pstates on battery\n", data->batps); |
1da177e4 LT |
562 | } |
563 | ||
0e64a0c9 DJ |
564 | static int fill_powernow_table(struct powernow_k8_data *data, |
565 | struct pst_s *pst, u8 maxvid) | |
1da177e4 LT |
566 | { |
567 | struct cpufreq_frequency_table *powernow_table; | |
568 | unsigned int j; | |
569 | ||
0e64a0c9 DJ |
570 | if (data->batps) { |
571 | /* use ACPI support to get full speed on mains power */ | |
e54173b4 SK |
572 | pr_warn("Only %d pstates usable (use ACPI driver for full range\n", |
573 | data->batps); | |
1da177e4 LT |
574 | data->numps = data->batps; |
575 | } | |
576 | ||
0e64a0c9 | 577 | for (j = 1; j < data->numps; j++) { |
1da177e4 | 578 | if (pst[j-1].fid >= pst[j].fid) { |
e54173b4 | 579 | pr_err("PST out of sequence\n"); |
1da177e4 LT |
580 | return -EINVAL; |
581 | } | |
582 | } | |
583 | ||
584 | if (data->numps < 2) { | |
e54173b4 | 585 | pr_err("no p states to transition\n"); |
1da177e4 LT |
586 | return -ENODEV; |
587 | } | |
588 | ||
589 | if (check_pst_table(data, pst, maxvid)) | |
590 | return -EINVAL; | |
591 | ||
71508a1f | 592 | powernow_table = kzalloc((sizeof(*powernow_table) |
1da177e4 LT |
593 | * (data->numps + 1)), GFP_KERNEL); |
594 | if (!powernow_table) { | |
e54173b4 | 595 | pr_err("powernow_table memory alloc failure\n"); |
1da177e4 LT |
596 | return -ENOMEM; |
597 | } | |
598 | ||
599 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 | 600 | int freq; |
50701588 VK |
601 | powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */ |
602 | powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */ | |
0e64a0c9 DJ |
603 | freq = find_khz_freq_from_fid(pst[j].fid); |
604 | powernow_table[j].frequency = freq; | |
1da177e4 LT |
605 | } |
606 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
50701588 | 607 | powernow_table[data->numps].driver_data = 0; |
1da177e4 LT |
608 | |
609 | if (query_current_values_with_pending_wait(data)) { | |
610 | kfree(powernow_table); | |
611 | return -EIO; | |
612 | } | |
613 | ||
2d06d8c4 | 614 | pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); |
1da177e4 | 615 | data->powernow_table = powernow_table; |
38c52e63 | 616 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
2e497620 | 617 | print_basics(data); |
1da177e4 LT |
618 | |
619 | for (j = 0; j < data->numps; j++) | |
0e64a0c9 DJ |
620 | if ((pst[j].fid == data->currfid) && |
621 | (pst[j].vid == data->currvid)) | |
1da177e4 LT |
622 | return 0; |
623 | ||
2d06d8c4 | 624 | pr_debug("currfid/vid do not match PST, ignoring\n"); |
1da177e4 LT |
625 | return 0; |
626 | } | |
627 | ||
628 | /* Find and validate the PSB/PST table in BIOS. */ | |
629 | static int find_psb_table(struct powernow_k8_data *data) | |
630 | { | |
631 | struct psb_s *psb; | |
632 | unsigned int i; | |
633 | u32 mvs; | |
634 | u8 maxvid; | |
635 | u32 cpst = 0; | |
636 | u32 thiscpuid; | |
637 | ||
638 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
639 | /* Scan BIOS looking for the signature. */ | |
640 | /* It can not be at ffff0 - it is too big. */ | |
641 | ||
642 | psb = phys_to_virt(i); | |
643 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
644 | continue; | |
645 | ||
2d06d8c4 | 646 | pr_debug("found PSB header at 0x%p\n", psb); |
1da177e4 | 647 | |
2d06d8c4 | 648 | pr_debug("table vers: 0x%x\n", psb->tableversion); |
1da177e4 | 649 | if (psb->tableversion != PSB_VERSION_1_4) { |
e54173b4 | 650 | pr_err(FW_BUG "PSB table is not v1.4\n"); |
1da177e4 LT |
651 | return -ENODEV; |
652 | } | |
653 | ||
2d06d8c4 | 654 | pr_debug("flags: 0x%x\n", psb->flags1); |
1da177e4 | 655 | if (psb->flags1) { |
e54173b4 | 656 | pr_err(FW_BUG "unknown flags\n"); |
1da177e4 LT |
657 | return -ENODEV; |
658 | } | |
659 | ||
660 | data->vstable = psb->vstable; | |
2d06d8c4 | 661 | pr_debug("voltage stabilization time: %d(*20us)\n", |
0e64a0c9 | 662 | data->vstable); |
1da177e4 | 663 | |
2d06d8c4 | 664 | pr_debug("flags2: 0x%x\n", psb->flags2); |
1da177e4 LT |
665 | data->rvo = psb->flags2 & 3; |
666 | data->irt = ((psb->flags2) >> 2) & 3; | |
667 | mvs = ((psb->flags2) >> 4) & 3; | |
668 | data->vidmvs = 1 << mvs; | |
669 | data->batps = ((psb->flags2) >> 6) & 3; | |
670 | ||
2d06d8c4 DB |
671 | pr_debug("ramp voltage offset: %d\n", data->rvo); |
672 | pr_debug("isochronous relief time: %d\n", data->irt); | |
673 | pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
1da177e4 | 674 | |
2d06d8c4 | 675 | pr_debug("numpst: 0x%x\n", psb->num_tables); |
1da177e4 | 676 | cpst = psb->num_tables; |
0e64a0c9 DJ |
677 | if ((psb->cpuid == 0x00000fc0) || |
678 | (psb->cpuid == 0x00000fe0)) { | |
1da177e4 | 679 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
0e64a0c9 DJ |
680 | if ((thiscpuid == 0x00000fc0) || |
681 | (thiscpuid == 0x00000fe0)) | |
1da177e4 | 682 | cpst = 1; |
1da177e4 LT |
683 | } |
684 | if (cpst != 1) { | |
e54173b4 | 685 | pr_err(FW_BUG "numpst must be 1\n"); |
1da177e4 LT |
686 | return -ENODEV; |
687 | } | |
688 | ||
689 | data->plllock = psb->plllocktime; | |
2d06d8c4 DB |
690 | pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); |
691 | pr_debug("maxfid: 0x%x\n", psb->maxfid); | |
692 | pr_debug("maxvid: 0x%x\n", psb->maxvid); | |
1da177e4 LT |
693 | maxvid = psb->maxvid; |
694 | ||
695 | data->numps = psb->numps; | |
2d06d8c4 | 696 | pr_debug("numpstates: 0x%x\n", data->numps); |
0e64a0c9 DJ |
697 | return fill_powernow_table(data, |
698 | (struct pst_s *)(psb+1), maxvid); | |
1da177e4 LT |
699 | } |
700 | /* | |
701 | * If you see this message, complain to BIOS manufacturer. If | |
702 | * he tells you "we do not support Linux" or some similar | |
703 | * nonsense, remember that Windows 2000 uses the same legacy | |
704 | * mechanism that the old Linux PSB driver uses. Tell them it | |
705 | * is broken with Windows 2000. | |
706 | * | |
707 | * The reference to the AMD documentation is chapter 9 in the | |
708 | * BIOS and Kernel Developer's Guide, which is available on | |
709 | * www.amd.com | |
710 | */ | |
e54173b4 SK |
711 | pr_err(FW_BUG "No PSB or ACPI _PSS objects\n"); |
712 | pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n"); | |
1da177e4 LT |
713 | return -ENODEV; |
714 | } | |
715 | ||
0e64a0c9 DJ |
716 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
717 | unsigned int index) | |
1da177e4 | 718 | { |
439913ff | 719 | u64 control; |
0e64a0c9 | 720 | |
e1f0b8e9 | 721 | if (!data->acpi_data.state_count) |
1da177e4 LT |
722 | return; |
723 | ||
21335d02 LH |
724 | control = data->acpi_data.states[index].control; |
725 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; | |
726 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; | |
727 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
728 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; | |
729 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); | |
730 | data->vstable = (control >> VST_SHIFT) & VST_MASK; | |
731 | } | |
1da177e4 LT |
732 | |
733 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
734 | { | |
1da177e4 | 735 | struct cpufreq_frequency_table *powernow_table; |
2fdf66b4 | 736 | int ret_val = -ENODEV; |
439913ff | 737 | u64 control, status; |
1da177e4 | 738 | |
f607e3a0 | 739 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
2d06d8c4 | 740 | pr_debug("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
741 | return -EIO; |
742 | } | |
743 | ||
744 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 745 | if (data->acpi_data.state_count <= 1) { |
2d06d8c4 | 746 | pr_debug("No ACPI P-States\n"); |
1da177e4 LT |
747 | goto err_out; |
748 | } | |
749 | ||
2c701b10 DJ |
750 | control = data->acpi_data.control_register.space_id; |
751 | status = data->acpi_data.status_register.space_id; | |
752 | ||
753 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
754 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
2d06d8c4 | 755 | pr_debug("Invalid control/status registers (%llx - %llx)\n", |
2c701b10 | 756 | control, status); |
1da177e4 LT |
757 | goto err_out; |
758 | } | |
759 | ||
760 | /* fill in data->powernow_table */ | |
71508a1f | 761 | powernow_table = kzalloc((sizeof(*powernow_table) |
f607e3a0 | 762 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
1da177e4 | 763 | if (!powernow_table) { |
2d06d8c4 | 764 | pr_debug("powernow_table memory alloc failure\n"); |
1da177e4 LT |
765 | goto err_out; |
766 | } | |
767 | ||
db39d552 ML |
768 | /* fill in data */ |
769 | data->numps = data->acpi_data.state_count; | |
770 | powernow_k8_acpi_pst_values(data, 0); | |
771 | ||
e1f0b8e9 | 772 | ret_val = fill_powernow_table_fidvid(data, powernow_table); |
1f729e06 DJ |
773 | if (ret_val) |
774 | goto err_out_mem; | |
775 | ||
0e64a0c9 DJ |
776 | powernow_table[data->acpi_data.state_count].frequency = |
777 | CPUFREQ_TABLE_END; | |
1f729e06 DJ |
778 | data->powernow_table = powernow_table; |
779 | ||
38c52e63 | 780 | if (cpumask_first(topology_core_cpumask(data->cpu)) == data->cpu) |
2e497620 | 781 | print_basics(data); |
1f729e06 DJ |
782 | |
783 | /* notify BIOS that we exist */ | |
784 | acpi_processor_notify_smm(THIS_MODULE); | |
785 | ||
eaa95840 | 786 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
e54173b4 | 787 | pr_err("unable to alloc powernow_k8_data cpumask\n"); |
2fdf66b4 RR |
788 | ret_val = -ENOMEM; |
789 | goto err_out_mem; | |
790 | } | |
791 | ||
1f729e06 DJ |
792 | return 0; |
793 | ||
794 | err_out_mem: | |
795 | kfree(powernow_table); | |
796 | ||
797 | err_out: | |
b2f8dc4c | 798 | acpi_processor_unregister_performance(data->cpu); |
1f729e06 | 799 | |
0e64a0c9 DJ |
800 | /* data->acpi_data.state_count informs us at ->exit() |
801 | * whether ACPI was used */ | |
f607e3a0 | 802 | data->acpi_data.state_count = 0; |
1f729e06 | 803 | |
2fdf66b4 | 804 | return ret_val; |
1f729e06 DJ |
805 | } |
806 | ||
0e64a0c9 DJ |
807 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
808 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
809 | { |
810 | int i; | |
0e64a0c9 | 811 | |
f607e3a0 | 812 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
813 | u32 fid; |
814 | u32 vid; | |
0e64a0c9 | 815 | u32 freq, index; |
439913ff | 816 | u64 status, control; |
094ce7fd DJ |
817 | |
818 | if (data->exttype) { | |
0e64a0c9 DJ |
819 | status = data->acpi_data.states[i].status; |
820 | fid = status & EXT_FID_MASK; | |
821 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 822 | } else { |
0e64a0c9 DJ |
823 | control = data->acpi_data.states[i].control; |
824 | fid = control & FID_MASK; | |
825 | vid = (control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 826 | } |
1da177e4 | 827 | |
2d06d8c4 | 828 | pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); |
1da177e4 | 829 | |
0e64a0c9 | 830 | index = fid | (vid<<8); |
50701588 | 831 | powernow_table[i].driver_data = index; |
0e64a0c9 DJ |
832 | |
833 | freq = find_khz_freq_from_fid(fid); | |
834 | powernow_table[i].frequency = freq; | |
1da177e4 LT |
835 | |
836 | /* verify frequency is OK */ | |
0e64a0c9 | 837 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
2d06d8c4 | 838 | pr_debug("invalid freq %u kHz, ignoring\n", freq); |
f0adb134 | 839 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
840 | continue; |
841 | } | |
842 | ||
0e64a0c9 DJ |
843 | /* verify voltage is OK - |
844 | * BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 845 | if (vid == VID_OFF) { |
2d06d8c4 | 846 | pr_debug("invalid vid %u, ignoring\n", vid); |
f0adb134 | 847 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
848 | continue; |
849 | } | |
850 | ||
0e64a0c9 | 851 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
e54173b4 SK |
852 | pr_info("invalid freq entries %u kHz vs. %u kHz\n", |
853 | freq, (unsigned int) | |
0e64a0c9 DJ |
854 | (data->acpi_data.states[i].core_frequency |
855 | * 1000)); | |
f0adb134 | 856 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
857 | continue; |
858 | } | |
859 | } | |
1da177e4 | 860 | return 0; |
1da177e4 LT |
861 | } |
862 | ||
863 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
864 | { | |
f607e3a0 | 865 | if (data->acpi_data.state_count) |
b2f8dc4c | 866 | acpi_processor_unregister_performance(data->cpu); |
2fdf66b4 | 867 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
1da177e4 LT |
868 | } |
869 | ||
732553e5 ML |
870 | static int get_transition_latency(struct powernow_k8_data *data) |
871 | { | |
872 | int max_latency = 0; | |
873 | int i; | |
874 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
875 | int cur_latency = data->acpi_data.states[i].transition_latency | |
876 | + data->acpi_data.states[i].bus_master_latency; | |
877 | if (cur_latency > max_latency) | |
878 | max_latency = cur_latency; | |
879 | } | |
86e13684 | 880 | if (max_latency == 0) { |
e54173b4 | 881 | pr_err(FW_WARN "Invalid zero transition latency\n"); |
86e13684 TR |
882 | max_latency = 1; |
883 | } | |
732553e5 ML |
884 | /* value in usecs, needs to be in nanoseconds */ |
885 | return 1000 * max_latency; | |
886 | } | |
887 | ||
1da177e4 | 888 | /* Take a frequency, and issue the fid/vid transition command */ |
0e64a0c9 DJ |
889 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
890 | unsigned int index) | |
1da177e4 | 891 | { |
b43a7ffb | 892 | struct cpufreq_policy *policy; |
1f729e06 DJ |
893 | u32 fid = 0; |
894 | u32 vid = 0; | |
b43a7ffb | 895 | int res; |
1da177e4 LT |
896 | struct cpufreq_freqs freqs; |
897 | ||
2d06d8c4 | 898 | pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index); |
1da177e4 | 899 | |
1f729e06 | 900 | /* fid/vid correctness check for k8 */ |
1da177e4 | 901 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
902 | * the cpufreq frequency table in find_psb_table, vid |
903 | * are the upper 8 bits. | |
1da177e4 | 904 | */ |
50701588 VK |
905 | fid = data->powernow_table[index].driver_data & 0xFF; |
906 | vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8; | |
1da177e4 | 907 | |
2d06d8c4 | 908 | pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); |
1da177e4 LT |
909 | |
910 | if (query_current_values_with_pending_wait(data)) | |
911 | return 1; | |
912 | ||
913 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
2d06d8c4 | 914 | pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n", |
1da177e4 LT |
915 | fid, vid); |
916 | return 0; | |
917 | } | |
918 | ||
2d06d8c4 | 919 | pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n", |
1da177e4 | 920 | smp_processor_id(), fid, vid); |
1da177e4 LT |
921 | freqs.old = find_khz_freq_from_fid(data->currfid); |
922 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 923 | |
b43a7ffb VK |
924 | policy = cpufreq_cpu_get(smp_processor_id()); |
925 | cpufreq_cpu_put(policy); | |
926 | ||
8fec051e | 927 | cpufreq_freq_transition_begin(policy, &freqs); |
1da177e4 | 928 | res = transition_fid_vid(data, fid, vid); |
8fec051e | 929 | cpufreq_freq_transition_end(policy, &freqs, res); |
1f729e06 | 930 | |
1f729e06 DJ |
931 | return res; |
932 | } | |
933 | ||
6889125b TH |
934 | struct powernowk8_target_arg { |
935 | struct cpufreq_policy *pol; | |
9c0ebcf7 | 936 | unsigned newstate; |
6889125b TH |
937 | }; |
938 | ||
939 | static long powernowk8_target_fn(void *arg) | |
1da177e4 | 940 | { |
6889125b TH |
941 | struct powernowk8_target_arg *pta = arg; |
942 | struct cpufreq_policy *pol = pta->pol; | |
9c0ebcf7 | 943 | unsigned newstate = pta->newstate; |
2c6b8c03 | 944 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
945 | u32 checkfid; |
946 | u32 checkvid; | |
6889125b | 947 | int ret; |
1da177e4 | 948 | |
4211a303 JS |
949 | if (!data) |
950 | return -EINVAL; | |
951 | ||
9180053c AB |
952 | checkfid = data->currfid; |
953 | checkvid = data->currvid; | |
954 | ||
1da177e4 | 955 | if (pending_bit_stuck()) { |
e54173b4 | 956 | pr_err("failing targ, change pending bit set\n"); |
6889125b | 957 | return -EIO; |
1da177e4 LT |
958 | } |
959 | ||
9c0ebcf7 VK |
960 | pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n", |
961 | pol->cpu, data->powernow_table[newstate].frequency, pol->min, | |
962 | pol->max); | |
1da177e4 | 963 | |
83844510 | 964 | if (query_current_values_with_pending_wait(data)) |
6889125b | 965 | return -EIO; |
1da177e4 | 966 | |
e1f0b8e9 | 967 | pr_debug("targ: curr fid 0x%x, vid 0x%x\n", |
e54173b4 | 968 | data->currfid, data->currvid); |
1da177e4 | 969 | |
e1f0b8e9 MG |
970 | if ((checkvid != data->currvid) || |
971 | (checkfid != data->currfid)) { | |
e54173b4 | 972 | pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", |
e1f0b8e9 MG |
973 | checkfid, data->currfid, |
974 | checkvid, data->currvid); | |
1da177e4 LT |
975 | } |
976 | ||
14cc3e2b | 977 | mutex_lock(&fidvid_mutex); |
065b807c | 978 | |
1da177e4 LT |
979 | powernow_k8_acpi_pst_values(data, newstate); |
980 | ||
e1f0b8e9 MG |
981 | ret = transition_frequency_fidvid(data, newstate); |
982 | ||
1f729e06 | 983 | if (ret) { |
e54173b4 | 984 | pr_err("transition frequency failed\n"); |
14cc3e2b | 985 | mutex_unlock(&fidvid_mutex); |
6889125b | 986 | return 1; |
1da177e4 | 987 | } |
14cc3e2b | 988 | mutex_unlock(&fidvid_mutex); |
065b807c | 989 | |
e1f0b8e9 | 990 | pol->cur = find_khz_freq_from_fid(data->currfid); |
1da177e4 | 991 | |
6889125b TH |
992 | return 0; |
993 | } | |
994 | ||
995 | /* Driver entry point to switch to the target frequency */ | |
9c0ebcf7 | 996 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned index) |
6889125b | 997 | { |
9c0ebcf7 | 998 | struct powernowk8_target_arg pta = { .pol = pol, .newstate = index }; |
6889125b | 999 | |
e4df1cbc | 1000 | return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta); |
1da177e4 LT |
1001 | } |
1002 | ||
1ff6e97f RR |
1003 | struct init_on_cpu { |
1004 | struct powernow_k8_data *data; | |
1005 | int rc; | |
1006 | }; | |
1007 | ||
2760984f | 1008 | static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu) |
1ff6e97f RR |
1009 | { |
1010 | struct init_on_cpu *init_on_cpu = _init_on_cpu; | |
1011 | ||
1012 | if (pending_bit_stuck()) { | |
e54173b4 | 1013 | pr_err("failing init, change pending bit set\n"); |
1ff6e97f RR |
1014 | init_on_cpu->rc = -ENODEV; |
1015 | return; | |
1016 | } | |
1017 | ||
1018 | if (query_current_values_with_pending_wait(init_on_cpu->data)) { | |
1019 | init_on_cpu->rc = -ENODEV; | |
1020 | return; | |
1021 | } | |
1022 | ||
e1f0b8e9 | 1023 | fidvid_msr_init(); |
1ff6e97f RR |
1024 | |
1025 | init_on_cpu->rc = 0; | |
1026 | } | |
1027 | ||
e54173b4 SK |
1028 | #define MISSING_PSS_MSG \ |
1029 | FW_BUG "No compatible ACPI _PSS objects found.\n" \ | |
1030 | FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \ | |
1031 | FW_BUG "If that doesn't help, try upgrading your BIOS.\n" | |
56835e6c | 1032 | |
1da177e4 | 1033 | /* per CPU init entry point to the driver */ |
2760984f | 1034 | static int powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
1035 | { |
1036 | struct powernow_k8_data *data; | |
1ff6e97f | 1037 | struct init_on_cpu init_on_cpu; |
c3274763 | 1038 | int rc, cpu; |
1da177e4 | 1039 | |
1ff6e97f RR |
1040 | smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1); |
1041 | if (rc) | |
1da177e4 LT |
1042 | return -ENODEV; |
1043 | ||
d5b73cd8 | 1044 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
1da177e4 | 1045 | if (!data) { |
e54173b4 | 1046 | pr_err("unable to alloc powernow_k8_data"); |
1da177e4 LT |
1047 | return -ENOMEM; |
1048 | } | |
1da177e4 LT |
1049 | |
1050 | data->cpu = pol->cpu; | |
1051 | ||
a0abd520 | 1052 | if (powernow_k8_cpu_init_acpi(data)) { |
1da177e4 | 1053 | /* |
0d2eb44f | 1054 | * Use the PSB BIOS structure. This is only available on |
1da177e4 LT |
1055 | * an UP version, and is deprecated by AMD. |
1056 | */ | |
9ed059e1 | 1057 | if (num_online_cpus() != 1) { |
e54173b4 | 1058 | pr_err_once(MISSING_PSS_MSG); |
0cb8bc25 | 1059 | goto err_out; |
1da177e4 LT |
1060 | } |
1061 | if (pol->cpu != 0) { | |
e54173b4 | 1062 | pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n"); |
0cb8bc25 | 1063 | goto err_out; |
1da177e4 LT |
1064 | } |
1065 | rc = find_psb_table(data); | |
0cb8bc25 DJ |
1066 | if (rc) |
1067 | goto err_out; | |
1068 | ||
732553e5 ML |
1069 | /* Take a crude guess here. |
1070 | * That guess was in microseconds, so multiply with 1000 */ | |
1071 | pol->cpuinfo.transition_latency = ( | |
1072 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + | |
1073 | ((1 << data->irt) * 30)) * 1000; | |
1074 | } else /* ACPI _PSS objects available */ | |
1075 | pol->cpuinfo.transition_latency = get_transition_latency(data); | |
1da177e4 LT |
1076 | |
1077 | /* only run on specific CPU from here on */ | |
1ff6e97f RR |
1078 | init_on_cpu.data = data; |
1079 | smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu, | |
1080 | &init_on_cpu, 1); | |
1081 | rc = init_on_cpu.rc; | |
1082 | if (rc != 0) | |
1083 | goto err_out_exit_acpi; | |
1da177e4 | 1084 | |
38c52e63 | 1085 | cpumask_copy(pol->cpus, topology_core_cpumask(pol->cpu)); |
835481d9 | 1086 | data->available_cores = pol->cpus; |
1da177e4 | 1087 | |
1da177e4 | 1088 | /* min/max the cpu is capable of */ |
b147405a | 1089 | if (cpufreq_table_validate_and_show(pol, data->powernow_table)) { |
e54173b4 | 1090 | pr_err(FW_BUG "invalid powernow_table\n"); |
1da177e4 LT |
1091 | powernow_k8_cpu_exit_acpi(data); |
1092 | kfree(data->powernow_table); | |
1093 | kfree(data); | |
1094 | return -EINVAL; | |
1095 | } | |
1096 | ||
e1f0b8e9 | 1097 | pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n", |
e54173b4 | 1098 | data->currfid, data->currvid); |
1da177e4 | 1099 | |
c3274763 SB |
1100 | /* Point all the CPUs in this policy to the same data */ |
1101 | for_each_cpu(cpu, pol->cpus) | |
1102 | per_cpu(powernow_data, cpu) = data; | |
1da177e4 LT |
1103 | |
1104 | return 0; | |
1105 | ||
1ff6e97f | 1106 | err_out_exit_acpi: |
1da177e4 LT |
1107 | powernow_k8_cpu_exit_acpi(data); |
1108 | ||
0cb8bc25 | 1109 | err_out: |
1da177e4 LT |
1110 | kfree(data); |
1111 | return -ENODEV; | |
1112 | } | |
1113 | ||
c0e61cb1 | 1114 | static int powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1da177e4 | 1115 | { |
2c6b8c03 | 1116 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
c3274763 | 1117 | int cpu; |
1da177e4 LT |
1118 | |
1119 | if (!data) | |
1120 | return -EINVAL; | |
1121 | ||
1122 | powernow_k8_cpu_exit_acpi(data); | |
1123 | ||
1da177e4 LT |
1124 | kfree(data->powernow_table); |
1125 | kfree(data); | |
c3274763 SB |
1126 | for_each_cpu(cpu, pol->cpus) |
1127 | per_cpu(powernow_data, cpu) = NULL; | |
1da177e4 LT |
1128 | |
1129 | return 0; | |
1130 | } | |
1131 | ||
1ff6e97f RR |
1132 | static void query_values_on_cpu(void *_err) |
1133 | { | |
1134 | int *err = _err; | |
0a3aee0d | 1135 | struct powernow_k8_data *data = __this_cpu_read(powernow_data); |
1ff6e97f RR |
1136 | |
1137 | *err = query_current_values_with_pending_wait(data); | |
1138 | } | |
1139 | ||
0e64a0c9 | 1140 | static unsigned int powernowk8_get(unsigned int cpu) |
1da177e4 | 1141 | { |
e15bc455 | 1142 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
1da177e4 | 1143 | unsigned int khz = 0; |
1ff6e97f | 1144 | int err; |
eef5167e | 1145 | |
1146 | if (!data) | |
557a701c | 1147 | return 0; |
eef5167e | 1148 | |
1ff6e97f RR |
1149 | smp_call_function_single(cpu, query_values_on_cpu, &err, true); |
1150 | if (err) | |
1da177e4 LT |
1151 | goto out; |
1152 | ||
e1f0b8e9 | 1153 | khz = find_khz_freq_from_fid(data->currfid); |
58389a86 | 1154 | |
1da177e4 | 1155 | |
b9111b7b | 1156 | out: |
1da177e4 LT |
1157 | return khz; |
1158 | } | |
1159 | ||
221dee28 | 1160 | static struct cpufreq_driver cpufreq_amd64_driver = { |
7dbf694d | 1161 | .flags = CPUFREQ_ASYNC_NOTIFICATION, |
d63bd27f | 1162 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 1163 | .target_index = powernowk8_target, |
e2f74f35 TR |
1164 | .bios_limit = acpi_processor_get_bios_limit, |
1165 | .init = powernowk8_cpu_init, | |
ce2650d4 | 1166 | .exit = powernowk8_cpu_exit, |
e2f74f35 TR |
1167 | .get = powernowk8_get, |
1168 | .name = "powernow-k8", | |
d63bd27f | 1169 | .attr = cpufreq_generic_attr, |
1da177e4 LT |
1170 | }; |
1171 | ||
4827ea6e BP |
1172 | static void __request_acpi_cpufreq(void) |
1173 | { | |
1174 | const char *cur_drv, *drv = "acpi-cpufreq"; | |
1175 | ||
1176 | cur_drv = cpufreq_get_current_driver(); | |
1177 | if (!cur_drv) | |
1178 | goto request; | |
1179 | ||
1180 | if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv)))) | |
e54173b4 | 1181 | pr_warn("WTF driver: %s\n", cur_drv); |
4827ea6e BP |
1182 | |
1183 | return; | |
1184 | ||
1185 | request: | |
e54173b4 | 1186 | pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n"); |
4827ea6e BP |
1187 | request_module(drv); |
1188 | } | |
1189 | ||
1da177e4 | 1190 | /* driver entry point for init */ |
2760984f | 1191 | static int powernowk8_init(void) |
1da177e4 | 1192 | { |
e1f0b8e9 | 1193 | unsigned int i, supported_cpus = 0; |
c0939e46 | 1194 | int ret; |
1da177e4 | 1195 | |
e1f0b8e9 | 1196 | if (static_cpu_has(X86_FEATURE_HW_PSTATE)) { |
4827ea6e | 1197 | __request_acpi_cpufreq(); |
fa8031ae | 1198 | return -ENODEV; |
e1f0b8e9 | 1199 | } |
fa8031ae | 1200 | |
fa8031ae AK |
1201 | if (!x86_match_cpu(powernow_k8_ids)) |
1202 | return -ENODEV; | |
1203 | ||
c0939e46 | 1204 | get_online_cpus(); |
a7201156 | 1205 | for_each_online_cpu(i) { |
c0939e46 BP |
1206 | smp_call_function_single(i, check_supported_cpu, &ret, 1); |
1207 | if (!ret) | |
1da177e4 LT |
1208 | supported_cpus++; |
1209 | } | |
1210 | ||
c0939e46 BP |
1211 | if (supported_cpus != num_online_cpus()) { |
1212 | put_online_cpus(); | |
73860c6b | 1213 | return -ENODEV; |
c0939e46 BP |
1214 | } |
1215 | put_online_cpus(); | |
73860c6b | 1216 | |
c0939e46 BP |
1217 | ret = cpufreq_register_driver(&cpufreq_amd64_driver); |
1218 | if (ret) | |
1219 | return ret; | |
73860c6b | 1220 | |
e54173b4 | 1221 | pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n", |
c0939e46 | 1222 | num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus); |
73860c6b | 1223 | |
c0939e46 | 1224 | return ret; |
1da177e4 LT |
1225 | } |
1226 | ||
1227 | /* driver entry point for term */ | |
1228 | static void __exit powernowk8_exit(void) | |
1229 | { | |
2d06d8c4 | 1230 | pr_debug("exit\n"); |
1da177e4 LT |
1231 | |
1232 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1233 | } | |
1234 | ||
e54173b4 SK |
1235 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>"); |
1236 | MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>"); | |
1da177e4 LT |
1237 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1238 | MODULE_LICENSE("GPL"); | |
1239 | ||
1240 | late_initcall(powernowk8_init); | |
1241 | module_exit(powernowk8_exit); |