Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
b2bd68e1 | 2 | * (c) 2003-2012 Advanced Micro Devices, Inc. |
1da177e4 LT |
3 | * Your use of this code is subject to the terms and conditions of the |
4 | * GNU general public license version 2. See "COPYING" or | |
5 | * http://www.gnu.org/licenses/gpl.html | |
6 | * | |
b2bd68e1 | 7 | * Maintainer: |
29c4bcdd | 8 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
1da177e4 LT |
9 | * |
10 | * Based on the powernow-k7.c module written by Dave Jones. | |
f4432c5c | 11 | * (C) 2003 Dave Jones on behalf of SuSE Labs |
1da177e4 | 12 | * (C) 2004 Dominik Brodowski <linux@brodo.de> |
a2531293 | 13 | * (C) 2004 Pavel Machek <pavel@ucw.cz> |
1da177e4 LT |
14 | * Licensed under the terms of the GNU GPL License version 2. |
15 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
16 | * | |
17 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 18 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 19 | * Originally developed by Paul Devriendt. |
1da177e4 | 20 | * |
b2bd68e1 AH |
21 | * Processor information obtained from Chapter 9 (Power and Thermal |
22 | * Management) of the "BIOS and Kernel Developer's Guide (BKDG) for | |
23 | * the AMD Athlon 64 and AMD Opteron Processors" and section "2.x | |
24 | * Power Management" in BKDGs for newer AMD CPU families. | |
25 | * | |
26 | * Tables for specific CPUs can be inferred from AMD's processor | |
27 | * power and thermal data sheets, (e.g. 30417.pdf, 30430.pdf, 43375.pdf) | |
1da177e4 LT |
28 | */ |
29 | ||
e54173b4 SK |
30 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
31 | ||
1da177e4 LT |
32 | #include <linux/kernel.h> |
33 | #include <linux/smp.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/cpufreq.h> | |
37 | #include <linux/slab.h> | |
38 | #include <linux/string.h> | |
065b807c | 39 | #include <linux/cpumask.h> |
0e64a0c9 DJ |
40 | #include <linux/io.h> |
41 | #include <linux/delay.h> | |
1da177e4 LT |
42 | |
43 | #include <asm/msr.h> | |
fa8031ae | 44 | #include <asm/cpu_device_id.h> |
1da177e4 | 45 | |
1da177e4 | 46 | #include <linux/acpi.h> |
14cc3e2b | 47 | #include <linux/mutex.h> |
1da177e4 | 48 | #include <acpi/processor.h> |
1da177e4 | 49 | |
c5829cd0 | 50 | #define VERSION "version 2.20.00" |
1da177e4 LT |
51 | #include "powernow-k8.h" |
52 | ||
53 | /* serialize freq changes */ | |
14cc3e2b | 54 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 55 | |
2c6b8c03 | 56 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 57 | |
a2fed573 ML |
58 | static struct cpufreq_driver cpufreq_amd64_driver; |
59 | ||
065b807c | 60 | #ifndef CONFIG_SMP |
7ad728f9 RR |
61 | static inline const struct cpumask *cpu_core_mask(int cpu) |
62 | { | |
63 | return cpumask_of(0); | |
64 | } | |
065b807c DJ |
65 | #endif |
66 | ||
1da177e4 LT |
67 | /* Return a frequency in MHz, given an input fid */ |
68 | static u32 find_freq_from_fid(u32 fid) | |
69 | { | |
70 | return 800 + (fid * 100); | |
71 | } | |
72 | ||
73 | /* Return a frequency in KHz, given an input fid */ | |
74 | static u32 find_khz_freq_from_fid(u32 fid) | |
75 | { | |
76 | return 1000 * find_freq_from_fid(fid); | |
77 | } | |
78 | ||
1da177e4 LT |
79 | /* Return the vco fid for an input fid |
80 | * | |
81 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
82 | * only from corresponding high fids. This returns "high" fid corresponding to | |
83 | * "low" one. | |
84 | */ | |
85 | static u32 convert_fid_to_vco_fid(u32 fid) | |
86 | { | |
32ee8c3e | 87 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 88 | return 8 + (2 * fid); |
32ee8c3e | 89 | else |
1da177e4 | 90 | return fid; |
1da177e4 LT |
91 | } |
92 | ||
93 | /* | |
94 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
95 | * to transition to a new state, seeing this bit set is really bad news. | |
96 | */ | |
97 | static int pending_bit_stuck(void) | |
98 | { | |
99 | u32 lo, hi; | |
100 | ||
101 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
102 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
103 | } | |
104 | ||
105 | /* | |
106 | * Update the global current fid / vid values from the status msr. | |
107 | * Returns 1 on error. | |
108 | */ | |
109 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
110 | { | |
111 | u32 lo, hi; | |
112 | u32 i = 0; | |
113 | ||
7153d961 | 114 | do { |
0213df74 | 115 | if (i++ > 10000) { |
2d06d8c4 | 116 | pr_debug("detected change pending stuck\n"); |
1da177e4 LT |
117 | return 1; |
118 | } | |
119 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 120 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
121 | |
122 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
123 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
128 | /* the isochronous relief time */ | |
129 | static void count_off_irt(struct powernow_k8_data *data) | |
130 | { | |
131 | udelay((1 << data->irt) * 10); | |
132 | return; | |
133 | } | |
134 | ||
27b46d76 | 135 | /* the voltage stabilization time */ |
1da177e4 LT |
136 | static void count_off_vst(struct powernow_k8_data *data) |
137 | { | |
138 | udelay(data->vstable * VST_UNITS_20US); | |
139 | return; | |
140 | } | |
141 | ||
142 | /* need to init the control msr to a safe value (for each cpu) */ | |
143 | static void fidvid_msr_init(void) | |
144 | { | |
145 | u32 lo, hi; | |
146 | u8 fid, vid; | |
147 | ||
148 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
149 | vid = hi & MSR_S_HI_CURRENT_VID; | |
150 | fid = lo & MSR_S_LO_CURRENT_FID; | |
151 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
152 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
2d06d8c4 | 153 | pr_debug("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); |
1da177e4 LT |
154 | wrmsr(MSR_FIDVID_CTL, lo, hi); |
155 | } | |
156 | ||
1da177e4 LT |
157 | /* write the new fid value along with the other control fields to the msr */ |
158 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
159 | { | |
160 | u32 lo; | |
161 | u32 savevid = data->currvid; | |
0213df74 | 162 | u32 i = 0; |
1da177e4 LT |
163 | |
164 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
e54173b4 | 165 | pr_err("internal error - overflow on fid write\n"); |
1da177e4 LT |
166 | return 1; |
167 | } | |
168 | ||
0e64a0c9 DJ |
169 | lo = fid; |
170 | lo |= (data->currvid << MSR_C_LO_VID_SHIFT); | |
171 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 172 | |
2d06d8c4 | 173 | pr_debug("writing fid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
174 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); |
175 | ||
0213df74 DJ |
176 | do { |
177 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
178 | if (i++ > 100) { | |
e54173b4 | 179 | pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n"); |
63172cb3 | 180 | return 1; |
32ee8c3e | 181 | } |
0213df74 | 182 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
183 | |
184 | count_off_irt(data); | |
185 | ||
186 | if (savevid != data->currvid) { | |
e54173b4 SK |
187 | pr_err("vid change on fid trans, old 0x%x, new 0x%x\n", |
188 | savevid, data->currvid); | |
1da177e4 LT |
189 | return 1; |
190 | } | |
191 | ||
192 | if (fid != data->currfid) { | |
e54173b4 | 193 | pr_err("fid trans failed, fid 0x%x, curr 0x%x\n", fid, |
0e64a0c9 | 194 | data->currfid); |
1da177e4 LT |
195 | return 1; |
196 | } | |
197 | ||
198 | return 0; | |
199 | } | |
200 | ||
201 | /* Write a new vid to the hardware */ | |
202 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
203 | { | |
204 | u32 lo; | |
205 | u32 savefid = data->currfid; | |
0213df74 | 206 | int i = 0; |
1da177e4 LT |
207 | |
208 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
e54173b4 | 209 | pr_err("internal error - overflow on vid write\n"); |
1da177e4 LT |
210 | return 1; |
211 | } | |
212 | ||
0e64a0c9 DJ |
213 | lo = data->currfid; |
214 | lo |= (vid << MSR_C_LO_VID_SHIFT); | |
215 | lo |= MSR_C_LO_INIT_FID_VID; | |
1da177e4 | 216 | |
2d06d8c4 | 217 | pr_debug("writing vid 0x%x, lo 0x%x, hi 0x%x\n", |
1da177e4 LT |
218 | vid, lo, STOP_GRANT_5NS); |
219 | ||
0213df74 DJ |
220 | do { |
221 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 | 222 | if (i++ > 100) { |
e54173b4 | 223 | pr_err("internal error - pending bit very stuck - no further pstate changes possible\n"); |
6df89006 DJ |
224 | return 1; |
225 | } | |
0213df74 | 226 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
227 | |
228 | if (savefid != data->currfid) { | |
e54173b4 SK |
229 | pr_err("fid changed on vid trans, old 0x%x new 0x%x\n", |
230 | savefid, data->currfid); | |
1da177e4 LT |
231 | return 1; |
232 | } | |
233 | ||
234 | if (vid != data->currvid) { | |
e54173b4 | 235 | pr_err("vid trans failed, vid 0x%x, curr 0x%x\n", |
0e64a0c9 | 236 | vid, data->currvid); |
1da177e4 LT |
237 | return 1; |
238 | } | |
239 | ||
240 | return 0; | |
241 | } | |
242 | ||
243 | /* | |
244 | * Reduce the vid by the max of step or reqvid. | |
245 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 246 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 | 247 | */ |
0e64a0c9 DJ |
248 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, |
249 | u32 reqvid, u32 step) | |
1da177e4 LT |
250 | { |
251 | if ((data->currvid - reqvid) > step) | |
252 | reqvid = data->currvid - step; | |
253 | ||
254 | if (write_new_vid(data, reqvid)) | |
255 | return 1; | |
256 | ||
257 | count_off_vst(data); | |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
1f729e06 | 262 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ |
0e64a0c9 DJ |
263 | static int transition_fid_vid(struct powernow_k8_data *data, |
264 | u32 reqfid, u32 reqvid) | |
1da177e4 | 265 | { |
a2e1b4c3 | 266 | if (core_voltage_pre_transition(data, reqvid, reqfid)) |
1da177e4 LT |
267 | return 1; |
268 | ||
269 | if (core_frequency_transition(data, reqfid)) | |
270 | return 1; | |
271 | ||
272 | if (core_voltage_post_transition(data, reqvid)) | |
273 | return 1; | |
274 | ||
275 | if (query_current_values_with_pending_wait(data)) | |
276 | return 1; | |
277 | ||
278 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
e54173b4 | 279 | pr_err("failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", |
1da177e4 LT |
280 | smp_processor_id(), |
281 | reqfid, reqvid, data->currfid, data->currvid); | |
282 | return 1; | |
283 | } | |
284 | ||
2d06d8c4 | 285 | pr_debug("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
286 | smp_processor_id(), data->currfid, data->currvid); |
287 | ||
288 | return 0; | |
289 | } | |
290 | ||
291 | /* Phase 1 - core voltage transition ... setup voltage */ | |
0e64a0c9 | 292 | static int core_voltage_pre_transition(struct powernow_k8_data *data, |
a2e1b4c3 | 293 | u32 reqvid, u32 reqfid) |
1da177e4 LT |
294 | { |
295 | u32 rvosteps = data->rvo; | |
296 | u32 savefid = data->currfid; | |
a2e1b4c3 | 297 | u32 maxvid, lo, rvomult = 1; |
1da177e4 | 298 | |
e54173b4 | 299 | pr_debug("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", |
1da177e4 LT |
300 | smp_processor_id(), |
301 | data->currfid, data->currvid, reqvid, data->rvo); | |
302 | ||
a2e1b4c3 ML |
303 | if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) |
304 | rvomult = 2; | |
305 | rvosteps *= rvomult; | |
065b807c DJ |
306 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
307 | maxvid = 0x1f & (maxvid >> 16); | |
2d06d8c4 | 308 | pr_debug("ph1 maxvid=0x%x\n", maxvid); |
065b807c DJ |
309 | if (reqvid < maxvid) /* lower numbers are higher voltages */ |
310 | reqvid = maxvid; | |
311 | ||
1da177e4 | 312 | while (data->currvid > reqvid) { |
2d06d8c4 | 313 | pr_debug("ph1: curr 0x%x, req vid 0x%x\n", |
1da177e4 LT |
314 | data->currvid, reqvid); |
315 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
316 | return 1; | |
317 | } | |
318 | ||
a2e1b4c3 ML |
319 | while ((rvosteps > 0) && |
320 | ((rvomult * data->rvo + data->currvid) > reqvid)) { | |
065b807c | 321 | if (data->currvid == maxvid) { |
1da177e4 LT |
322 | rvosteps = 0; |
323 | } else { | |
2d06d8c4 | 324 | pr_debug("ph1: changing vid for rvo, req 0x%x\n", |
1da177e4 | 325 | data->currvid - 1); |
0e64a0c9 | 326 | if (decrease_vid_code_by_step(data, data->currvid-1, 1)) |
1da177e4 LT |
327 | return 1; |
328 | rvosteps--; | |
329 | } | |
330 | } | |
331 | ||
332 | if (query_current_values_with_pending_wait(data)) | |
333 | return 1; | |
334 | ||
335 | if (savefid != data->currfid) { | |
e54173b4 | 336 | pr_err("ph1 err, currfid changed 0x%x\n", data->currfid); |
1da177e4 LT |
337 | return 1; |
338 | } | |
339 | ||
2d06d8c4 | 340 | pr_debug("ph1 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
341 | data->currfid, data->currvid); |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | /* Phase 2 - core frequency transition */ | |
347 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
348 | { | |
0e64a0c9 DJ |
349 | u32 vcoreqfid, vcocurrfid, vcofiddiff; |
350 | u32 fid_interval, savevid = data->currvid; | |
1da177e4 | 351 | |
1da177e4 | 352 | if (data->currfid == reqfid) { |
e54173b4 | 353 | pr_err("ph2 null fid transition 0x%x\n", data->currfid); |
1da177e4 LT |
354 | return 0; |
355 | } | |
356 | ||
e54173b4 | 357 | pr_debug("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", |
1da177e4 LT |
358 | smp_processor_id(), |
359 | data->currfid, data->currvid, reqfid); | |
360 | ||
361 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
362 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
363 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
364 | : vcoreqfid - vcocurrfid; | |
365 | ||
a2e1b4c3 ML |
366 | if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) |
367 | vcofiddiff = 0; | |
368 | ||
1da177e4 | 369 | while (vcofiddiff > 2) { |
019a61b9 LM |
370 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
371 | ||
1da177e4 LT |
372 | if (reqfid > data->currfid) { |
373 | if (data->currfid > LO_FID_TABLE_TOP) { | |
0e64a0c9 DJ |
374 | if (write_new_fid(data, |
375 | data->currfid + fid_interval)) | |
1da177e4 | 376 | return 1; |
1da177e4 LT |
377 | } else { |
378 | if (write_new_fid | |
0e64a0c9 DJ |
379 | (data, |
380 | 2 + convert_fid_to_vco_fid(data->currfid))) | |
1da177e4 | 381 | return 1; |
1da177e4 LT |
382 | } |
383 | } else { | |
019a61b9 | 384 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
385 | return 1; |
386 | } | |
387 | ||
388 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
389 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
390 | : vcoreqfid - vcocurrfid; | |
391 | } | |
392 | ||
393 | if (write_new_fid(data, reqfid)) | |
394 | return 1; | |
395 | ||
396 | if (query_current_values_with_pending_wait(data)) | |
397 | return 1; | |
398 | ||
399 | if (data->currfid != reqfid) { | |
e54173b4 | 400 | pr_err("ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", |
1da177e4 LT |
401 | data->currfid, reqfid); |
402 | return 1; | |
403 | } | |
404 | ||
405 | if (savevid != data->currvid) { | |
e54173b4 | 406 | pr_err("ph2: vid changed, save 0x%x, curr 0x%x\n", |
1da177e4 LT |
407 | savevid, data->currvid); |
408 | return 1; | |
409 | } | |
410 | ||
2d06d8c4 | 411 | pr_debug("ph2 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
412 | data->currfid, data->currvid); |
413 | ||
414 | return 0; | |
415 | } | |
416 | ||
417 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
0e64a0c9 DJ |
418 | static int core_voltage_post_transition(struct powernow_k8_data *data, |
419 | u32 reqvid) | |
1da177e4 LT |
420 | { |
421 | u32 savefid = data->currfid; | |
422 | u32 savereqvid = reqvid; | |
423 | ||
2d06d8c4 | 424 | pr_debug("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
425 | smp_processor_id(), |
426 | data->currfid, data->currvid); | |
427 | ||
428 | if (reqvid != data->currvid) { | |
429 | if (write_new_vid(data, reqvid)) | |
430 | return 1; | |
431 | ||
432 | if (savefid != data->currfid) { | |
e54173b4 SK |
433 | pr_err("ph3: bad fid change, save 0x%x, curr 0x%x\n", |
434 | savefid, data->currfid); | |
1da177e4 LT |
435 | return 1; |
436 | } | |
437 | ||
438 | if (data->currvid != reqvid) { | |
e54173b4 SK |
439 | pr_err("ph3: failed vid transition\n, req 0x%x, curr 0x%x", |
440 | reqvid, data->currvid); | |
1da177e4 LT |
441 | return 1; |
442 | } | |
443 | } | |
444 | ||
445 | if (query_current_values_with_pending_wait(data)) | |
446 | return 1; | |
447 | ||
448 | if (savereqvid != data->currvid) { | |
2d06d8c4 | 449 | pr_debug("ph3 failed, currvid 0x%x\n", data->currvid); |
1da177e4 LT |
450 | return 1; |
451 | } | |
452 | ||
453 | if (savefid != data->currfid) { | |
2d06d8c4 | 454 | pr_debug("ph3 failed, currfid changed 0x%x\n", |
1da177e4 LT |
455 | data->currfid); |
456 | return 1; | |
457 | } | |
458 | ||
2d06d8c4 | 459 | pr_debug("ph3 complete, currfid 0x%x, currvid 0x%x\n", |
1da177e4 LT |
460 | data->currfid, data->currvid); |
461 | ||
462 | return 0; | |
463 | } | |
464 | ||
fa8031ae AK |
465 | static const struct x86_cpu_id powernow_k8_ids[] = { |
466 | /* IO based frequency switching */ | |
467 | { X86_VENDOR_AMD, 0xf }, | |
fa8031ae AK |
468 | {} |
469 | }; | |
470 | MODULE_DEVICE_TABLE(x86cpu, powernow_k8_ids); | |
471 | ||
1ff6e97f | 472 | static void check_supported_cpu(void *_rc) |
1da177e4 | 473 | { |
1da177e4 | 474 | u32 eax, ebx, ecx, edx; |
1ff6e97f | 475 | int *rc = _rc; |
1da177e4 | 476 | |
1ff6e97f | 477 | *rc = -ENODEV; |
1da177e4 | 478 | |
1da177e4 | 479 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
2c906ae6 | 480 | |
1f729e06 DJ |
481 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
482 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 483 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
e54173b4 | 484 | pr_info("Processor cpuid %x not supported\n", eax); |
1ff6e97f | 485 | return; |
1f729e06 | 486 | } |
1da177e4 | 487 | |
1f729e06 DJ |
488 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
489 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
e54173b4 | 490 | pr_info("No frequency change capabilities detected\n"); |
1ff6e97f | 491 | return; |
1f729e06 | 492 | } |
1da177e4 | 493 | |
1f729e06 | 494 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
0e64a0c9 DJ |
495 | if ((edx & P_STATE_TRANSITION_CAPABLE) |
496 | != P_STATE_TRANSITION_CAPABLE) { | |
e54173b4 | 497 | pr_info("Power state transitions not supported\n"); |
1ff6e97f | 498 | return; |
1f729e06 | 499 | } |
e1f0b8e9 | 500 | *rc = 0; |
1da177e4 | 501 | } |
1da177e4 LT |
502 | } |
503 | ||
0e64a0c9 DJ |
504 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, |
505 | u8 maxvid) | |
1da177e4 LT |
506 | { |
507 | unsigned int j; | |
508 | u8 lastfid = 0xff; | |
509 | ||
510 | for (j = 0; j < data->numps; j++) { | |
511 | if (pst[j].vid > LEAST_VID) { | |
e54173b4 SK |
512 | pr_err(FW_BUG "vid %d invalid : 0x%x\n", j, |
513 | pst[j].vid); | |
1da177e4 LT |
514 | return -EINVAL; |
515 | } | |
0e64a0c9 DJ |
516 | if (pst[j].vid < data->rvo) { |
517 | /* vid + rvo >= 0 */ | |
e54173b4 | 518 | pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j); |
1da177e4 LT |
519 | return -ENODEV; |
520 | } | |
0e64a0c9 DJ |
521 | if (pst[j].vid < maxvid + data->rvo) { |
522 | /* vid + rvo >= maxvid */ | |
e54173b4 | 523 | pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j); |
1da177e4 LT |
524 | return -ENODEV; |
525 | } | |
8aae8284 | 526 | if (pst[j].fid > MAX_FID) { |
e54173b4 | 527 | pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j); |
8aae8284 JS |
528 | return -ENODEV; |
529 | } | |
8aae8284 | 530 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 531 | /* Only first fid is allowed to be in "low" range */ |
e54173b4 SK |
532 | pr_err(FW_BUG "two low fids - %d : 0x%x\n", j, |
533 | pst[j].fid); | |
1da177e4 LT |
534 | return -EINVAL; |
535 | } | |
536 | if (pst[j].fid < lastfid) | |
537 | lastfid = pst[j].fid; | |
538 | } | |
539 | if (lastfid & 1) { | |
e54173b4 | 540 | pr_err(FW_BUG "lastfid invalid\n"); |
1da177e4 LT |
541 | return -EINVAL; |
542 | } | |
543 | if (lastfid > LO_FID_TABLE_TOP) | |
e54173b4 | 544 | pr_info(FW_BUG "first fid not from lo freq table\n"); |
1da177e4 LT |
545 | |
546 | return 0; | |
547 | } | |
548 | ||
f0adb134 KR |
549 | static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, |
550 | unsigned int entry) | |
0e64a0c9 | 551 | { |
f0adb134 | 552 | powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; |
0e64a0c9 DJ |
553 | } |
554 | ||
1da177e4 LT |
555 | static void print_basics(struct powernow_k8_data *data) |
556 | { | |
557 | int j; | |
558 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 DJ |
559 | if (data->powernow_table[j].frequency != |
560 | CPUFREQ_ENTRY_INVALID) { | |
e54173b4 SK |
561 | pr_info("fid 0x%x (%d MHz), vid 0x%x\n", |
562 | data->powernow_table[j].driver_data & 0xff, | |
563 | data->powernow_table[j].frequency/1000, | |
564 | data->powernow_table[j].driver_data >> 8); | |
1f729e06 | 565 | } |
1da177e4 LT |
566 | } |
567 | if (data->batps) | |
e54173b4 | 568 | pr_info("Only %d pstates on battery\n", data->batps); |
1da177e4 LT |
569 | } |
570 | ||
0e64a0c9 DJ |
571 | static int fill_powernow_table(struct powernow_k8_data *data, |
572 | struct pst_s *pst, u8 maxvid) | |
1da177e4 LT |
573 | { |
574 | struct cpufreq_frequency_table *powernow_table; | |
575 | unsigned int j; | |
576 | ||
0e64a0c9 DJ |
577 | if (data->batps) { |
578 | /* use ACPI support to get full speed on mains power */ | |
e54173b4 SK |
579 | pr_warn("Only %d pstates usable (use ACPI driver for full range\n", |
580 | data->batps); | |
1da177e4 LT |
581 | data->numps = data->batps; |
582 | } | |
583 | ||
0e64a0c9 | 584 | for (j = 1; j < data->numps; j++) { |
1da177e4 | 585 | if (pst[j-1].fid >= pst[j].fid) { |
e54173b4 | 586 | pr_err("PST out of sequence\n"); |
1da177e4 LT |
587 | return -EINVAL; |
588 | } | |
589 | } | |
590 | ||
591 | if (data->numps < 2) { | |
e54173b4 | 592 | pr_err("no p states to transition\n"); |
1da177e4 LT |
593 | return -ENODEV; |
594 | } | |
595 | ||
596 | if (check_pst_table(data, pst, maxvid)) | |
597 | return -EINVAL; | |
598 | ||
71508a1f | 599 | powernow_table = kzalloc((sizeof(*powernow_table) |
1da177e4 LT |
600 | * (data->numps + 1)), GFP_KERNEL); |
601 | if (!powernow_table) { | |
e54173b4 | 602 | pr_err("powernow_table memory alloc failure\n"); |
1da177e4 LT |
603 | return -ENOMEM; |
604 | } | |
605 | ||
606 | for (j = 0; j < data->numps; j++) { | |
0e64a0c9 | 607 | int freq; |
50701588 VK |
608 | powernow_table[j].driver_data = pst[j].fid; /* lower 8 bits */ |
609 | powernow_table[j].driver_data |= (pst[j].vid << 8); /* upper 8 bits */ | |
0e64a0c9 DJ |
610 | freq = find_khz_freq_from_fid(pst[j].fid); |
611 | powernow_table[j].frequency = freq; | |
1da177e4 LT |
612 | } |
613 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
50701588 | 614 | powernow_table[data->numps].driver_data = 0; |
1da177e4 LT |
615 | |
616 | if (query_current_values_with_pending_wait(data)) { | |
617 | kfree(powernow_table); | |
618 | return -EIO; | |
619 | } | |
620 | ||
2d06d8c4 | 621 | pr_debug("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); |
1da177e4 | 622 | data->powernow_table = powernow_table; |
7ad728f9 | 623 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
2e497620 | 624 | print_basics(data); |
1da177e4 LT |
625 | |
626 | for (j = 0; j < data->numps; j++) | |
0e64a0c9 DJ |
627 | if ((pst[j].fid == data->currfid) && |
628 | (pst[j].vid == data->currvid)) | |
1da177e4 LT |
629 | return 0; |
630 | ||
2d06d8c4 | 631 | pr_debug("currfid/vid do not match PST, ignoring\n"); |
1da177e4 LT |
632 | return 0; |
633 | } | |
634 | ||
635 | /* Find and validate the PSB/PST table in BIOS. */ | |
636 | static int find_psb_table(struct powernow_k8_data *data) | |
637 | { | |
638 | struct psb_s *psb; | |
639 | unsigned int i; | |
640 | u32 mvs; | |
641 | u8 maxvid; | |
642 | u32 cpst = 0; | |
643 | u32 thiscpuid; | |
644 | ||
645 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
646 | /* Scan BIOS looking for the signature. */ | |
647 | /* It can not be at ffff0 - it is too big. */ | |
648 | ||
649 | psb = phys_to_virt(i); | |
650 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
651 | continue; | |
652 | ||
2d06d8c4 | 653 | pr_debug("found PSB header at 0x%p\n", psb); |
1da177e4 | 654 | |
2d06d8c4 | 655 | pr_debug("table vers: 0x%x\n", psb->tableversion); |
1da177e4 | 656 | if (psb->tableversion != PSB_VERSION_1_4) { |
e54173b4 | 657 | pr_err(FW_BUG "PSB table is not v1.4\n"); |
1da177e4 LT |
658 | return -ENODEV; |
659 | } | |
660 | ||
2d06d8c4 | 661 | pr_debug("flags: 0x%x\n", psb->flags1); |
1da177e4 | 662 | if (psb->flags1) { |
e54173b4 | 663 | pr_err(FW_BUG "unknown flags\n"); |
1da177e4 LT |
664 | return -ENODEV; |
665 | } | |
666 | ||
667 | data->vstable = psb->vstable; | |
2d06d8c4 | 668 | pr_debug("voltage stabilization time: %d(*20us)\n", |
0e64a0c9 | 669 | data->vstable); |
1da177e4 | 670 | |
2d06d8c4 | 671 | pr_debug("flags2: 0x%x\n", psb->flags2); |
1da177e4 LT |
672 | data->rvo = psb->flags2 & 3; |
673 | data->irt = ((psb->flags2) >> 2) & 3; | |
674 | mvs = ((psb->flags2) >> 4) & 3; | |
675 | data->vidmvs = 1 << mvs; | |
676 | data->batps = ((psb->flags2) >> 6) & 3; | |
677 | ||
2d06d8c4 DB |
678 | pr_debug("ramp voltage offset: %d\n", data->rvo); |
679 | pr_debug("isochronous relief time: %d\n", data->irt); | |
680 | pr_debug("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
1da177e4 | 681 | |
2d06d8c4 | 682 | pr_debug("numpst: 0x%x\n", psb->num_tables); |
1da177e4 | 683 | cpst = psb->num_tables; |
0e64a0c9 DJ |
684 | if ((psb->cpuid == 0x00000fc0) || |
685 | (psb->cpuid == 0x00000fe0)) { | |
1da177e4 | 686 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); |
0e64a0c9 DJ |
687 | if ((thiscpuid == 0x00000fc0) || |
688 | (thiscpuid == 0x00000fe0)) | |
1da177e4 | 689 | cpst = 1; |
1da177e4 LT |
690 | } |
691 | if (cpst != 1) { | |
e54173b4 | 692 | pr_err(FW_BUG "numpst must be 1\n"); |
1da177e4 LT |
693 | return -ENODEV; |
694 | } | |
695 | ||
696 | data->plllock = psb->plllocktime; | |
2d06d8c4 DB |
697 | pr_debug("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); |
698 | pr_debug("maxfid: 0x%x\n", psb->maxfid); | |
699 | pr_debug("maxvid: 0x%x\n", psb->maxvid); | |
1da177e4 LT |
700 | maxvid = psb->maxvid; |
701 | ||
702 | data->numps = psb->numps; | |
2d06d8c4 | 703 | pr_debug("numpstates: 0x%x\n", data->numps); |
0e64a0c9 DJ |
704 | return fill_powernow_table(data, |
705 | (struct pst_s *)(psb+1), maxvid); | |
1da177e4 LT |
706 | } |
707 | /* | |
708 | * If you see this message, complain to BIOS manufacturer. If | |
709 | * he tells you "we do not support Linux" or some similar | |
710 | * nonsense, remember that Windows 2000 uses the same legacy | |
711 | * mechanism that the old Linux PSB driver uses. Tell them it | |
712 | * is broken with Windows 2000. | |
713 | * | |
714 | * The reference to the AMD documentation is chapter 9 in the | |
715 | * BIOS and Kernel Developer's Guide, which is available on | |
716 | * www.amd.com | |
717 | */ | |
e54173b4 SK |
718 | pr_err(FW_BUG "No PSB or ACPI _PSS objects\n"); |
719 | pr_err("Make sure that your BIOS is up to date and Cool'N'Quiet support is enabled in BIOS setup\n"); | |
1da177e4 LT |
720 | return -ENODEV; |
721 | } | |
722 | ||
0e64a0c9 DJ |
723 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, |
724 | unsigned int index) | |
1da177e4 | 725 | { |
439913ff | 726 | u64 control; |
0e64a0c9 | 727 | |
e1f0b8e9 | 728 | if (!data->acpi_data.state_count) |
1da177e4 LT |
729 | return; |
730 | ||
21335d02 LH |
731 | control = data->acpi_data.states[index].control; |
732 | data->irt = (control >> IRT_SHIFT) & IRT_MASK; | |
733 | data->rvo = (control >> RVO_SHIFT) & RVO_MASK; | |
734 | data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
735 | data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; | |
736 | data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); | |
737 | data->vstable = (control >> VST_SHIFT) & VST_MASK; | |
738 | } | |
1da177e4 LT |
739 | |
740 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
741 | { | |
1da177e4 | 742 | struct cpufreq_frequency_table *powernow_table; |
2fdf66b4 | 743 | int ret_val = -ENODEV; |
439913ff | 744 | u64 control, status; |
1da177e4 | 745 | |
f607e3a0 | 746 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
2d06d8c4 | 747 | pr_debug("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
748 | return -EIO; |
749 | } | |
750 | ||
751 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 752 | if (data->acpi_data.state_count <= 1) { |
2d06d8c4 | 753 | pr_debug("No ACPI P-States\n"); |
1da177e4 LT |
754 | goto err_out; |
755 | } | |
756 | ||
2c701b10 DJ |
757 | control = data->acpi_data.control_register.space_id; |
758 | status = data->acpi_data.status_register.space_id; | |
759 | ||
760 | if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || | |
761 | (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
2d06d8c4 | 762 | pr_debug("Invalid control/status registers (%llx - %llx)\n", |
2c701b10 | 763 | control, status); |
1da177e4 LT |
764 | goto err_out; |
765 | } | |
766 | ||
767 | /* fill in data->powernow_table */ | |
71508a1f | 768 | powernow_table = kzalloc((sizeof(*powernow_table) |
f607e3a0 | 769 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
1da177e4 | 770 | if (!powernow_table) { |
2d06d8c4 | 771 | pr_debug("powernow_table memory alloc failure\n"); |
1da177e4 LT |
772 | goto err_out; |
773 | } | |
774 | ||
db39d552 ML |
775 | /* fill in data */ |
776 | data->numps = data->acpi_data.state_count; | |
777 | powernow_k8_acpi_pst_values(data, 0); | |
778 | ||
e1f0b8e9 | 779 | ret_val = fill_powernow_table_fidvid(data, powernow_table); |
1f729e06 DJ |
780 | if (ret_val) |
781 | goto err_out_mem; | |
782 | ||
0e64a0c9 DJ |
783 | powernow_table[data->acpi_data.state_count].frequency = |
784 | CPUFREQ_TABLE_END; | |
1f729e06 DJ |
785 | data->powernow_table = powernow_table; |
786 | ||
7ad728f9 | 787 | if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) |
2e497620 | 788 | print_basics(data); |
1f729e06 DJ |
789 | |
790 | /* notify BIOS that we exist */ | |
791 | acpi_processor_notify_smm(THIS_MODULE); | |
792 | ||
eaa95840 | 793 | if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { |
e54173b4 | 794 | pr_err("unable to alloc powernow_k8_data cpumask\n"); |
2fdf66b4 RR |
795 | ret_val = -ENOMEM; |
796 | goto err_out_mem; | |
797 | } | |
798 | ||
1f729e06 DJ |
799 | return 0; |
800 | ||
801 | err_out_mem: | |
802 | kfree(powernow_table); | |
803 | ||
804 | err_out: | |
f607e3a0 | 805 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); |
1f729e06 | 806 | |
0e64a0c9 DJ |
807 | /* data->acpi_data.state_count informs us at ->exit() |
808 | * whether ACPI was used */ | |
f607e3a0 | 809 | data->acpi_data.state_count = 0; |
1f729e06 | 810 | |
2fdf66b4 | 811 | return ret_val; |
1f729e06 DJ |
812 | } |
813 | ||
0e64a0c9 DJ |
814 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, |
815 | struct cpufreq_frequency_table *powernow_table) | |
1f729e06 DJ |
816 | { |
817 | int i; | |
0e64a0c9 | 818 | |
f607e3a0 | 819 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
820 | u32 fid; |
821 | u32 vid; | |
0e64a0c9 | 822 | u32 freq, index; |
439913ff | 823 | u64 status, control; |
094ce7fd DJ |
824 | |
825 | if (data->exttype) { | |
0e64a0c9 DJ |
826 | status = data->acpi_data.states[i].status; |
827 | fid = status & EXT_FID_MASK; | |
828 | vid = (status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 829 | } else { |
0e64a0c9 DJ |
830 | control = data->acpi_data.states[i].control; |
831 | fid = control & FID_MASK; | |
832 | vid = (control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 833 | } |
1da177e4 | 834 | |
2d06d8c4 | 835 | pr_debug(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); |
1da177e4 | 836 | |
0e64a0c9 | 837 | index = fid | (vid<<8); |
50701588 | 838 | powernow_table[i].driver_data = index; |
0e64a0c9 DJ |
839 | |
840 | freq = find_khz_freq_from_fid(fid); | |
841 | powernow_table[i].frequency = freq; | |
1da177e4 LT |
842 | |
843 | /* verify frequency is OK */ | |
0e64a0c9 | 844 | if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { |
2d06d8c4 | 845 | pr_debug("invalid freq %u kHz, ignoring\n", freq); |
f0adb134 | 846 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
847 | continue; |
848 | } | |
849 | ||
0e64a0c9 DJ |
850 | /* verify voltage is OK - |
851 | * BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 852 | if (vid == VID_OFF) { |
2d06d8c4 | 853 | pr_debug("invalid vid %u, ignoring\n", vid); |
f0adb134 | 854 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
855 | continue; |
856 | } | |
857 | ||
0e64a0c9 | 858 | if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { |
e54173b4 SK |
859 | pr_info("invalid freq entries %u kHz vs. %u kHz\n", |
860 | freq, (unsigned int) | |
0e64a0c9 DJ |
861 | (data->acpi_data.states[i].core_frequency |
862 | * 1000)); | |
f0adb134 | 863 | invalidate_entry(powernow_table, i); |
1da177e4 LT |
864 | continue; |
865 | } | |
866 | } | |
1da177e4 | 867 | return 0; |
1da177e4 LT |
868 | } |
869 | ||
870 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
871 | { | |
f607e3a0 | 872 | if (data->acpi_data.state_count) |
0e64a0c9 DJ |
873 | acpi_processor_unregister_performance(&data->acpi_data, |
874 | data->cpu); | |
2fdf66b4 | 875 | free_cpumask_var(data->acpi_data.shared_cpu_map); |
1da177e4 LT |
876 | } |
877 | ||
732553e5 ML |
878 | static int get_transition_latency(struct powernow_k8_data *data) |
879 | { | |
880 | int max_latency = 0; | |
881 | int i; | |
882 | for (i = 0; i < data->acpi_data.state_count; i++) { | |
883 | int cur_latency = data->acpi_data.states[i].transition_latency | |
884 | + data->acpi_data.states[i].bus_master_latency; | |
885 | if (cur_latency > max_latency) | |
886 | max_latency = cur_latency; | |
887 | } | |
86e13684 | 888 | if (max_latency == 0) { |
e54173b4 | 889 | pr_err(FW_WARN "Invalid zero transition latency\n"); |
86e13684 TR |
890 | max_latency = 1; |
891 | } | |
732553e5 ML |
892 | /* value in usecs, needs to be in nanoseconds */ |
893 | return 1000 * max_latency; | |
894 | } | |
895 | ||
1da177e4 | 896 | /* Take a frequency, and issue the fid/vid transition command */ |
0e64a0c9 DJ |
897 | static int transition_frequency_fidvid(struct powernow_k8_data *data, |
898 | unsigned int index) | |
1da177e4 | 899 | { |
b43a7ffb | 900 | struct cpufreq_policy *policy; |
1f729e06 DJ |
901 | u32 fid = 0; |
902 | u32 vid = 0; | |
b43a7ffb | 903 | int res; |
1da177e4 LT |
904 | struct cpufreq_freqs freqs; |
905 | ||
2d06d8c4 | 906 | pr_debug("cpu %d transition to index %u\n", smp_processor_id(), index); |
1da177e4 | 907 | |
1f729e06 | 908 | /* fid/vid correctness check for k8 */ |
1da177e4 | 909 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
910 | * the cpufreq frequency table in find_psb_table, vid |
911 | * are the upper 8 bits. | |
1da177e4 | 912 | */ |
50701588 VK |
913 | fid = data->powernow_table[index].driver_data & 0xFF; |
914 | vid = (data->powernow_table[index].driver_data & 0xFF00) >> 8; | |
1da177e4 | 915 | |
2d06d8c4 | 916 | pr_debug("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); |
1da177e4 LT |
917 | |
918 | if (query_current_values_with_pending_wait(data)) | |
919 | return 1; | |
920 | ||
921 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
2d06d8c4 | 922 | pr_debug("target matches current values (fid 0x%x, vid 0x%x)\n", |
1da177e4 LT |
923 | fid, vid); |
924 | return 0; | |
925 | } | |
926 | ||
2d06d8c4 | 927 | pr_debug("cpu %d, changing to fid 0x%x, vid 0x%x\n", |
1da177e4 | 928 | smp_processor_id(), fid, vid); |
1da177e4 LT |
929 | freqs.old = find_khz_freq_from_fid(data->currfid); |
930 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 931 | |
b43a7ffb VK |
932 | policy = cpufreq_cpu_get(smp_processor_id()); |
933 | cpufreq_cpu_put(policy); | |
934 | ||
8fec051e | 935 | cpufreq_freq_transition_begin(policy, &freqs); |
1da177e4 | 936 | res = transition_fid_vid(data, fid, vid); |
8fec051e | 937 | cpufreq_freq_transition_end(policy, &freqs, res); |
1f729e06 | 938 | |
1f729e06 DJ |
939 | return res; |
940 | } | |
941 | ||
6889125b TH |
942 | struct powernowk8_target_arg { |
943 | struct cpufreq_policy *pol; | |
9c0ebcf7 | 944 | unsigned newstate; |
6889125b TH |
945 | }; |
946 | ||
947 | static long powernowk8_target_fn(void *arg) | |
1da177e4 | 948 | { |
6889125b TH |
949 | struct powernowk8_target_arg *pta = arg; |
950 | struct cpufreq_policy *pol = pta->pol; | |
9c0ebcf7 | 951 | unsigned newstate = pta->newstate; |
2c6b8c03 | 952 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
953 | u32 checkfid; |
954 | u32 checkvid; | |
6889125b | 955 | int ret; |
1da177e4 | 956 | |
4211a303 JS |
957 | if (!data) |
958 | return -EINVAL; | |
959 | ||
9180053c AB |
960 | checkfid = data->currfid; |
961 | checkvid = data->currvid; | |
962 | ||
1da177e4 | 963 | if (pending_bit_stuck()) { |
e54173b4 | 964 | pr_err("failing targ, change pending bit set\n"); |
6889125b | 965 | return -EIO; |
1da177e4 LT |
966 | } |
967 | ||
9c0ebcf7 VK |
968 | pr_debug("targ: cpu %d, %d kHz, min %d, max %d\n", |
969 | pol->cpu, data->powernow_table[newstate].frequency, pol->min, | |
970 | pol->max); | |
1da177e4 | 971 | |
83844510 | 972 | if (query_current_values_with_pending_wait(data)) |
6889125b | 973 | return -EIO; |
1da177e4 | 974 | |
e1f0b8e9 | 975 | pr_debug("targ: curr fid 0x%x, vid 0x%x\n", |
e54173b4 | 976 | data->currfid, data->currvid); |
1da177e4 | 977 | |
e1f0b8e9 MG |
978 | if ((checkvid != data->currvid) || |
979 | (checkfid != data->currfid)) { | |
e54173b4 | 980 | pr_info("error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", |
e1f0b8e9 MG |
981 | checkfid, data->currfid, |
982 | checkvid, data->currvid); | |
1da177e4 LT |
983 | } |
984 | ||
14cc3e2b | 985 | mutex_lock(&fidvid_mutex); |
065b807c | 986 | |
1da177e4 LT |
987 | powernow_k8_acpi_pst_values(data, newstate); |
988 | ||
e1f0b8e9 MG |
989 | ret = transition_frequency_fidvid(data, newstate); |
990 | ||
1f729e06 | 991 | if (ret) { |
e54173b4 | 992 | pr_err("transition frequency failed\n"); |
14cc3e2b | 993 | mutex_unlock(&fidvid_mutex); |
6889125b | 994 | return 1; |
1da177e4 | 995 | } |
14cc3e2b | 996 | mutex_unlock(&fidvid_mutex); |
065b807c | 997 | |
e1f0b8e9 | 998 | pol->cur = find_khz_freq_from_fid(data->currfid); |
1da177e4 | 999 | |
6889125b TH |
1000 | return 0; |
1001 | } | |
1002 | ||
1003 | /* Driver entry point to switch to the target frequency */ | |
9c0ebcf7 | 1004 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned index) |
6889125b | 1005 | { |
9c0ebcf7 | 1006 | struct powernowk8_target_arg pta = { .pol = pol, .newstate = index }; |
6889125b | 1007 | |
e4df1cbc | 1008 | return work_on_cpu(pol->cpu, powernowk8_target_fn, &pta); |
1da177e4 LT |
1009 | } |
1010 | ||
1ff6e97f RR |
1011 | struct init_on_cpu { |
1012 | struct powernow_k8_data *data; | |
1013 | int rc; | |
1014 | }; | |
1015 | ||
2760984f | 1016 | static void powernowk8_cpu_init_on_cpu(void *_init_on_cpu) |
1ff6e97f RR |
1017 | { |
1018 | struct init_on_cpu *init_on_cpu = _init_on_cpu; | |
1019 | ||
1020 | if (pending_bit_stuck()) { | |
e54173b4 | 1021 | pr_err("failing init, change pending bit set\n"); |
1ff6e97f RR |
1022 | init_on_cpu->rc = -ENODEV; |
1023 | return; | |
1024 | } | |
1025 | ||
1026 | if (query_current_values_with_pending_wait(init_on_cpu->data)) { | |
1027 | init_on_cpu->rc = -ENODEV; | |
1028 | return; | |
1029 | } | |
1030 | ||
e1f0b8e9 | 1031 | fidvid_msr_init(); |
1ff6e97f RR |
1032 | |
1033 | init_on_cpu->rc = 0; | |
1034 | } | |
1035 | ||
e54173b4 SK |
1036 | #define MISSING_PSS_MSG \ |
1037 | FW_BUG "No compatible ACPI _PSS objects found.\n" \ | |
1038 | FW_BUG "First, make sure Cool'N'Quiet is enabled in the BIOS.\n" \ | |
1039 | FW_BUG "If that doesn't help, try upgrading your BIOS.\n" | |
56835e6c | 1040 | |
1da177e4 | 1041 | /* per CPU init entry point to the driver */ |
2760984f | 1042 | static int powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
1043 | { |
1044 | struct powernow_k8_data *data; | |
1ff6e97f | 1045 | struct init_on_cpu init_on_cpu; |
c3274763 | 1046 | int rc, cpu; |
1da177e4 | 1047 | |
1ff6e97f RR |
1048 | smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1); |
1049 | if (rc) | |
1da177e4 LT |
1050 | return -ENODEV; |
1051 | ||
d5b73cd8 | 1052 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
1da177e4 | 1053 | if (!data) { |
e54173b4 | 1054 | pr_err("unable to alloc powernow_k8_data"); |
1da177e4 LT |
1055 | return -ENOMEM; |
1056 | } | |
1da177e4 LT |
1057 | |
1058 | data->cpu = pol->cpu; | |
1059 | ||
a0abd520 | 1060 | if (powernow_k8_cpu_init_acpi(data)) { |
1da177e4 | 1061 | /* |
0d2eb44f | 1062 | * Use the PSB BIOS structure. This is only available on |
1da177e4 LT |
1063 | * an UP version, and is deprecated by AMD. |
1064 | */ | |
9ed059e1 | 1065 | if (num_online_cpus() != 1) { |
e54173b4 | 1066 | pr_err_once(MISSING_PSS_MSG); |
0cb8bc25 | 1067 | goto err_out; |
1da177e4 LT |
1068 | } |
1069 | if (pol->cpu != 0) { | |
e54173b4 | 1070 | pr_err(FW_BUG "No ACPI _PSS objects for CPU other than CPU0. Complain to your BIOS vendor.\n"); |
0cb8bc25 | 1071 | goto err_out; |
1da177e4 LT |
1072 | } |
1073 | rc = find_psb_table(data); | |
0cb8bc25 DJ |
1074 | if (rc) |
1075 | goto err_out; | |
1076 | ||
732553e5 ML |
1077 | /* Take a crude guess here. |
1078 | * That guess was in microseconds, so multiply with 1000 */ | |
1079 | pol->cpuinfo.transition_latency = ( | |
1080 | ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + | |
1081 | ((1 << data->irt) * 30)) * 1000; | |
1082 | } else /* ACPI _PSS objects available */ | |
1083 | pol->cpuinfo.transition_latency = get_transition_latency(data); | |
1da177e4 LT |
1084 | |
1085 | /* only run on specific CPU from here on */ | |
1ff6e97f RR |
1086 | init_on_cpu.data = data; |
1087 | smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu, | |
1088 | &init_on_cpu, 1); | |
1089 | rc = init_on_cpu.rc; | |
1090 | if (rc != 0) | |
1091 | goto err_out_exit_acpi; | |
1da177e4 | 1092 | |
e1f0b8e9 | 1093 | cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu)); |
835481d9 | 1094 | data->available_cores = pol->cpus; |
1da177e4 | 1095 | |
1da177e4 | 1096 | /* min/max the cpu is capable of */ |
b147405a | 1097 | if (cpufreq_table_validate_and_show(pol, data->powernow_table)) { |
e54173b4 | 1098 | pr_err(FW_BUG "invalid powernow_table\n"); |
1da177e4 LT |
1099 | powernow_k8_cpu_exit_acpi(data); |
1100 | kfree(data->powernow_table); | |
1101 | kfree(data); | |
1102 | return -EINVAL; | |
1103 | } | |
1104 | ||
e1f0b8e9 | 1105 | pr_debug("cpu_init done, current fid 0x%x, vid 0x%x\n", |
e54173b4 | 1106 | data->currfid, data->currvid); |
1da177e4 | 1107 | |
c3274763 SB |
1108 | /* Point all the CPUs in this policy to the same data */ |
1109 | for_each_cpu(cpu, pol->cpus) | |
1110 | per_cpu(powernow_data, cpu) = data; | |
1da177e4 LT |
1111 | |
1112 | return 0; | |
1113 | ||
1ff6e97f | 1114 | err_out_exit_acpi: |
1da177e4 LT |
1115 | powernow_k8_cpu_exit_acpi(data); |
1116 | ||
0cb8bc25 | 1117 | err_out: |
1da177e4 LT |
1118 | kfree(data); |
1119 | return -ENODEV; | |
1120 | } | |
1121 | ||
c0e61cb1 | 1122 | static int powernowk8_cpu_exit(struct cpufreq_policy *pol) |
1da177e4 | 1123 | { |
2c6b8c03 | 1124 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
c3274763 | 1125 | int cpu; |
1da177e4 LT |
1126 | |
1127 | if (!data) | |
1128 | return -EINVAL; | |
1129 | ||
1130 | powernow_k8_cpu_exit_acpi(data); | |
1131 | ||
1da177e4 LT |
1132 | kfree(data->powernow_table); |
1133 | kfree(data); | |
c3274763 SB |
1134 | for_each_cpu(cpu, pol->cpus) |
1135 | per_cpu(powernow_data, cpu) = NULL; | |
1da177e4 LT |
1136 | |
1137 | return 0; | |
1138 | } | |
1139 | ||
1ff6e97f RR |
1140 | static void query_values_on_cpu(void *_err) |
1141 | { | |
1142 | int *err = _err; | |
0a3aee0d | 1143 | struct powernow_k8_data *data = __this_cpu_read(powernow_data); |
1ff6e97f RR |
1144 | |
1145 | *err = query_current_values_with_pending_wait(data); | |
1146 | } | |
1147 | ||
0e64a0c9 | 1148 | static unsigned int powernowk8_get(unsigned int cpu) |
1da177e4 | 1149 | { |
e15bc455 | 1150 | struct powernow_k8_data *data = per_cpu(powernow_data, cpu); |
1da177e4 | 1151 | unsigned int khz = 0; |
1ff6e97f | 1152 | int err; |
eef5167e | 1153 | |
1154 | if (!data) | |
557a701c | 1155 | return 0; |
eef5167e | 1156 | |
1ff6e97f RR |
1157 | smp_call_function_single(cpu, query_values_on_cpu, &err, true); |
1158 | if (err) | |
1da177e4 LT |
1159 | goto out; |
1160 | ||
e1f0b8e9 | 1161 | khz = find_khz_freq_from_fid(data->currfid); |
58389a86 | 1162 | |
1da177e4 | 1163 | |
b9111b7b | 1164 | out: |
1da177e4 LT |
1165 | return khz; |
1166 | } | |
1167 | ||
221dee28 | 1168 | static struct cpufreq_driver cpufreq_amd64_driver = { |
7dbf694d | 1169 | .flags = CPUFREQ_ASYNC_NOTIFICATION, |
d63bd27f | 1170 | .verify = cpufreq_generic_frequency_table_verify, |
9c0ebcf7 | 1171 | .target_index = powernowk8_target, |
e2f74f35 TR |
1172 | .bios_limit = acpi_processor_get_bios_limit, |
1173 | .init = powernowk8_cpu_init, | |
ce2650d4 | 1174 | .exit = powernowk8_cpu_exit, |
e2f74f35 TR |
1175 | .get = powernowk8_get, |
1176 | .name = "powernow-k8", | |
d63bd27f | 1177 | .attr = cpufreq_generic_attr, |
1da177e4 LT |
1178 | }; |
1179 | ||
4827ea6e BP |
1180 | static void __request_acpi_cpufreq(void) |
1181 | { | |
1182 | const char *cur_drv, *drv = "acpi-cpufreq"; | |
1183 | ||
1184 | cur_drv = cpufreq_get_current_driver(); | |
1185 | if (!cur_drv) | |
1186 | goto request; | |
1187 | ||
1188 | if (strncmp(cur_drv, drv, min_t(size_t, strlen(cur_drv), strlen(drv)))) | |
e54173b4 | 1189 | pr_warn("WTF driver: %s\n", cur_drv); |
4827ea6e BP |
1190 | |
1191 | return; | |
1192 | ||
1193 | request: | |
e54173b4 | 1194 | pr_warn("This CPU is not supported anymore, using acpi-cpufreq instead.\n"); |
4827ea6e BP |
1195 | request_module(drv); |
1196 | } | |
1197 | ||
1da177e4 | 1198 | /* driver entry point for init */ |
2760984f | 1199 | static int powernowk8_init(void) |
1da177e4 | 1200 | { |
e1f0b8e9 | 1201 | unsigned int i, supported_cpus = 0; |
c0939e46 | 1202 | int ret; |
1da177e4 | 1203 | |
e1f0b8e9 | 1204 | if (static_cpu_has(X86_FEATURE_HW_PSTATE)) { |
4827ea6e | 1205 | __request_acpi_cpufreq(); |
fa8031ae | 1206 | return -ENODEV; |
e1f0b8e9 | 1207 | } |
fa8031ae | 1208 | |
fa8031ae AK |
1209 | if (!x86_match_cpu(powernow_k8_ids)) |
1210 | return -ENODEV; | |
1211 | ||
c0939e46 | 1212 | get_online_cpus(); |
a7201156 | 1213 | for_each_online_cpu(i) { |
c0939e46 BP |
1214 | smp_call_function_single(i, check_supported_cpu, &ret, 1); |
1215 | if (!ret) | |
1da177e4 LT |
1216 | supported_cpus++; |
1217 | } | |
1218 | ||
c0939e46 BP |
1219 | if (supported_cpus != num_online_cpus()) { |
1220 | put_online_cpus(); | |
73860c6b | 1221 | return -ENODEV; |
c0939e46 BP |
1222 | } |
1223 | put_online_cpus(); | |
73860c6b | 1224 | |
c0939e46 BP |
1225 | ret = cpufreq_register_driver(&cpufreq_amd64_driver); |
1226 | if (ret) | |
1227 | return ret; | |
73860c6b | 1228 | |
e54173b4 | 1229 | pr_info("Found %d %s (%d cpu cores) (" VERSION ")\n", |
c0939e46 | 1230 | num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus); |
73860c6b | 1231 | |
c0939e46 | 1232 | return ret; |
1da177e4 LT |
1233 | } |
1234 | ||
1235 | /* driver entry point for term */ | |
1236 | static void __exit powernowk8_exit(void) | |
1237 | { | |
2d06d8c4 | 1238 | pr_debug("exit\n"); |
1da177e4 LT |
1239 | |
1240 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1241 | } | |
1242 | ||
e54173b4 SK |
1243 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com>"); |
1244 | MODULE_AUTHOR("Mark Langsdorf <mark.langsdorf@amd.com>"); | |
1da177e4 LT |
1245 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1246 | MODULE_LICENSE("GPL"); | |
1247 | ||
1248 | late_initcall(powernowk8_init); | |
1249 | module_exit(powernowk8_exit); |