crypto: mxc-scc - add basic driver for the MXC SCC
[deliverable/linux.git] / drivers / crypto / Kconfig
CommitLineData
b511431d
JE
1
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
06bfb7eb
JE
5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
b511431d
JE
10
11if CRYPTO_HW
1da177e4
LT
12
13config CRYPTO_DEV_PADLOCK
d158325e 14 tristate "Support for VIA PadLock ACE"
2f817418 15 depends on X86 && !UML
1da177e4
LT
16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
1191f0a4
ML
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
1da177e4
LT
21
22 The instructions are used only when the CPU supports them.
5644bda5
ML
23 Otherwise software encryption is used.
24
1da177e4 25config CRYPTO_DEV_PADLOCK_AES
1191f0a4 26 tristate "PadLock driver for AES algorithm"
1da177e4 27 depends on CRYPTO_DEV_PADLOCK
28ce728a 28 select CRYPTO_BLKCIPHER
7dc748e4 29 select CRYPTO_AES
1da177e4
LT
30 help
31 Use VIA PadLock for AES algorithm.
32
1191f0a4
ML
33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
4737f097 36 called padlock-aes.
1191f0a4 37
6c833275
ML
38config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
bbbee467 41 select CRYPTO_HASH
6c833275
ML
42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
6c833275
ML
44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
4737f097 50 called padlock-sha.
6c833275 51
9fe757b0
JC
52config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
f6259dea 54 depends on X86_32 && PCI
9fe757b0
JC
55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
9fe757b0
JC
57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
3dde6ad8 59 engine for the CryptoAPI AES algorithm.
9fe757b0
JC
60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
61d48c2c
MS
64config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
2f7c8bd6 67 select HW_RANDOM
61d48c2c
MS
68 help
69 Select this option if you want to use a PCI-attached cryptographic
70 adapter like:
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
cf2d007b
HD
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
61d48c2c 78
3f5615e0
JG
79config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
81 depends on S390
563f346d 82 select CRYPTO_HASH
3f5615e0
JG
83 help
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
d393d9b8
JG
87 It is available as of z990.
88
3f5615e0
JG
89config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
91 depends on S390
563f346d 92 select CRYPTO_HASH
3f5615e0
JG
93 help
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
96
d393d9b8 97 It is available as of z9.
3f5615e0 98
291dc7c0 99config CRYPTO_SHA512_S390
4e2c6d7f 100 tristate "SHA384 and SHA512 digest algorithm"
291dc7c0 101 depends on S390
563f346d 102 select CRYPTO_HASH
291dc7c0
JG
103 help
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
106
d393d9b8 107 It is available as of z10.
291dc7c0 108
3f5615e0
JG
109config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
111 depends on S390
112 select CRYPTO_ALGAPI
113 select CRYPTO_BLKCIPHER
63291d40 114 select CRYPTO_DES
3f5615e0 115 help
0200f3ec 116 This is the s390 hardware accelerated implementation of the
3f5615e0
JG
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
0200f3ec
GS
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
121
3f5615e0
JG
122config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
127 help
128 This is the s390 hardware accelerated implementation of the
99d97222
GS
129 AES cipher algorithms (FIPS-197).
130
131 As of z9 the ECB and CBC modes are hardware accelerated
132 for 128 bit keys.
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
0200f3ec
GS
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
99d97222 137 512 bit keys.
3f5615e0
JG
138
139config S390_PRNG
140 tristate "Pseudo random number generator device driver"
141 depends on S390
142 default "m"
143 help
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
d393d9b8
JG
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
149
150 It is available as of z9.
3f5615e0 151
df1309ce
GS
152config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
154 depends on S390
155 select CRYPTO_HASH
156 help
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160 It is available as of z196.
161
85a7f0ac
SAS
162config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
85a7f0ac 165 select CRYPTO_AES
596103cf 166 select CRYPTO_BLKCIPHER
1ebfefcf 167 select CRYPTO_HASH
51b44fc8 168 select SRAM
85a7f0ac
SAS
169 help
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
173
174 Currently the driver supports AES in ECB and CBC mode without DMA.
175
f63601fd
BB
176config CRYPTO_DEV_MARVELL_CESA
177 tristate "New Marvell's Cryptographic Engine driver"
fe55dfdc 178 depends on PLAT_ORION || ARCH_MVEBU
f63601fd
BB
179 select CRYPTO_AES
180 select CRYPTO_DES
181 select CRYPTO_BLKCIPHER
182 select CRYPTO_HASH
183 select SRAM
184 help
185 This driver allows you to utilize the Cryptographic Engines and
186 Security Accelerator (CESA) which can be found on the Armada 370.
db509a45 187 This driver supports CPU offload through DMA transfers.
f63601fd
BB
188
189 This driver is aimed at replacing the mv_cesa driver. This will only
190 happen once it has received proper testing.
191
0a625fd2
DM
192config CRYPTO_DEV_NIAGARA2
193 tristate "Niagara2 Stream Processing Unit driver"
50e78161 194 select CRYPTO_DES
596103cf
HX
195 select CRYPTO_BLKCIPHER
196 select CRYPTO_HASH
8054b800
LC
197 select CRYPTO_MD5
198 select CRYPTO_SHA1
199 select CRYPTO_SHA256
0a625fd2
DM
200 depends on SPARC64
201 help
202 Each core of a Niagara2 processor contains a Stream
203 Processing Unit, which itself contains several cryptographic
204 sub-units. One set provides the Modular Arithmetic Unit,
205 used for SSL offload. The other set provides the Cipher
206 Group, which can perform encryption, decryption, hashing,
207 checksumming, and raw copies.
208
f7d0561e
EP
209config CRYPTO_DEV_HIFN_795X
210 tristate "Driver HIFN 795x crypto accelerator chips"
c3041f9c 211 select CRYPTO_DES
653ebd9c 212 select CRYPTO_BLKCIPHER
946fef4e 213 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
2707b937 214 depends on PCI
75b76625 215 depends on !ARCH_DMA_ADDR_T_64BIT
f7d0561e
EP
216 help
217 This option allows you to have support for HIFN 795x crypto adapters.
218
946fef4e
HX
219config CRYPTO_DEV_HIFN_795X_RNG
220 bool "HIFN 795x random number generator"
221 depends on CRYPTO_DEV_HIFN_795X
222 help
223 Select this option if you want to enable the random number generator
224 on the HIFN 795x crypto adapters.
f7d0561e 225
8e8ec596
KP
226source drivers/crypto/caam/Kconfig
227
9c4a7965
KP
228config CRYPTO_DEV_TALITOS
229 tristate "Talitos Freescale Security Engine (SEC)"
596103cf 230 select CRYPTO_AEAD
9c4a7965 231 select CRYPTO_AUTHENC
596103cf
HX
232 select CRYPTO_BLKCIPHER
233 select CRYPTO_HASH
9c4a7965
KP
234 select HW_RANDOM
235 depends on FSL_SOC
236 help
237 Say 'Y' here to use the Freescale Security Engine (SEC)
238 to offload cryptographic algorithm computation.
239
240 The Freescale SEC is present on PowerQUICC 'E' processors, such
241 as the MPC8349E and MPC8548E.
242
243 To compile this driver as a module, choose M here: the module
244 will be called talitos.
245
5b841a65
LC
246config CRYPTO_DEV_TALITOS1
247 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
248 depends on CRYPTO_DEV_TALITOS
249 depends on PPC_8xx || PPC_82xx
250 default y
251 help
252 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
253 found on MPC82xx or the Freescale Security Engine (SEC Lite)
254 version 1.2 found on MPC8xx
255
256config CRYPTO_DEV_TALITOS2
257 bool "SEC2+ (SEC version 2.0 or upper)"
258 depends on CRYPTO_DEV_TALITOS
259 default y if !PPC_8xx
260 help
261 Say 'Y' here to use the Freescale Security Engine (SEC)
262 version 2 and following as found on MPC83xx, MPC85xx, etc ...
263
81bef015
CH
264config CRYPTO_DEV_IXP4XX
265 tristate "Driver for IXP4xx crypto hardware acceleration"
9665c52b 266 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
81bef015 267 select CRYPTO_DES
596103cf 268 select CRYPTO_AEAD
090657e4 269 select CRYPTO_AUTHENC
81bef015
CH
270 select CRYPTO_BLKCIPHER
271 help
272 Driver for the IXP4xx NPE crypto engine.
273
049359d6
JH
274config CRYPTO_DEV_PPC4XX
275 tristate "Driver AMCC PPC4xx crypto accelerator"
276 depends on PPC && 4xx
277 select CRYPTO_HASH
049359d6
JH
278 select CRYPTO_BLKCIPHER
279 help
280 This option allows you to have support for AMCC crypto acceleration.
281
8628e7c8 282config CRYPTO_DEV_OMAP_SHAM
eaef7e3f
LV
283 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
284 depends on ARCH_OMAP2PLUS
8628e7c8
DK
285 select CRYPTO_SHA1
286 select CRYPTO_MD5
eaef7e3f
LV
287 select CRYPTO_SHA256
288 select CRYPTO_SHA512
289 select CRYPTO_HMAC
8628e7c8 290 help
eaef7e3f
LV
291 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
292 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
8628e7c8 293
537559a5
DK
294config CRYPTO_DEV_OMAP_AES
295 tristate "Support for OMAP AES hw engine"
1bbf6437 296 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
537559a5 297 select CRYPTO_AES
596103cf 298 select CRYPTO_BLKCIPHER
0529900a 299 select CRYPTO_ENGINE
537559a5
DK
300 help
301 OMAP processors have AES module accelerator. Select this if you
302 want to use the OMAP module for AES algorithms.
303
701d0f19 304config CRYPTO_DEV_OMAP_DES
97ee7ed3 305 tristate "Support for OMAP DES/3DES hw engine"
701d0f19
JF
306 depends on ARCH_OMAP2PLUS
307 select CRYPTO_DES
596103cf 308 select CRYPTO_BLKCIPHER
701d0f19
JF
309 help
310 OMAP processors have DES/3DES module accelerator. Select this if you
311 want to use the OMAP module for DES and 3DES algorithms. Currently
97ee7ed3
PM
312 the ECB and CBC modes of operation are supported by the driver. Also
313 accesses made on unaligned boundaries are supported.
701d0f19 314
ce921368
JI
315config CRYPTO_DEV_PICOXCELL
316 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
fad8fa47 317 depends on ARCH_PICOXCELL && HAVE_CLK
596103cf 318 select CRYPTO_AEAD
ce921368
JI
319 select CRYPTO_AES
320 select CRYPTO_AUTHENC
596103cf 321 select CRYPTO_BLKCIPHER
ce921368
JI
322 select CRYPTO_DES
323 select CRYPTO_CBC
324 select CRYPTO_ECB
325 select CRYPTO_SEQIV
326 help
327 This option enables support for the hardware offload engines in the
328 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
329 and for 3gpp Layer 2 ciphering support.
330
331 Saying m here will build a module named pipcoxcell_crypto.
332
5de88752
JM
333config CRYPTO_DEV_SAHARA
334 tristate "Support for SAHARA crypto accelerator"
74d24d83 335 depends on ARCH_MXC && OF
5de88752
JM
336 select CRYPTO_BLKCIPHER
337 select CRYPTO_AES
338 select CRYPTO_ECB
339 help
340 This option enables support for the SAHARA HW crypto accelerator
341 found in some Freescale i.MX chips.
342
d293b640
ST
343config CRYPTO_DEV_MXC_SCC
344 tristate "Support for Freescale Security Controller (SCC)"
345 depends on ARCH_MXC && OF
346 select CRYPTO_BLKCIPHER
347 select CRYPTO_DES
348 help
349 This option enables support for the Security Controller (SCC)
350 found in Freescale i.MX25 chips.
351
a49e490c 352config CRYPTO_DEV_S5P
e922e96f 353 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
dc1d9dee
KK
354 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
355 depends on HAS_IOMEM && HAS_DMA
a49e490c 356 select CRYPTO_AES
a49e490c
VZ
357 select CRYPTO_BLKCIPHER
358 help
359 This option allows you to have support for S5P crypto acceleration.
e922e96f 360 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
a49e490c
VZ
361 algorithms execution.
362
aef7b31c 363config CRYPTO_DEV_NX
7011a122
DS
364 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
365 depends on PPC64
aef7b31c 366 help
7011a122
DS
367 This enables support for the NX hardware cryptographic accelerator
368 coprocessor that is in IBM PowerPC P7+ or later processors. This
369 does not actually enable any drivers, it only allows you to select
370 which acceleration type (encryption and/or compression) to enable.
322cacce
SJ
371
372if CRYPTO_DEV_NX
373 source "drivers/crypto/nx/Kconfig"
374endif
aef7b31c 375
2789c08f
AW
376config CRYPTO_DEV_UX500
377 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
378 depends on ARCH_U8500
2789c08f
AW
379 help
380 Driver for ST-Ericsson UX500 crypto engine.
381
382if CRYPTO_DEV_UX500
383 source "drivers/crypto/ux500/Kconfig"
384endif # if CRYPTO_DEV_UX500
385
b8840098
SZ
386config CRYPTO_DEV_BFIN_CRC
387 tristate "Support for Blackfin CRC hardware"
388 depends on BF60x
389 help
390 Newer Blackfin processors have CRC hardware. Select this if you
391 want to use the Blackfin CRC module.
392
bd3c7b5c
NR
393config CRYPTO_DEV_ATMEL_AES
394 tristate "Support for Atmel AES hw accelerator"
cbafd643 395 depends on HAS_DMA
56b85c9d 396 depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
bd3c7b5c 397 select CRYPTO_AES
d4419548 398 select CRYPTO_AEAD
bd3c7b5c 399 select CRYPTO_BLKCIPHER
bd3c7b5c
NR
400 help
401 Some Atmel processors have AES hw accelerator.
402 Select this if you want to use the Atmel module for
403 AES algorithms.
404
405 To compile this driver as a module, choose M here: the module
406 will be called atmel-aes.
407
13802005
NR
408config CRYPTO_DEV_ATMEL_TDES
409 tristate "Support for Atmel DES/TDES hw accelerator"
410 depends on ARCH_AT91
411 select CRYPTO_DES
13802005
NR
412 select CRYPTO_BLKCIPHER
413 help
414 Some Atmel processors have DES/TDES hw accelerator.
415 Select this if you want to use the Atmel module for
416 DES/TDES algorithms.
417
418 To compile this driver as a module, choose M here: the module
419 will be called atmel-tdes.
420
ebc82efa 421config CRYPTO_DEV_ATMEL_SHA
d4905b38 422 tristate "Support for Atmel SHA hw accelerator"
ebc82efa 423 depends on ARCH_AT91
596103cf 424 select CRYPTO_HASH
ebc82efa 425 help
d4905b38
NR
426 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
427 hw accelerator.
ebc82efa 428 Select this if you want to use the Atmel module for
d4905b38 429 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
ebc82efa
NR
430
431 To compile this driver as a module, choose M here: the module
432 will be called atmel-sha.
433
f1147660
TL
434config CRYPTO_DEV_CCP
435 bool "Support for AMD Cryptographic Coprocessor"
6c506343 436 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
f1147660 437 help
21dc9e8f 438 The AMD Cryptographic Coprocessor provides hardware offload support
f1147660
TL
439 for encryption, hashing and related operations.
440
441if CRYPTO_DEV_CCP
442 source "drivers/crypto/ccp/Kconfig"
443endif
444
15b59e7c
MV
445config CRYPTO_DEV_MXS_DCP
446 tristate "Support for Freescale MXS DCP"
a2712e6c 447 depends on (ARCH_MXS || ARCH_MXC)
dc97fa02 448 select STMP_DEVICE
15b59e7c
MV
449 select CRYPTO_CBC
450 select CRYPTO_ECB
451 select CRYPTO_AES
452 select CRYPTO_BLKCIPHER
596103cf 453 select CRYPTO_HASH
15b59e7c
MV
454 help
455 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
456 co-processor on the die.
457
458 To compile this driver as a module, choose M here: the module
459 will be called mxs-dcp.
460
cea4001a 461source "drivers/crypto/qat/Kconfig"
c672752d
SV
462
463config CRYPTO_DEV_QCE
464 tristate "Qualcomm crypto engine accelerator"
71d932d9 465 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
c672752d
SV
466 select CRYPTO_AES
467 select CRYPTO_DES
468 select CRYPTO_ECB
469 select CRYPTO_CBC
470 select CRYPTO_XTS
471 select CRYPTO_CTR
c672752d
SV
472 select CRYPTO_BLKCIPHER
473 help
474 This driver supports Qualcomm crypto engine accelerator
475 hardware. To compile this driver as a module, choose M here. The
476 module will be called qcrypto.
477
d2e3ae6f
LB
478config CRYPTO_DEV_VMX
479 bool "Support for VMX cryptographic acceleration instructions"
f1ab4287 480 depends on PPC64 && VSX
d2e3ae6f
LB
481 help
482 Support for VMX cryptographic acceleration instructions.
483
484source "drivers/crypto/vmx/Kconfig"
485
d358f1ab 486config CRYPTO_DEV_IMGTEC_HASH
d358f1ab 487 tristate "Imagination Technologies hardware hash accelerator"
8c98ebd7
GU
488 depends on MIPS || COMPILE_TEST
489 depends on HAS_DMA
d358f1ab
JH
490 select CRYPTO_MD5
491 select CRYPTO_SHA1
d358f1ab
JH
492 select CRYPTO_SHA256
493 select CRYPTO_HASH
494 help
495 This driver interfaces with the Imagination Technologies
496 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
497 hashing algorithms.
498
6298e948
LC
499config CRYPTO_DEV_SUN4I_SS
500 tristate "Support for Allwinner Security System cryptographic accelerator"
f823ab93 501 depends on ARCH_SUNXI && !64BIT
6298e948
LC
502 select CRYPTO_MD5
503 select CRYPTO_SHA1
504 select CRYPTO_AES
505 select CRYPTO_DES
506 select CRYPTO_BLKCIPHER
507 help
508 Some Allwinner SoC have a crypto accelerator named
509 Security System. Select this if you want to use it.
510 The Security System handle AES/DES/3DES ciphers in CBC mode
511 and SHA1 and MD5 hash algorithms.
512
513 To compile this driver as a module, choose M here: the module
514 will be called sun4i-ss.
515
433cd2c6
ZW
516config CRYPTO_DEV_ROCKCHIP
517 tristate "Rockchip's Cryptographic Engine driver"
518 depends on OF && ARCH_ROCKCHIP
519 select CRYPTO_AES
520 select CRYPTO_DES
bfd927ff
ZW
521 select CRYPTO_MD5
522 select CRYPTO_SHA1
523 select CRYPTO_SHA256
524 select CRYPTO_HASH
433cd2c6
ZW
525 select CRYPTO_BLKCIPHER
526
527 help
528 This driver interfaces with the hardware crypto accelerator.
529 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
530
b511431d 531endif # CRYPTO_HW
This page took 0.894125 seconds and 5 git commands to generate.