Commit | Line | Data |
---|---|---|
b4b7e67c TS |
1 | /* |
2 | This file is provided under a dual BSD/GPLv2 license. When using or | |
3 | redistributing this file, you may do so under either license. | |
4 | ||
5 | GPL LICENSE SUMMARY | |
6 | Copyright(c) 2014 Intel Corporation. | |
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of version 2 of the GNU General Public License as | |
9 | published by the Free Software Foundation. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but | |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | General Public License for more details. | |
15 | ||
16 | Contact Information: | |
17 | qat-linux@intel.com | |
18 | ||
19 | BSD LICENSE | |
20 | Copyright(c) 2014 Intel Corporation. | |
21 | Redistribution and use in source and binary forms, with or without | |
22 | modification, are permitted provided that the following conditions | |
23 | are met: | |
24 | ||
25 | * Redistributions of source code must retain the above copyright | |
26 | notice, this list of conditions and the following disclaimer. | |
27 | * Redistributions in binary form must reproduce the above copyright | |
28 | notice, this list of conditions and the following disclaimer in | |
29 | the documentation and/or other materials provided with the | |
30 | distribution. | |
31 | * Neither the name of Intel Corporation nor the names of its | |
32 | contributors may be used to endorse or promote products derived | |
33 | from this software without specific prior written permission. | |
34 | ||
35 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
36 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
37 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
38 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
39 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
40 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
41 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
42 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
43 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
44 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
45 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
46 | */ | |
47 | #ifndef __ICP_QAT_UCLO_H__ | |
48 | #define __ICP_QAT_UCLO_H__ | |
49 | ||
50 | #define ICP_QAT_AC_C_CPU_TYPE 0x00400000 | |
51 | #define ICP_QAT_UCLO_MAX_AE 12 | |
52 | #define ICP_QAT_UCLO_MAX_CTX 8 | |
53 | #define ICP_QAT_UCLO_MAX_UIMAGE (ICP_QAT_UCLO_MAX_AE * ICP_QAT_UCLO_MAX_CTX) | |
54 | #define ICP_QAT_UCLO_MAX_USTORE 0x4000 | |
55 | #define ICP_QAT_UCLO_MAX_XFER_REG 128 | |
56 | #define ICP_QAT_UCLO_MAX_GPR_REG 128 | |
57 | #define ICP_QAT_UCLO_MAX_NN_REG 128 | |
58 | #define ICP_QAT_UCLO_MAX_LMEM_REG 1024 | |
59 | #define ICP_QAT_UCLO_AE_ALL_CTX 0xff | |
60 | #define ICP_QAT_UOF_OBJID_LEN 8 | |
61 | #define ICP_QAT_UOF_FID 0xc6c2 | |
62 | #define ICP_QAT_UOF_MAJVER 0x4 | |
63 | #define ICP_QAT_UOF_MINVER 0x11 | |
64 | #define ICP_QAT_UOF_NN_MODE_NOTCARE 0xff | |
65 | #define ICP_QAT_UOF_OBJS "UOF_OBJS" | |
66 | #define ICP_QAT_UOF_STRT "UOF_STRT" | |
67 | #define ICP_QAT_UOF_GTID "UOF_GTID" | |
68 | #define ICP_QAT_UOF_IMAG "UOF_IMAG" | |
69 | #define ICP_QAT_UOF_IMEM "UOF_IMEM" | |
70 | #define ICP_QAT_UOF_MSEG "UOF_MSEG" | |
71 | #define ICP_QAT_UOF_LOCAL_SCOPE 1 | |
72 | #define ICP_QAT_UOF_INIT_EXPR 0 | |
73 | #define ICP_QAT_UOF_INIT_REG 1 | |
74 | #define ICP_QAT_UOF_INIT_REG_CTX 2 | |
75 | #define ICP_QAT_UOF_INIT_EXPR_ENDIAN_SWAP 3 | |
76 | ||
77 | #define ICP_QAT_CTX_MODE(ae_mode) ((ae_mode) & 0xf) | |
78 | #define ICP_QAT_NN_MODE(ae_mode) (((ae_mode) >> 0x4) & 0xf) | |
79 | #define ICP_QAT_SHARED_USTORE_MODE(ae_mode) (((ae_mode) >> 0xb) & 0x1) | |
80 | #define RELOADABLE_CTX_SHARED_MODE(ae_mode) (((ae_mode) >> 0xc) & 0x1) | |
81 | ||
82 | #define ICP_QAT_LOC_MEM0_MODE(ae_mode) (((ae_mode) >> 0x8) & 0x1) | |
83 | #define ICP_QAT_LOC_MEM1_MODE(ae_mode) (((ae_mode) >> 0x9) & 0x1) | |
84 | ||
85 | enum icp_qat_uof_mem_region { | |
86 | ICP_QAT_UOF_SRAM_REGION = 0x0, | |
87 | ICP_QAT_UOF_LMEM_REGION = 0x3, | |
88 | ICP_QAT_UOF_UMEM_REGION = 0x5 | |
89 | }; | |
90 | ||
91 | enum icp_qat_uof_regtype { | |
92 | ICP_NO_DEST, | |
93 | ICP_GPA_REL, | |
94 | ICP_GPA_ABS, | |
95 | ICP_GPB_REL, | |
96 | ICP_GPB_ABS, | |
97 | ICP_SR_REL, | |
98 | ICP_SR_RD_REL, | |
99 | ICP_SR_WR_REL, | |
100 | ICP_SR_ABS, | |
101 | ICP_SR_RD_ABS, | |
102 | ICP_SR_WR_ABS, | |
103 | ICP_DR_REL, | |
104 | ICP_DR_RD_REL, | |
105 | ICP_DR_WR_REL, | |
106 | ICP_DR_ABS, | |
107 | ICP_DR_RD_ABS, | |
108 | ICP_DR_WR_ABS, | |
109 | ICP_LMEM, | |
110 | ICP_LMEM0, | |
111 | ICP_LMEM1, | |
112 | ICP_NEIGH_REL, | |
113 | }; | |
114 | ||
115 | struct icp_qat_uclo_page { | |
116 | struct icp_qat_uclo_encap_page *encap_page; | |
117 | struct icp_qat_uclo_region *region; | |
118 | unsigned int flags; | |
119 | }; | |
120 | ||
121 | struct icp_qat_uclo_region { | |
122 | struct icp_qat_uclo_page *loaded; | |
123 | struct icp_qat_uclo_page *page; | |
124 | }; | |
125 | ||
126 | struct icp_qat_uclo_aeslice { | |
8c1f8e3b | 127 | struct icp_qat_uclo_region *region; |
b4b7e67c TS |
128 | struct icp_qat_uclo_page *page; |
129 | struct icp_qat_uclo_page *cur_page[ICP_QAT_UCLO_MAX_CTX]; | |
130 | struct icp_qat_uclo_encapme *encap_image; | |
131 | unsigned int ctx_mask_assigned; | |
132 | unsigned int new_uaddr[ICP_QAT_UCLO_MAX_CTX]; | |
133 | }; | |
134 | ||
135 | struct icp_qat_uclo_aedata { | |
136 | unsigned int slice_num; | |
137 | unsigned int eff_ustore_size; | |
138 | struct icp_qat_uclo_aeslice ae_slices[ICP_QAT_UCLO_MAX_CTX]; | |
139 | }; | |
140 | ||
141 | struct icp_qat_uof_encap_obj { | |
142 | char *beg_uof; | |
143 | struct icp_qat_uof_objhdr *obj_hdr; | |
144 | struct icp_qat_uof_chunkhdr *chunk_hdr; | |
145 | struct icp_qat_uof_varmem_seg *var_mem_seg; | |
146 | }; | |
147 | ||
148 | struct icp_qat_uclo_encap_uwblock { | |
149 | unsigned int start_addr; | |
150 | unsigned int words_num; | |
151 | uint64_t micro_words; | |
152 | }; | |
153 | ||
154 | struct icp_qat_uclo_encap_page { | |
155 | unsigned int def_page; | |
156 | unsigned int page_region; | |
157 | unsigned int beg_addr_v; | |
158 | unsigned int beg_addr_p; | |
159 | unsigned int micro_words_num; | |
160 | unsigned int uwblock_num; | |
161 | struct icp_qat_uclo_encap_uwblock *uwblock; | |
162 | }; | |
163 | ||
164 | struct icp_qat_uclo_encapme { | |
165 | struct icp_qat_uof_image *img_ptr; | |
166 | struct icp_qat_uclo_encap_page *page; | |
167 | unsigned int ae_reg_num; | |
168 | struct icp_qat_uof_ae_reg *ae_reg; | |
169 | unsigned int init_regsym_num; | |
170 | struct icp_qat_uof_init_regsym *init_regsym; | |
171 | unsigned int sbreak_num; | |
172 | struct icp_qat_uof_sbreak *sbreak; | |
173 | unsigned int uwords_num; | |
174 | }; | |
175 | ||
176 | struct icp_qat_uclo_init_mem_table { | |
177 | unsigned int entry_num; | |
178 | struct icp_qat_uof_initmem *init_mem; | |
179 | }; | |
180 | ||
181 | struct icp_qat_uclo_objhdr { | |
182 | char *file_buff; | |
183 | unsigned int checksum; | |
184 | unsigned int size; | |
185 | }; | |
186 | ||
187 | struct icp_qat_uof_strtable { | |
188 | unsigned int table_len; | |
189 | unsigned int reserved; | |
190 | uint64_t strings; | |
191 | }; | |
192 | ||
193 | struct icp_qat_uclo_objhandle { | |
194 | unsigned int prod_type; | |
195 | unsigned int prod_rev; | |
196 | struct icp_qat_uclo_objhdr *obj_hdr; | |
197 | struct icp_qat_uof_encap_obj encap_uof_obj; | |
198 | struct icp_qat_uof_strtable str_table; | |
199 | struct icp_qat_uclo_encapme ae_uimage[ICP_QAT_UCLO_MAX_UIMAGE]; | |
200 | struct icp_qat_uclo_aedata ae_data[ICP_QAT_UCLO_MAX_AE]; | |
201 | struct icp_qat_uclo_init_mem_table init_mem_tab; | |
202 | struct icp_qat_uof_batch_init *lm_init_tab[ICP_QAT_UCLO_MAX_AE]; | |
203 | struct icp_qat_uof_batch_init *umem_init_tab[ICP_QAT_UCLO_MAX_AE]; | |
204 | int uimage_num; | |
205 | int uword_in_bytes; | |
206 | int global_inited; | |
207 | unsigned int ae_num; | |
208 | unsigned int ustore_phy_size; | |
209 | void *obj_buf; | |
210 | uint64_t *uword_buf; | |
211 | }; | |
212 | ||
213 | struct icp_qat_uof_uword_block { | |
214 | unsigned int start_addr; | |
215 | unsigned int words_num; | |
216 | unsigned int uword_offset; | |
217 | unsigned int reserved; | |
218 | }; | |
219 | ||
220 | struct icp_qat_uof_filehdr { | |
221 | unsigned short file_id; | |
222 | unsigned short reserved1; | |
223 | char min_ver; | |
224 | char maj_ver; | |
225 | unsigned short reserved2; | |
226 | unsigned short max_chunks; | |
227 | unsigned short num_chunks; | |
228 | }; | |
229 | ||
230 | struct icp_qat_uof_filechunkhdr { | |
231 | char chunk_id[ICP_QAT_UOF_OBJID_LEN]; | |
232 | unsigned int checksum; | |
233 | unsigned int offset; | |
234 | unsigned int size; | |
235 | }; | |
236 | ||
237 | struct icp_qat_uof_objhdr { | |
238 | unsigned int cpu_type; | |
239 | unsigned short min_cpu_ver; | |
240 | unsigned short max_cpu_ver; | |
241 | short max_chunks; | |
242 | short num_chunks; | |
243 | unsigned int reserved1; | |
244 | unsigned int reserved2; | |
245 | }; | |
246 | ||
247 | struct icp_qat_uof_chunkhdr { | |
248 | char chunk_id[ICP_QAT_UOF_OBJID_LEN]; | |
249 | unsigned int offset; | |
250 | unsigned int size; | |
251 | }; | |
252 | ||
253 | struct icp_qat_uof_memvar_attr { | |
254 | unsigned int offset_in_byte; | |
255 | unsigned int value; | |
256 | }; | |
257 | ||
258 | struct icp_qat_uof_initmem { | |
259 | unsigned int sym_name; | |
260 | char region; | |
261 | char scope; | |
262 | unsigned short reserved1; | |
263 | unsigned int addr; | |
264 | unsigned int num_in_bytes; | |
265 | unsigned int val_attr_num; | |
266 | }; | |
267 | ||
268 | struct icp_qat_uof_init_regsym { | |
269 | unsigned int sym_name; | |
270 | char init_type; | |
271 | char value_type; | |
272 | char reg_type; | |
273 | unsigned char ctx; | |
274 | unsigned int reg_addr; | |
275 | unsigned int value; | |
276 | }; | |
277 | ||
278 | struct icp_qat_uof_varmem_seg { | |
279 | unsigned int sram_base; | |
280 | unsigned int sram_size; | |
281 | unsigned int sram_alignment; | |
282 | unsigned int sdram_base; | |
283 | unsigned int sdram_size; | |
284 | unsigned int sdram_alignment; | |
285 | unsigned int sdram1_base; | |
286 | unsigned int sdram1_size; | |
287 | unsigned int sdram1_alignment; | |
288 | unsigned int scratch_base; | |
289 | unsigned int scratch_size; | |
290 | unsigned int scratch_alignment; | |
291 | }; | |
292 | ||
293 | struct icp_qat_uof_gtid { | |
294 | char tool_id[ICP_QAT_UOF_OBJID_LEN]; | |
295 | int tool_ver; | |
296 | unsigned int reserved1; | |
297 | unsigned int reserved2; | |
298 | }; | |
299 | ||
300 | struct icp_qat_uof_sbreak { | |
301 | unsigned int page_num; | |
302 | unsigned int virt_uaddr; | |
303 | unsigned char sbreak_type; | |
304 | unsigned char reg_type; | |
305 | unsigned short reserved1; | |
306 | unsigned int addr_offset; | |
307 | unsigned int reg_addr; | |
308 | }; | |
309 | ||
310 | struct icp_qat_uof_code_page { | |
311 | unsigned int page_region; | |
312 | unsigned int page_num; | |
313 | unsigned char def_page; | |
314 | unsigned char reserved2; | |
315 | unsigned short reserved1; | |
316 | unsigned int beg_addr_v; | |
317 | unsigned int beg_addr_p; | |
318 | unsigned int neigh_reg_tab_offset; | |
319 | unsigned int uc_var_tab_offset; | |
320 | unsigned int imp_var_tab_offset; | |
321 | unsigned int imp_expr_tab_offset; | |
322 | unsigned int code_area_offset; | |
323 | }; | |
324 | ||
325 | struct icp_qat_uof_image { | |
326 | unsigned int img_name; | |
327 | unsigned int ae_assigned; | |
328 | unsigned int ctx_assigned; | |
329 | unsigned int cpu_type; | |
330 | unsigned int entry_address; | |
331 | unsigned int fill_pattern[2]; | |
332 | unsigned int reloadable_size; | |
333 | unsigned char sensitivity; | |
334 | unsigned char reserved; | |
335 | unsigned short ae_mode; | |
336 | unsigned short max_ver; | |
337 | unsigned short min_ver; | |
338 | unsigned short image_attrib; | |
339 | unsigned short reserved2; | |
340 | unsigned short page_region_num; | |
341 | unsigned short numpages; | |
342 | unsigned int reg_tab_offset; | |
343 | unsigned int init_reg_sym_tab; | |
344 | unsigned int sbreak_tab; | |
345 | unsigned int app_metadata; | |
346 | }; | |
347 | ||
348 | struct icp_qat_uof_objtable { | |
349 | unsigned int entry_num; | |
350 | }; | |
351 | ||
352 | struct icp_qat_uof_ae_reg { | |
353 | unsigned int name; | |
354 | unsigned int vis_name; | |
355 | unsigned short type; | |
356 | unsigned short addr; | |
357 | unsigned short access_mode; | |
358 | unsigned char visible; | |
359 | unsigned char reserved1; | |
360 | unsigned short ref_count; | |
361 | unsigned short reserved2; | |
362 | unsigned int xo_id; | |
363 | }; | |
364 | ||
365 | struct icp_qat_uof_code_area { | |
366 | unsigned int micro_words_num; | |
367 | unsigned int uword_block_tab; | |
368 | }; | |
369 | ||
370 | struct icp_qat_uof_batch_init { | |
371 | unsigned int ae; | |
372 | unsigned int addr; | |
373 | unsigned int *value; | |
374 | unsigned int size; | |
375 | struct icp_qat_uof_batch_init *next; | |
376 | }; | |
377 | #endif |