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7afa232e TS |
1 | /* |
2 | This file is provided under a dual BSD/GPLv2 license. When using or | |
3 | redistributing this file, you may do so under either license. | |
4 | ||
5 | GPL LICENSE SUMMARY | |
6 | Copyright(c) 2014 Intel Corporation. | |
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of version 2 of the GNU General Public License as | |
9 | published by the Free Software Foundation. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but | |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | General Public License for more details. | |
15 | ||
16 | Contact Information: | |
17 | qat-linux@intel.com | |
18 | ||
19 | BSD LICENSE | |
20 | Copyright(c) 2014 Intel Corporation. | |
21 | Redistribution and use in source and binary forms, with or without | |
22 | modification, are permitted provided that the following conditions | |
23 | are met: | |
24 | ||
25 | * Redistributions of source code must retain the above copyright | |
26 | notice, this list of conditions and the following disclaimer. | |
27 | * Redistributions in binary form must reproduce the above copyright | |
28 | notice, this list of conditions and the following disclaimer in | |
29 | the documentation and/or other materials provided with the | |
30 | distribution. | |
31 | * Neither the name of Intel Corporation nor the names of its | |
32 | contributors may be used to endorse or promote products derived | |
33 | from this software without specific prior written permission. | |
34 | ||
35 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
36 | "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
37 | LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
38 | A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
39 | OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
40 | SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
41 | LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
42 | DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
43 | THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
44 | (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
45 | OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
46 | */ | |
47 | #ifndef ADF_DH895x_HW_DATA_H_ | |
48 | #define ADF_DH895x_HW_DATA_H_ | |
49 | ||
50 | /* PCIe configuration space */ | |
f3dd7e60 | 51 | #define ADF_DH895XCC_SRAM_BAR 0 |
a727c4b6 TS |
52 | #define ADF_DH895XCC_PMISC_BAR 1 |
53 | #define ADF_DH895XCC_ETR_BAR 2 | |
7afa232e TS |
54 | #define ADF_DH895XCC_RX_RINGS_OFFSET 8 |
55 | #define ADF_DH895XCC_TX_RINGS_MASK 0xFF | |
56 | #define ADF_DH895XCC_FUSECTL_OFFSET 0x40 | |
57 | #define ADF_DH895XCC_FUSECTL_SKU_MASK 0x300000 | |
58 | #define ADF_DH895XCC_FUSECTL_SKU_SHIFT 20 | |
59 | #define ADF_DH895XCC_FUSECTL_SKU_1 0x0 | |
60 | #define ADF_DH895XCC_FUSECTL_SKU_2 0x1 | |
61 | #define ADF_DH895XCC_FUSECTL_SKU_3 0x2 | |
62 | #define ADF_DH895XCC_FUSECTL_SKU_4 0x3 | |
63 | #define ADF_DH895XCC_MAX_ACCELERATORS 6 | |
64 | #define ADF_DH895XCC_MAX_ACCELENGINES 12 | |
4f74c398 | 65 | #define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13 |
7afa232e TS |
66 | #define ADF_DH895XCC_ACCELERATORS_MASK 0x3F |
67 | #define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF | |
68 | #define ADF_DH895XCC_LEGFUSE_OFFSET 0x4C | |
69 | #define ADF_DH895XCC_ETR_MAX_BANKS 32 | |
70 | #define ADF_DH895XCC_SMIAPF0_MASK_OFFSET (0x3A000 + 0x28) | |
71 | #define ADF_DH895XCC_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30) | |
413e5574 | 72 | #define ADF_DH895XCC_SMIA0_MASK 0xFFFFFFFF |
7afa232e TS |
73 | #define ADF_DH895XCC_SMIA1_MASK 0x1 |
74 | /* Error detection and correction */ | |
75 | #define ADF_DH895XCC_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818) | |
76 | #define ADF_DH895XCC_AE_MISC_CONTROL(i) (i * 0x1000 + 0x20960) | |
af6f2a7b AB |
77 | #define ADF_DH895XCC_ENABLE_AE_ECC_ERR BIT(28) |
78 | #define ADF_DH895XCC_ENABLE_AE_ECC_PARITY_CORR (BIT(24) | BIT(12)) | |
7afa232e TS |
79 | #define ADF_DH895XCC_UERRSSMSH(i) (i * 0x4000 + 0x18) |
80 | #define ADF_DH895XCC_CERRSSMSH(i) (i * 0x4000 + 0x10) | |
af6f2a7b | 81 | #define ADF_DH895XCC_ERRSSMSH_EN BIT(3) |
7afa232e TS |
82 | |
83 | /* Admin Messages Registers */ | |
84 | #define ADF_DH895XCC_ADMINMSGUR_OFFSET (0x3A000 + 0x574) | |
85 | #define ADF_DH895XCC_ADMINMSGLR_OFFSET (0x3A000 + 0x578) | |
86 | #define ADF_DH895XCC_MAILBOX_BASE_OFFSET 0x20970 | |
87 | #define ADF_DH895XCC_MAILBOX_STRIDE 0x1000 | |
28cfaf67 | 88 | /* FW names */ |
7afa232e | 89 | #define ADF_DH895XCC_FW "qat_895xcc.bin" |
28cfaf67 | 90 | #define ADF_DH895XCC_MMP "qat_mmp.bin" |
7afa232e | 91 | #endif |