projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 6ccce699 AK |
1 | /* |
| 2 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
| 3 | * http://www.samsung.com/ | |
| 4 | * | |
| 5 | * EXYNOS PPMU header | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef __DEVFREQ_EXYNOS_PPMU_H | |
| 13 | #define __DEVFREQ_EXYNOS_PPMU_H __FILE__ | |
| 14 | ||
| 15 | #include <linux/ktime.h> | |
| 16 | ||
| 17 | /* For PPMU Control */ | |
| 18 | #define PPMU_ENABLE BIT(0) | |
| 19 | #define PPMU_DISABLE 0x0 | |
| 20 | #define PPMU_CYCLE_RESET BIT(1) | |
| 21 | #define PPMU_COUNTER_RESET BIT(2) | |
| 22 | ||
| 23 | #define PPMU_ENABLE_COUNT0 BIT(0) | |
| 24 | #define PPMU_ENABLE_COUNT1 BIT(1) | |
| 25 | #define PPMU_ENABLE_COUNT2 BIT(2) | |
| 26 | #define PPMU_ENABLE_COUNT3 BIT(3) | |
| 27 | #define PPMU_ENABLE_CYCLE BIT(31) | |
| 28 | ||
| 29 | #define PPMU_CNTENS 0x10 | |
| 30 | #define PPMU_FLAG 0x50 | |
| 31 | #define PPMU_CCNT_OVERFLOW BIT(31) | |
| 32 | #define PPMU_CCNT 0x100 | |
| 33 | ||
| 34 | #define PPMU_PMCNT0 0x110 | |
| 35 | #define PPMU_PMCNT_OFFSET 0x10 | |
| 36 | #define PMCNT_OFFSET(x) (PPMU_PMCNT0 + (PPMU_PMCNT_OFFSET * x)) | |
| 37 | ||
| 38 | #define PPMU_BEVT0SEL 0x1000 | |
| 39 | #define PPMU_BEVTSEL_OFFSET 0x100 | |
| 40 | #define PPMU_BEVTSEL(x) (PPMU_BEVT0SEL + (ch * PPMU_BEVTSEL_OFFSET)) | |
| 41 | ||
| 42 | /* For Event Selection */ | |
| 43 | #define RD_DATA_COUNT 0x5 | |
| 44 | #define WR_DATA_COUNT 0x6 | |
| 45 | #define RDWR_DATA_COUNT 0x7 | |
| 46 | ||
| 47 | enum ppmu_counter { | |
| 48 | PPMU_PMNCNT0, | |
| 49 | PPMU_PMCCNT1, | |
| 50 | PPMU_PMNCNT2, | |
| 51 | PPMU_PMNCNT3, | |
| 52 | PPMU_PMNCNT_MAX, | |
| 53 | }; | |
| 54 | ||
| 55 | struct bus_opp_table { | |
| 56 | unsigned int idx; | |
| 57 | unsigned long clk; | |
| 58 | unsigned long volt; | |
| 59 | }; | |
| 60 | ||
| 61 | struct exynos_ppmu { | |
| 62 | void __iomem *hw_base; | |
| 63 | unsigned int ccnt; | |
| 64 | unsigned int event[PPMU_PMNCNT_MAX]; | |
| 65 | unsigned int count[PPMU_PMNCNT_MAX]; | |
| 66 | unsigned long long ns; | |
| 67 | ktime_t reset_time; | |
| 68 | bool ccnt_overflow; | |
| 69 | bool count_overflow[PPMU_PMNCNT_MAX]; | |
| 70 | }; | |
| 71 | ||
| 26d51853 BZ |
72 | struct busfreq_ppmu_data { |
| 73 | struct exynos_ppmu *ppmu; | |
| 74 | int ppmu_end; | |
| 75 | }; | |
| 76 | ||
| 6ccce699 AK |
77 | void exynos_ppmu_reset(void __iomem *ppmu_base); |
| 78 | void exynos_ppmu_setevent(void __iomem *ppmu_base, unsigned int ch, | |
| 79 | unsigned int evt); | |
| 80 | void exynos_ppmu_start(void __iomem *ppmu_base); | |
| 81 | void exynos_ppmu_stop(void __iomem *ppmu_base); | |
| 82 | unsigned int exynos_ppmu_read(void __iomem *ppmu_base, unsigned int ch); | |
| 26d51853 BZ |
83 | void busfreq_mon_reset(struct busfreq_ppmu_data *ppmu_data); |
| 84 | void exynos_read_ppmu(struct busfreq_ppmu_data *ppmu_data); | |
| 85 | int exynos_get_busier_ppmu(struct busfreq_ppmu_data *ppmu_data); | |
| 6ccce699 | 86 | #endif /* __DEVFREQ_EXYNOS_PPMU_H */ |