Commit | Line | Data |
---|---|---|
c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
b3c567e4 VK |
36 | config INTEL_MID_DMAC |
37 | tristate "Intel MID DMA support for Peripheral DMA controllers" | |
38 | depends on PCI && X86 | |
39 | select DMA_ENGINE | |
40 | default n | |
41 | help | |
42 | Enable support for the Intel(R) MID DMA engine present | |
43 | in Intel MID chipsets. | |
44 | ||
45 | Say Y here if you have such a chipset. | |
46 | ||
47 | If unsure, say N. | |
48 | ||
5fc6d897 | 49 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
138f4c35 DW |
50 | bool |
51 | ||
e8689e63 LW |
52 | config AMBA_PL08X |
53 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 54 | depends on ARM_AMBA |
e8689e63 | 55 | select DMA_ENGINE |
083be28a | 56 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
57 | help |
58 | Platform has a PL08x DMAC device | |
59 | which can provide DMA engine support | |
60 | ||
2ed6dc34 SN |
61 | config INTEL_IOATDMA |
62 | tristate "Intel I/OAT DMA support" | |
63 | depends on PCI && X86 | |
64 | select DMA_ENGINE | |
3cc377b9 | 65 | select DMA_ENGINE_RAID |
2ed6dc34 SN |
66 | select DCA |
67 | help | |
68 | Enable support for the Intel(R) I/OAT DMA engine present | |
69 | in recent Intel Xeon chipsets. | |
70 | ||
71 | Say Y here if you have such a chipset. | |
72 | ||
73 | If unsure, say N. | |
74 | ||
75 | config INTEL_IOP_ADMA | |
76 | tristate "Intel IOP ADMA support" | |
77 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
2ed6dc34 | 78 | select DMA_ENGINE |
5fc6d897 | 79 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 SN |
80 | help |
81 | Enable support for the Intel(R) IOP Series RAID engines. | |
c13c8260 | 82 | |
61a76496 | 83 | source "drivers/dma/dw/Kconfig" |
d5ea7b5e | 84 | |
dc78baa2 NF |
85 | config AT_HDMAC |
86 | tristate "Atmel AHB DMA support" | |
f898fed0 | 87 | depends on ARCH_AT91 |
dc78baa2 NF |
88 | select DMA_ENGINE |
89 | help | |
f898fed0 | 90 | Support the Atmel AHB DMA controller. |
dc78baa2 | 91 | |
173acc7c | 92 | config FSL_DMA |
8de7a7d9 | 93 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 94 | depends on FSL_SOC |
173acc7c | 95 | select DMA_ENGINE |
5fc6d897 | 96 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 97 | ---help--- |
8de7a7d9 HZ |
98 | Enable support for the Freescale Elo series DMA controllers. |
99 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
100 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
101 | some Txxx and Bxxx parts. | |
173acc7c | 102 | |
0fb6f739 PZ |
103 | config MPC512X_DMA |
104 | tristate "Freescale MPC512x built-in DMA engine support" | |
ba2eea25 | 105 | depends on PPC_MPC512x || PPC_MPC831x |
0fb6f739 PZ |
106 | select DMA_ENGINE |
107 | ---help--- | |
108 | Enable support for the Freescale MPC512x built-in DMA engine. | |
109 | ||
9a322993 PDM |
110 | source "drivers/dma/bestcomm/Kconfig" |
111 | ||
ff7b0479 SB |
112 | config MV_XOR |
113 | bool "Marvell XOR engine support" | |
114 | depends on PLAT_ORION | |
ff7b0479 | 115 | select DMA_ENGINE |
3cc377b9 | 116 | select DMA_ENGINE_RAID |
5fc6d897 | 117 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ff7b0479 SB |
118 | ---help--- |
119 | Enable support for the Marvell XOR engine. | |
120 | ||
5296b56d GL |
121 | config MX3_IPU |
122 | bool "MX3x Image Processing Unit support" | |
8e2d41f8 | 123 | depends on ARCH_MXC |
5296b56d GL |
124 | select DMA_ENGINE |
125 | default y | |
126 | help | |
127 | If you plan to use the Image Processing unit in the i.MX3x, say | |
128 | Y here. If unsure, select Y. | |
129 | ||
130 | config MX3_IPU_IRQS | |
131 | int "Number of dynamically mapped interrupts for IPU" | |
132 | depends on MX3_IPU | |
133 | range 2 137 | |
134 | default 4 | |
135 | help | |
136 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
137 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
138 | number of IRQ slots and map them dynamically to specific sources. | |
139 | ||
ea76f0b3 AN |
140 | config TXX9_DMAC |
141 | tristate "Toshiba TXx9 SoC DMA support" | |
142 | depends on MACH_TX49XX || MACH_TX39XX | |
143 | select DMA_ENGINE | |
144 | help | |
145 | Support the TXx9 SoC internal DMA controller. This can be | |
146 | integrated in chips such as the Toshiba TX4927/38/39. | |
147 | ||
ec8a1586 LD |
148 | config TEGRA20_APB_DMA |
149 | bool "NVIDIA Tegra20 APB DMA support" | |
150 | depends on ARCH_TEGRA | |
151 | select DMA_ENGINE | |
152 | help | |
153 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
154 | DMA controller is having multiple DMA channel which can be | |
155 | configured for different peripherals like audio, UART, SPI, | |
156 | I2C etc which is in APB bus. | |
157 | This DMA controller transfers data from memory to peripheral fifo | |
158 | or vice versa. It does not support memory to memory data transfer. | |
159 | ||
ddeccb8d HS |
160 | config S3C24XX_DMAC |
161 | tristate "Samsung S3C24XX DMA support" | |
162 | depends on ARCH_S3C24XX && !S3C24XX_DMA | |
163 | select DMA_ENGINE | |
164 | select DMA_VIRTUAL_CHANNELS | |
165 | help | |
166 | Support for the Samsung S3C24XX DMA controller driver. The | |
167 | DMA controller is having multiple DMA channels which can be | |
168 | configured for different peripherals like audio, UART, SPI. | |
169 | The DMA controller can transfer data from memory to peripheral, | |
170 | periphal to memory, periphal to periphal and memory to memory. | |
171 | ||
189b4ee8 | 172 | source "drivers/dma/sh/Kconfig" |
d8902adc | 173 | |
61f135b9 LW |
174 | config COH901318 |
175 | bool "ST-Ericsson COH901318 DMA support" | |
176 | select DMA_ENGINE | |
177 | depends on ARCH_U300 | |
178 | help | |
179 | Enable support for ST-Ericsson COH 901 318 DMA. | |
180 | ||
8d318a50 LW |
181 | config STE_DMA40 |
182 | bool "ST-Ericsson DMA40 support" | |
183 | depends on ARCH_U8500 | |
184 | select DMA_ENGINE | |
185 | help | |
186 | Support for ST-Ericsson DMA40 controller | |
187 | ||
12458ea0 AG |
188 | config AMCC_PPC440SPE_ADMA |
189 | tristate "AMCC PPC440SPe ADMA support" | |
190 | depends on 440SPe || 440SP | |
191 | select DMA_ENGINE | |
3cc377b9 | 192 | select DMA_ENGINE_RAID |
12458ea0 | 193 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 194 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
12458ea0 AG |
195 | help |
196 | Enable support for the AMCC PPC440SPe RAID engines. | |
197 | ||
de5d4453 RR |
198 | config TIMB_DMA |
199 | tristate "Timberdale FPGA DMA support" | |
2dda47d1 | 200 | depends on MFD_TIMBERDALE |
de5d4453 RR |
201 | select DMA_ENGINE |
202 | help | |
203 | Enable support for the Timberdale FPGA DMA engine. | |
204 | ||
ca21a146 | 205 | config SIRF_DMA |
f7d935dc BS |
206 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
207 | depends on ARCH_SIRF | |
ca21a146 RY |
208 | select DMA_ENGINE |
209 | help | |
210 | Enable support for the CSR SiRFprimaII DMA engine. | |
211 | ||
c2dde5f8 | 212 | config TI_EDMA |
76448041 | 213 | bool "TI EDMA support" |
e7ed8b40 | 214 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE |
c2dde5f8 MP |
215 | select DMA_ENGINE |
216 | select DMA_VIRTUAL_CHANNELS | |
c2b9e974 | 217 | select TI_PRIV_EDMA |
c2dde5f8 MP |
218 | default n |
219 | help | |
220 | Enable support for the TI EDMA controller. This DMA | |
221 | engine is found on TI DaVinci and AM33xx parts. | |
222 | ||
12458ea0 AG |
223 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
224 | bool | |
225 | ||
b3040e40 JB |
226 | config PL330_DMA |
227 | tristate "DMA API Driver for PL330" | |
228 | select DMA_ENGINE | |
1b9bb715 | 229 | depends on ARM_AMBA |
b3040e40 JB |
230 | help |
231 | Select if your platform has one or more PL330 DMACs. | |
232 | You need to provide platform specific settings via | |
233 | platform_data for a dma-pl330 device. | |
234 | ||
0c42bd0e | 235 | config PCH_DMA |
ca7fe2db | 236 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
0c42bd0e YW |
237 | depends on PCI && X86 |
238 | select DMA_ENGINE | |
239 | help | |
2cdf2455 TM |
240 | Enable support for Intel EG20T PCH DMA engine. |
241 | ||
e79e72be | 242 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
243 | Output Hub), ML7213, ML7223 and ML7831. |
244 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
245 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
246 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
247 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 248 | |
1ec1e82f SH |
249 | config IMX_SDMA |
250 | tristate "i.MX SDMA support" | |
8e2d41f8 | 251 | depends on ARCH_MXC |
1ec1e82f SH |
252 | select DMA_ENGINE |
253 | help | |
254 | Support the i.MX SDMA engine. This engine is integrated into | |
8e2d41f8 | 255 | Freescale i.MX25/31/35/51/53 chips. |
1ec1e82f | 256 | |
1f1846c6 SH |
257 | config IMX_DMA |
258 | tristate "i.MX DMA support" | |
5b2e02e4 | 259 | depends on ARCH_MXC |
1f1846c6 SH |
260 | select DMA_ENGINE |
261 | help | |
262 | Support the i.MX DMA engine. This engine is integrated into | |
263 | Freescale i.MX1/21/27 chips. | |
264 | ||
a580b8c5 SG |
265 | config MXS_DMA |
266 | bool "MXS DMA support" | |
f5c55847 | 267 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q |
f5b7efcc | 268 | select STMP_DEVICE |
a580b8c5 SG |
269 | select DMA_ENGINE |
270 | help | |
271 | Support the MXS DMA engine. This engine including APBH-DMA | |
272 | and APBX-DMA is integrated into Freescale i.MX23/28 chips. | |
273 | ||
760ee1c4 MW |
274 | config EP93XX_DMA |
275 | bool "Cirrus Logic EP93xx DMA support" | |
276 | depends on ARCH_EP93XX | |
277 | select DMA_ENGINE | |
278 | help | |
279 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
280 | ||
6365bead RK |
281 | config DMA_SA11X0 |
282 | tristate "SA-11x0 DMA support" | |
283 | depends on ARCH_SA1100 | |
284 | select DMA_ENGINE | |
50437bff | 285 | select DMA_VIRTUAL_CHANNELS |
6365bead RK |
286 | help |
287 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
288 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
289 | devices. | |
290 | ||
c6da0ba8 ZG |
291 | config MMP_TDMA |
292 | bool "MMP Two-Channel DMA support" | |
49d57b5e | 293 | depends on ARCH_MMP |
c6da0ba8 | 294 | select DMA_ENGINE |
b9f10a10 | 295 | select MMP_SRAM |
c6da0ba8 ZG |
296 | help |
297 | Support the MMP Two-Channel DMA engine. | |
298 | This engine used for MMP Audio DMA and pxa910 SQU. | |
b9f10a10 | 299 | It needs sram driver under mach-mmp. |
c6da0ba8 ZG |
300 | |
301 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
302 | ||
7bedaa55 RK |
303 | config DMA_OMAP |
304 | tristate "OMAP DMA support" | |
305 | depends on ARCH_OMAP | |
306 | select DMA_ENGINE | |
307 | select DMA_VIRTUAL_CHANNELS | |
308 | ||
96286b57 FM |
309 | config DMA_BCM2835 |
310 | tristate "BCM2835 DMA engine support" | |
dd1ed372 | 311 | depends on ARCH_BCM2835 |
96286b57 FM |
312 | select DMA_ENGINE |
313 | select DMA_VIRTUAL_CHANNELS | |
314 | ||
9b3452d1 SAS |
315 | config TI_CPPI41 |
316 | tristate "AM33xx CPPI41 DMA support" | |
317 | depends on ARCH_OMAP | |
318 | select DMA_ENGINE | |
319 | help | |
320 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
321 | is currently used by the USB driver on AM335x platforms. | |
322 | ||
c8acd6aa ZG |
323 | config MMP_PDMA |
324 | bool "MMP PDMA support" | |
325 | depends on (ARCH_MMP || ARCH_PXA) | |
326 | select DMA_ENGINE | |
327 | help | |
8c88126b | 328 | Support the MMP PDMA engine for PXA and MMP platform. |
c8acd6aa | 329 | |
7c169a42 LPC |
330 | config DMA_JZ4740 |
331 | tristate "JZ4740 DMA support" | |
332 | depends on MACH_JZ4740 | |
333 | select DMA_ENGINE | |
334 | select DMA_VIRTUAL_CHANNELS | |
335 | ||
8e6152bc ZG |
336 | config K3_DMA |
337 | tristate "Hisilicon K3 DMA support" | |
338 | depends on ARCH_HI3xxx | |
339 | select DMA_ENGINE | |
340 | select DMA_VIRTUAL_CHANNELS | |
341 | help | |
342 | Support the DMA engine for Hisilicon K3 platform | |
343 | devices. | |
344 | ||
5f9e685a JJ |
345 | config MOXART_DMA |
346 | tristate "MOXART DMA support" | |
347 | depends on ARCH_MOXART | |
348 | select DMA_ENGINE | |
e803d988 | 349 | select DMA_OF |
5f9e685a JJ |
350 | select DMA_VIRTUAL_CHANNELS |
351 | help | |
352 | Enable support for the MOXA ART SoC DMA controller. | |
d6be34fb JL |
353 | |
354 | config FSL_EDMA | |
355 | tristate "Freescale eDMA engine support" | |
356 | depends on OF | |
357 | select DMA_ENGINE | |
358 | select DMA_VIRTUAL_CHANNELS | |
359 | help | |
360 | Support the Freescale eDMA engine with programmable channel | |
361 | multiplexing capability for DMA request sources(slot). | |
362 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
5f9e685a | 363 | |
c13c8260 | 364 | config DMA_ENGINE |
2ed6dc34 | 365 | bool |
c13c8260 | 366 | |
50437bff RK |
367 | config DMA_VIRTUAL_CHANNELS |
368 | tristate | |
369 | ||
1b2e98bc AS |
370 | config DMA_ACPI |
371 | def_bool y | |
372 | depends on ACPI | |
373 | ||
5fa422c9 VK |
374 | config DMA_OF |
375 | def_bool y | |
376 | depends on OF | |
377 | ||
db217334 | 378 | comment "DMA Clients" |
2ed6dc34 | 379 | depends on DMA_ENGINE |
db217334 CL |
380 | |
381 | config NET_DMA | |
382 | bool "Network: TCP receive copy offload" | |
383 | depends on DMA_ENGINE && NET | |
9c402f4e | 384 | default (INTEL_IOATDMA || FSL_DMA) |
77873803 | 385 | depends on BROKEN |
2ed6dc34 | 386 | help |
db217334 CL |
387 | This enables the use of DMA engines in the network stack to |
388 | offload receive copy-to-user operations, freeing CPU cycles. | |
9c402f4e DW |
389 | |
390 | Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise | |
391 | say N. | |
db217334 | 392 | |
729b5d1b DW |
393 | config ASYNC_TX_DMA |
394 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 395 | depends on DMA_ENGINE |
729b5d1b DW |
396 | help |
397 | This allows the async_tx api to take advantage of offload engines for | |
398 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
399 | a dma engine that can perform raid operations and you have enabled | |
400 | MD_RAID456 say Y. | |
401 | ||
402 | If unsure, say N. | |
403 | ||
4a776f0a HS |
404 | config DMATEST |
405 | tristate "DMA Test client" | |
406 | depends on DMA_ENGINE | |
407 | help | |
408 | Simple DMA test client. Say N unless you're debugging a | |
409 | DMA Device driver. | |
410 | ||
3cc377b9 DW |
411 | config DMA_ENGINE_RAID |
412 | bool | |
413 | ||
e7c0fe2a AG |
414 | config QCOM_BAM_DMA |
415 | tristate "QCOM BAM DMA support" | |
416 | depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) | |
417 | select DMA_ENGINE | |
418 | select DMA_VIRTUAL_CHANNELS | |
419 | ---help--- | |
420 | Enable support for the QCOM BAM DMA controller. This controller | |
421 | provides DMA capabilities for a variety of on-chip devices. | |
422 | ||
2ed6dc34 | 423 | endif |