Commit | Line | Data |
---|---|---|
c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
173acc7c | 7 | depends on (PCI && X86) || ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX || PPC |
0036731c | 8 | depends on !HIGHMEM64G |
2ed6dc34 | 9 | help |
6d4f5879 HS |
10 | DMA engines can do asynchronous data transfers without |
11 | involving the host CPU. Currently, this framework can be | |
12 | used to offload memory copies in the network stack and | |
13 | RAID operations in the MD driver. | |
2ed6dc34 SN |
14 | |
15 | if DMADEVICES | |
16 | ||
17 | comment "DMA Devices" | |
18 | ||
19 | config INTEL_IOATDMA | |
20 | tristate "Intel I/OAT DMA support" | |
21 | depends on PCI && X86 | |
22 | select DMA_ENGINE | |
23 | select DCA | |
24 | help | |
25 | Enable support for the Intel(R) I/OAT DMA engine present | |
26 | in recent Intel Xeon chipsets. | |
27 | ||
28 | Say Y here if you have such a chipset. | |
29 | ||
30 | If unsure, say N. | |
31 | ||
32 | config INTEL_IOP_ADMA | |
33 | tristate "Intel IOP ADMA support" | |
34 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
35 | select ASYNC_CORE | |
36 | select DMA_ENGINE | |
37 | help | |
38 | Enable support for the Intel(R) IOP Series RAID engines. | |
c13c8260 | 39 | |
173acc7c ZW |
40 | config FSL_DMA |
41 | bool "Freescale MPC85xx/MPC83xx DMA support" | |
42 | depends on PPC | |
43 | select DMA_ENGINE | |
44 | ---help--- | |
45 | Enable support for the Freescale DMA engine. Now, it support | |
46 | MPC8560/40, MPC8555, MPC8548 and MPC8641 processors. | |
47 | The MPC8349, MPC8360 is also supported. | |
48 | ||
c13c8260 | 49 | config DMA_ENGINE |
2ed6dc34 | 50 | bool |
c13c8260 | 51 | |
db217334 | 52 | comment "DMA Clients" |
2ed6dc34 | 53 | depends on DMA_ENGINE |
db217334 CL |
54 | |
55 | config NET_DMA | |
56 | bool "Network: TCP receive copy offload" | |
57 | depends on DMA_ENGINE && NET | |
2ed6dc34 | 58 | help |
db217334 CL |
59 | This enables the use of DMA engines in the network stack to |
60 | offload receive copy-to-user operations, freeing CPU cycles. | |
61 | Since this is the main user of the DMA engine, it should be enabled; | |
62 | say Y here. | |
63 | ||
2ed6dc34 | 64 | endif |