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c13c8260 CL |
1 | /* |
2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License as published by the Free | |
6 | * Software Foundation; either version 2 of the License, or (at your option) | |
7 | * any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 | |
16 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
17 | * | |
18 | * The full GNU General Public License is included in this distribution in the | |
19 | * file called COPYING. | |
20 | */ | |
21 | ||
22 | /* | |
23 | * This code implements the DMA subsystem. It provides a HW-neutral interface | |
24 | * for other kernel code to use asynchronous memory copy capabilities, | |
25 | * if present, and allows different HW DMA drivers to register as providing | |
26 | * this capability. | |
27 | * | |
28 | * Due to the fact we are accelerating what is already a relatively fast | |
29 | * operation, the code goes to great lengths to avoid additional overhead, | |
30 | * such as locking. | |
31 | * | |
32 | * LOCKING: | |
33 | * | |
34 | * The subsystem keeps two global lists, dma_device_list and dma_client_list. | |
35 | * Both of these are protected by a mutex, dma_list_mutex. | |
36 | * | |
37 | * Each device has a channels list, which runs unlocked but is never modified | |
38 | * once the device is registered, it's just setup by the driver. | |
39 | * | |
d379b01e DW |
40 | * Each client is responsible for keeping track of the channels it uses. See |
41 | * the definition of dma_event_callback in dmaengine.h. | |
c13c8260 CL |
42 | * |
43 | * Each device has a kref, which is initialized to 1 when the device is | |
891f78ea | 44 | * registered. A kref_get is done for each device registered. When the |
8a5703f8 | 45 | * device is released, the corresponding kref_put is done in the release |
c13c8260 | 46 | * method. Every time one of the device's channels is allocated to a client, |
8a5703f8 | 47 | * a kref_get occurs. When the channel is freed, the corresponding kref_put |
c13c8260 | 48 | * happens. The device's release function does a completion, so |
891f78ea | 49 | * unregister_device does a remove event, device_unregister, a kref_put |
c13c8260 CL |
50 | * for the first reference, then waits on the completion for all other |
51 | * references to finish. | |
52 | * | |
53 | * Each channel has an open-coded implementation of Rusty Russell's "bigref," | |
d379b01e DW |
54 | * with a kref and a per_cpu local_t. A dma_chan_get is called when a client |
55 | * signals that it wants to use a channel, and dma_chan_put is called when | |
8a5703f8 | 56 | * a channel is removed or a client using it is unregistered. A client can |
d379b01e DW |
57 | * take extra references per outstanding transaction, as is the case with |
58 | * the NET DMA client. The release function does a kref_put on the device. | |
59 | * -ChrisL, DanW | |
c13c8260 CL |
60 | */ |
61 | ||
62 | #include <linux/init.h> | |
63 | #include <linux/module.h> | |
7405f74b | 64 | #include <linux/mm.h> |
c13c8260 CL |
65 | #include <linux/device.h> |
66 | #include <linux/dmaengine.h> | |
67 | #include <linux/hardirq.h> | |
68 | #include <linux/spinlock.h> | |
69 | #include <linux/percpu.h> | |
70 | #include <linux/rcupdate.h> | |
71 | #include <linux/mutex.h> | |
7405f74b | 72 | #include <linux/jiffies.h> |
c13c8260 CL |
73 | |
74 | static DEFINE_MUTEX(dma_list_mutex); | |
75 | static LIST_HEAD(dma_device_list); | |
76 | static LIST_HEAD(dma_client_list); | |
77 | ||
78 | /* --- sysfs implementation --- */ | |
79 | ||
891f78ea | 80 | static ssize_t show_memcpy_count(struct device *dev, struct device_attribute *attr, char *buf) |
c13c8260 | 81 | { |
891f78ea | 82 | struct dma_chan *chan = to_dma_chan(dev); |
c13c8260 CL |
83 | unsigned long count = 0; |
84 | int i; | |
85 | ||
17f3ae08 | 86 | for_each_possible_cpu(i) |
c13c8260 CL |
87 | count += per_cpu_ptr(chan->local, i)->memcpy_count; |
88 | ||
89 | return sprintf(buf, "%lu\n", count); | |
90 | } | |
91 | ||
891f78ea TJ |
92 | static ssize_t show_bytes_transferred(struct device *dev, struct device_attribute *attr, |
93 | char *buf) | |
c13c8260 | 94 | { |
891f78ea | 95 | struct dma_chan *chan = to_dma_chan(dev); |
c13c8260 CL |
96 | unsigned long count = 0; |
97 | int i; | |
98 | ||
17f3ae08 | 99 | for_each_possible_cpu(i) |
c13c8260 CL |
100 | count += per_cpu_ptr(chan->local, i)->bytes_transferred; |
101 | ||
102 | return sprintf(buf, "%lu\n", count); | |
103 | } | |
104 | ||
891f78ea | 105 | static ssize_t show_in_use(struct device *dev, struct device_attribute *attr, char *buf) |
c13c8260 | 106 | { |
891f78ea | 107 | struct dma_chan *chan = to_dma_chan(dev); |
d379b01e DW |
108 | int in_use = 0; |
109 | ||
110 | if (unlikely(chan->slow_ref) && | |
111 | atomic_read(&chan->refcount.refcount) > 1) | |
112 | in_use = 1; | |
113 | else { | |
114 | if (local_read(&(per_cpu_ptr(chan->local, | |
115 | get_cpu())->refcount)) > 0) | |
116 | in_use = 1; | |
117 | put_cpu(); | |
118 | } | |
c13c8260 | 119 | |
d379b01e | 120 | return sprintf(buf, "%d\n", in_use); |
c13c8260 CL |
121 | } |
122 | ||
891f78ea | 123 | static struct device_attribute dma_attrs[] = { |
c13c8260 CL |
124 | __ATTR(memcpy_count, S_IRUGO, show_memcpy_count, NULL), |
125 | __ATTR(bytes_transferred, S_IRUGO, show_bytes_transferred, NULL), | |
126 | __ATTR(in_use, S_IRUGO, show_in_use, NULL), | |
127 | __ATTR_NULL | |
128 | }; | |
129 | ||
130 | static void dma_async_device_cleanup(struct kref *kref); | |
131 | ||
891f78ea | 132 | static void dma_dev_release(struct device *dev) |
c13c8260 | 133 | { |
891f78ea | 134 | struct dma_chan *chan = to_dma_chan(dev); |
c13c8260 CL |
135 | kref_put(&chan->device->refcount, dma_async_device_cleanup); |
136 | } | |
137 | ||
138 | static struct class dma_devclass = { | |
891f78ea TJ |
139 | .name = "dma", |
140 | .dev_attrs = dma_attrs, | |
141 | .dev_release = dma_dev_release, | |
c13c8260 CL |
142 | }; |
143 | ||
144 | /* --- client and device registration --- */ | |
145 | ||
d379b01e DW |
146 | #define dma_chan_satisfies_mask(chan, mask) \ |
147 | __dma_chan_satisfies_mask((chan), &(mask)) | |
148 | static int | |
149 | __dma_chan_satisfies_mask(struct dma_chan *chan, dma_cap_mask_t *want) | |
150 | { | |
151 | dma_cap_mask_t has; | |
152 | ||
153 | bitmap_and(has.bits, want->bits, chan->device->cap_mask.bits, | |
154 | DMA_TX_TYPE_END); | |
155 | return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); | |
156 | } | |
157 | ||
c13c8260 | 158 | /** |
d379b01e | 159 | * dma_client_chan_alloc - try to allocate channels to a client |
c13c8260 CL |
160 | * @client: &dma_client |
161 | * | |
162 | * Called with dma_list_mutex held. | |
163 | */ | |
d379b01e | 164 | static void dma_client_chan_alloc(struct dma_client *client) |
c13c8260 CL |
165 | { |
166 | struct dma_device *device; | |
167 | struct dma_chan *chan; | |
c13c8260 | 168 | int desc; /* allocated descriptor count */ |
d379b01e | 169 | enum dma_state_client ack; |
c13c8260 | 170 | |
d379b01e DW |
171 | /* Find a channel */ |
172 | list_for_each_entry(device, &dma_device_list, global_node) | |
c13c8260 | 173 | list_for_each_entry(chan, &device->channels, device_node) { |
d379b01e | 174 | if (!dma_chan_satisfies_mask(chan, client->cap_mask)) |
c13c8260 CL |
175 | continue; |
176 | ||
848c536a HS |
177 | desc = chan->device->device_alloc_chan_resources( |
178 | chan, client); | |
c13c8260 | 179 | if (desc >= 0) { |
d379b01e DW |
180 | ack = client->event_callback(client, |
181 | chan, | |
182 | DMA_RESOURCE_AVAILABLE); | |
183 | ||
184 | /* we are done once this client rejects | |
185 | * an available resource | |
186 | */ | |
7cc5bf9a | 187 | if (ack == DMA_ACK) { |
d379b01e | 188 | dma_chan_get(chan); |
7cc5bf9a DW |
189 | chan->client_count++; |
190 | } else if (ack == DMA_NAK) | |
d379b01e | 191 | return; |
c13c8260 CL |
192 | } |
193 | } | |
c13c8260 CL |
194 | } |
195 | ||
7405f74b DW |
196 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) |
197 | { | |
198 | enum dma_status status; | |
199 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); | |
200 | ||
201 | dma_async_issue_pending(chan); | |
202 | do { | |
203 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); | |
204 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { | |
205 | printk(KERN_ERR "dma_sync_wait_timeout!\n"); | |
206 | return DMA_ERROR; | |
207 | } | |
208 | } while (status == DMA_IN_PROGRESS); | |
209 | ||
210 | return status; | |
211 | } | |
212 | EXPORT_SYMBOL(dma_sync_wait); | |
213 | ||
c13c8260 | 214 | /** |
6508871e RD |
215 | * dma_chan_cleanup - release a DMA channel's resources |
216 | * @kref: kernel reference structure that contains the DMA channel device | |
c13c8260 CL |
217 | */ |
218 | void dma_chan_cleanup(struct kref *kref) | |
219 | { | |
220 | struct dma_chan *chan = container_of(kref, struct dma_chan, refcount); | |
221 | chan->device->device_free_chan_resources(chan); | |
c13c8260 CL |
222 | kref_put(&chan->device->refcount, dma_async_device_cleanup); |
223 | } | |
765e3d8a | 224 | EXPORT_SYMBOL(dma_chan_cleanup); |
c13c8260 CL |
225 | |
226 | static void dma_chan_free_rcu(struct rcu_head *rcu) | |
227 | { | |
228 | struct dma_chan *chan = container_of(rcu, struct dma_chan, rcu); | |
229 | int bias = 0x7FFFFFFF; | |
230 | int i; | |
17f3ae08 | 231 | for_each_possible_cpu(i) |
c13c8260 CL |
232 | bias -= local_read(&per_cpu_ptr(chan->local, i)->refcount); |
233 | atomic_sub(bias, &chan->refcount.refcount); | |
234 | kref_put(&chan->refcount, dma_chan_cleanup); | |
235 | } | |
236 | ||
d379b01e | 237 | static void dma_chan_release(struct dma_chan *chan) |
c13c8260 CL |
238 | { |
239 | atomic_add(0x7FFFFFFF, &chan->refcount.refcount); | |
240 | chan->slow_ref = 1; | |
241 | call_rcu(&chan->rcu, dma_chan_free_rcu); | |
242 | } | |
243 | ||
244 | /** | |
d379b01e | 245 | * dma_chans_notify_available - broadcast available channels to the clients |
c13c8260 | 246 | */ |
d379b01e | 247 | static void dma_clients_notify_available(void) |
c13c8260 CL |
248 | { |
249 | struct dma_client *client; | |
c13c8260 CL |
250 | |
251 | mutex_lock(&dma_list_mutex); | |
252 | ||
d379b01e DW |
253 | list_for_each_entry(client, &dma_client_list, global_node) |
254 | dma_client_chan_alloc(client); | |
c13c8260 CL |
255 | |
256 | mutex_unlock(&dma_list_mutex); | |
257 | } | |
258 | ||
259 | /** | |
d379b01e DW |
260 | * dma_chans_notify_available - tell the clients that a channel is going away |
261 | * @chan: channel on its way out | |
c13c8260 | 262 | */ |
d379b01e | 263 | static void dma_clients_notify_removed(struct dma_chan *chan) |
c13c8260 CL |
264 | { |
265 | struct dma_client *client; | |
d379b01e | 266 | enum dma_state_client ack; |
c13c8260 | 267 | |
d379b01e DW |
268 | mutex_lock(&dma_list_mutex); |
269 | ||
270 | list_for_each_entry(client, &dma_client_list, global_node) { | |
271 | ack = client->event_callback(client, chan, | |
272 | DMA_RESOURCE_REMOVED); | |
273 | ||
274 | /* client was holding resources for this channel so | |
275 | * free it | |
276 | */ | |
7cc5bf9a | 277 | if (ack == DMA_ACK) { |
d379b01e | 278 | dma_chan_put(chan); |
7cc5bf9a DW |
279 | chan->client_count--; |
280 | } | |
d379b01e | 281 | } |
c13c8260 | 282 | |
d379b01e DW |
283 | mutex_unlock(&dma_list_mutex); |
284 | } | |
c13c8260 | 285 | |
d379b01e DW |
286 | /** |
287 | * dma_async_client_register - register a &dma_client | |
288 | * @client: ptr to a client structure with valid 'event_callback' and 'cap_mask' | |
289 | */ | |
290 | void dma_async_client_register(struct dma_client *client) | |
291 | { | |
c13c8260 CL |
292 | mutex_lock(&dma_list_mutex); |
293 | list_add_tail(&client->global_node, &dma_client_list); | |
294 | mutex_unlock(&dma_list_mutex); | |
c13c8260 | 295 | } |
765e3d8a | 296 | EXPORT_SYMBOL(dma_async_client_register); |
c13c8260 CL |
297 | |
298 | /** | |
299 | * dma_async_client_unregister - unregister a client and free the &dma_client | |
6508871e | 300 | * @client: &dma_client to free |
c13c8260 CL |
301 | * |
302 | * Force frees any allocated DMA channels, frees the &dma_client memory | |
303 | */ | |
304 | void dma_async_client_unregister(struct dma_client *client) | |
305 | { | |
d379b01e | 306 | struct dma_device *device; |
c13c8260 | 307 | struct dma_chan *chan; |
d379b01e | 308 | enum dma_state_client ack; |
c13c8260 CL |
309 | |
310 | if (!client) | |
311 | return; | |
312 | ||
c13c8260 | 313 | mutex_lock(&dma_list_mutex); |
d379b01e DW |
314 | /* free all channels the client is holding */ |
315 | list_for_each_entry(device, &dma_device_list, global_node) | |
316 | list_for_each_entry(chan, &device->channels, device_node) { | |
317 | ack = client->event_callback(client, chan, | |
318 | DMA_RESOURCE_REMOVED); | |
319 | ||
7cc5bf9a | 320 | if (ack == DMA_ACK) { |
d379b01e | 321 | dma_chan_put(chan); |
7cc5bf9a DW |
322 | chan->client_count--; |
323 | } | |
d379b01e DW |
324 | } |
325 | ||
c13c8260 CL |
326 | list_del(&client->global_node); |
327 | mutex_unlock(&dma_list_mutex); | |
c13c8260 | 328 | } |
765e3d8a | 329 | EXPORT_SYMBOL(dma_async_client_unregister); |
c13c8260 CL |
330 | |
331 | /** | |
d379b01e DW |
332 | * dma_async_client_chan_request - send all available channels to the |
333 | * client that satisfy the capability mask | |
334 | * @client - requester | |
c13c8260 | 335 | */ |
d379b01e | 336 | void dma_async_client_chan_request(struct dma_client *client) |
c13c8260 | 337 | { |
d379b01e DW |
338 | mutex_lock(&dma_list_mutex); |
339 | dma_client_chan_alloc(client); | |
340 | mutex_unlock(&dma_list_mutex); | |
c13c8260 | 341 | } |
765e3d8a | 342 | EXPORT_SYMBOL(dma_async_client_chan_request); |
c13c8260 CL |
343 | |
344 | /** | |
6508871e | 345 | * dma_async_device_register - registers DMA devices found |
c13c8260 CL |
346 | * @device: &dma_device |
347 | */ | |
348 | int dma_async_device_register(struct dma_device *device) | |
349 | { | |
350 | static int id; | |
ff487fb7 | 351 | int chancnt = 0, rc; |
c13c8260 CL |
352 | struct dma_chan* chan; |
353 | ||
354 | if (!device) | |
355 | return -ENODEV; | |
356 | ||
7405f74b DW |
357 | /* validate device routines */ |
358 | BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) && | |
359 | !device->device_prep_dma_memcpy); | |
360 | BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) && | |
361 | !device->device_prep_dma_xor); | |
362 | BUG_ON(dma_has_cap(DMA_ZERO_SUM, device->cap_mask) && | |
363 | !device->device_prep_dma_zero_sum); | |
364 | BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) && | |
365 | !device->device_prep_dma_memset); | |
9b941c66 | 366 | BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && |
7405f74b DW |
367 | !device->device_prep_dma_interrupt); |
368 | ||
369 | BUG_ON(!device->device_alloc_chan_resources); | |
370 | BUG_ON(!device->device_free_chan_resources); | |
7405f74b DW |
371 | BUG_ON(!device->device_is_tx_complete); |
372 | BUG_ON(!device->device_issue_pending); | |
373 | BUG_ON(!device->dev); | |
374 | ||
c13c8260 CL |
375 | init_completion(&device->done); |
376 | kref_init(&device->refcount); | |
377 | device->dev_id = id++; | |
378 | ||
379 | /* represent channels in sysfs. Probably want devs too */ | |
380 | list_for_each_entry(chan, &device->channels, device_node) { | |
381 | chan->local = alloc_percpu(typeof(*chan->local)); | |
382 | if (chan->local == NULL) | |
383 | continue; | |
384 | ||
385 | chan->chan_id = chancnt++; | |
891f78ea | 386 | chan->dev.class = &dma_devclass; |
1099dc79 | 387 | chan->dev.parent = device->dev; |
891f78ea | 388 | snprintf(chan->dev.bus_id, BUS_ID_SIZE, "dma%dchan%d", |
c13c8260 CL |
389 | device->dev_id, chan->chan_id); |
390 | ||
891f78ea | 391 | rc = device_register(&chan->dev); |
ff487fb7 JG |
392 | if (rc) { |
393 | chancnt--; | |
394 | free_percpu(chan->local); | |
395 | chan->local = NULL; | |
396 | goto err_out; | |
397 | } | |
398 | ||
348badf1 HS |
399 | /* One for the channel, one of the class device */ |
400 | kref_get(&device->refcount); | |
c13c8260 | 401 | kref_get(&device->refcount); |
d379b01e | 402 | kref_init(&chan->refcount); |
7cc5bf9a | 403 | chan->client_count = 0; |
d379b01e DW |
404 | chan->slow_ref = 0; |
405 | INIT_RCU_HEAD(&chan->rcu); | |
c13c8260 CL |
406 | } |
407 | ||
408 | mutex_lock(&dma_list_mutex); | |
409 | list_add_tail(&device->global_node, &dma_device_list); | |
410 | mutex_unlock(&dma_list_mutex); | |
411 | ||
d379b01e | 412 | dma_clients_notify_available(); |
c13c8260 CL |
413 | |
414 | return 0; | |
ff487fb7 JG |
415 | |
416 | err_out: | |
417 | list_for_each_entry(chan, &device->channels, device_node) { | |
418 | if (chan->local == NULL) | |
419 | continue; | |
420 | kref_put(&device->refcount, dma_async_device_cleanup); | |
891f78ea | 421 | device_unregister(&chan->dev); |
ff487fb7 JG |
422 | chancnt--; |
423 | free_percpu(chan->local); | |
424 | } | |
425 | return rc; | |
c13c8260 | 426 | } |
765e3d8a | 427 | EXPORT_SYMBOL(dma_async_device_register); |
c13c8260 CL |
428 | |
429 | /** | |
6508871e RD |
430 | * dma_async_device_cleanup - function called when all references are released |
431 | * @kref: kernel reference object | |
c13c8260 CL |
432 | */ |
433 | static void dma_async_device_cleanup(struct kref *kref) | |
434 | { | |
435 | struct dma_device *device; | |
436 | ||
437 | device = container_of(kref, struct dma_device, refcount); | |
438 | complete(&device->done); | |
439 | } | |
440 | ||
6508871e RD |
441 | /** |
442 | * dma_async_device_unregister - unregisters DMA devices | |
443 | * @device: &dma_device | |
444 | */ | |
445 | void dma_async_device_unregister(struct dma_device *device) | |
c13c8260 CL |
446 | { |
447 | struct dma_chan *chan; | |
c13c8260 CL |
448 | |
449 | mutex_lock(&dma_list_mutex); | |
450 | list_del(&device->global_node); | |
451 | mutex_unlock(&dma_list_mutex); | |
452 | ||
453 | list_for_each_entry(chan, &device->channels, device_node) { | |
d379b01e | 454 | dma_clients_notify_removed(chan); |
891f78ea | 455 | device_unregister(&chan->dev); |
d379b01e | 456 | dma_chan_release(chan); |
c13c8260 | 457 | } |
c13c8260 CL |
458 | |
459 | kref_put(&device->refcount, dma_async_device_cleanup); | |
460 | wait_for_completion(&device->done); | |
461 | } | |
765e3d8a | 462 | EXPORT_SYMBOL(dma_async_device_unregister); |
c13c8260 | 463 | |
7405f74b DW |
464 | /** |
465 | * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses | |
466 | * @chan: DMA channel to offload copy to | |
467 | * @dest: destination address (virtual) | |
468 | * @src: source address (virtual) | |
469 | * @len: length | |
470 | * | |
471 | * Both @dest and @src must be mappable to a bus address according to the | |
472 | * DMA mapping API rules for streaming mappings. | |
473 | * Both @dest and @src must stay memory resident (kernel memory or locked | |
474 | * user space pages). | |
475 | */ | |
476 | dma_cookie_t | |
477 | dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest, | |
478 | void *src, size_t len) | |
479 | { | |
480 | struct dma_device *dev = chan->device; | |
481 | struct dma_async_tx_descriptor *tx; | |
0036731c | 482 | dma_addr_t dma_dest, dma_src; |
7405f74b DW |
483 | dma_cookie_t cookie; |
484 | int cpu; | |
485 | ||
0036731c DW |
486 | dma_src = dma_map_single(dev->dev, src, len, DMA_TO_DEVICE); |
487 | dma_dest = dma_map_single(dev->dev, dest, len, DMA_FROM_DEVICE); | |
636bdeaa DW |
488 | tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, |
489 | DMA_CTRL_ACK); | |
0036731c DW |
490 | |
491 | if (!tx) { | |
492 | dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE); | |
493 | dma_unmap_single(dev->dev, dma_dest, len, DMA_FROM_DEVICE); | |
7405f74b | 494 | return -ENOMEM; |
0036731c | 495 | } |
7405f74b | 496 | |
7405f74b | 497 | tx->callback = NULL; |
7405f74b DW |
498 | cookie = tx->tx_submit(tx); |
499 | ||
500 | cpu = get_cpu(); | |
501 | per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; | |
502 | per_cpu_ptr(chan->local, cpu)->memcpy_count++; | |
503 | put_cpu(); | |
504 | ||
505 | return cookie; | |
506 | } | |
507 | EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf); | |
508 | ||
509 | /** | |
510 | * dma_async_memcpy_buf_to_pg - offloaded copy from address to page | |
511 | * @chan: DMA channel to offload copy to | |
512 | * @page: destination page | |
513 | * @offset: offset in page to copy to | |
514 | * @kdata: source address (virtual) | |
515 | * @len: length | |
516 | * | |
517 | * Both @page/@offset and @kdata must be mappable to a bus address according | |
518 | * to the DMA mapping API rules for streaming mappings. | |
519 | * Both @page/@offset and @kdata must stay memory resident (kernel memory or | |
520 | * locked user space pages) | |
521 | */ | |
522 | dma_cookie_t | |
523 | dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page, | |
524 | unsigned int offset, void *kdata, size_t len) | |
525 | { | |
526 | struct dma_device *dev = chan->device; | |
527 | struct dma_async_tx_descriptor *tx; | |
0036731c | 528 | dma_addr_t dma_dest, dma_src; |
7405f74b DW |
529 | dma_cookie_t cookie; |
530 | int cpu; | |
531 | ||
0036731c DW |
532 | dma_src = dma_map_single(dev->dev, kdata, len, DMA_TO_DEVICE); |
533 | dma_dest = dma_map_page(dev->dev, page, offset, len, DMA_FROM_DEVICE); | |
636bdeaa DW |
534 | tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, |
535 | DMA_CTRL_ACK); | |
0036731c DW |
536 | |
537 | if (!tx) { | |
538 | dma_unmap_single(dev->dev, dma_src, len, DMA_TO_DEVICE); | |
539 | dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE); | |
7405f74b | 540 | return -ENOMEM; |
0036731c | 541 | } |
7405f74b | 542 | |
7405f74b | 543 | tx->callback = NULL; |
7405f74b DW |
544 | cookie = tx->tx_submit(tx); |
545 | ||
546 | cpu = get_cpu(); | |
547 | per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; | |
548 | per_cpu_ptr(chan->local, cpu)->memcpy_count++; | |
549 | put_cpu(); | |
550 | ||
551 | return cookie; | |
552 | } | |
553 | EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg); | |
554 | ||
555 | /** | |
556 | * dma_async_memcpy_pg_to_pg - offloaded copy from page to page | |
557 | * @chan: DMA channel to offload copy to | |
558 | * @dest_pg: destination page | |
559 | * @dest_off: offset in page to copy to | |
560 | * @src_pg: source page | |
561 | * @src_off: offset in page to copy from | |
562 | * @len: length | |
563 | * | |
564 | * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus | |
565 | * address according to the DMA mapping API rules for streaming mappings. | |
566 | * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident | |
567 | * (kernel memory or locked user space pages). | |
568 | */ | |
569 | dma_cookie_t | |
570 | dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg, | |
571 | unsigned int dest_off, struct page *src_pg, unsigned int src_off, | |
572 | size_t len) | |
573 | { | |
574 | struct dma_device *dev = chan->device; | |
575 | struct dma_async_tx_descriptor *tx; | |
0036731c | 576 | dma_addr_t dma_dest, dma_src; |
7405f74b DW |
577 | dma_cookie_t cookie; |
578 | int cpu; | |
579 | ||
0036731c DW |
580 | dma_src = dma_map_page(dev->dev, src_pg, src_off, len, DMA_TO_DEVICE); |
581 | dma_dest = dma_map_page(dev->dev, dest_pg, dest_off, len, | |
582 | DMA_FROM_DEVICE); | |
636bdeaa DW |
583 | tx = dev->device_prep_dma_memcpy(chan, dma_dest, dma_src, len, |
584 | DMA_CTRL_ACK); | |
0036731c DW |
585 | |
586 | if (!tx) { | |
587 | dma_unmap_page(dev->dev, dma_src, len, DMA_TO_DEVICE); | |
588 | dma_unmap_page(dev->dev, dma_dest, len, DMA_FROM_DEVICE); | |
7405f74b | 589 | return -ENOMEM; |
0036731c | 590 | } |
7405f74b | 591 | |
7405f74b | 592 | tx->callback = NULL; |
7405f74b DW |
593 | cookie = tx->tx_submit(tx); |
594 | ||
595 | cpu = get_cpu(); | |
596 | per_cpu_ptr(chan->local, cpu)->bytes_transferred += len; | |
597 | per_cpu_ptr(chan->local, cpu)->memcpy_count++; | |
598 | put_cpu(); | |
599 | ||
600 | return cookie; | |
601 | } | |
602 | EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg); | |
603 | ||
604 | void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, | |
605 | struct dma_chan *chan) | |
606 | { | |
607 | tx->chan = chan; | |
608 | spin_lock_init(&tx->lock); | |
7405f74b DW |
609 | } |
610 | EXPORT_SYMBOL(dma_async_tx_descriptor_init); | |
611 | ||
c13c8260 CL |
612 | static int __init dma_bus_init(void) |
613 | { | |
614 | mutex_init(&dma_list_mutex); | |
615 | return class_register(&dma_devclass); | |
616 | } | |
c13c8260 CL |
617 | subsys_initcall(dma_bus_init); |
618 |