[deliverable/linux.git] / drivers / dma / dw / platform.c

/*
 * Platform driver for the Synopsys DesignWare DMA Controller
 *
 * Copyright (C) 2007-2008 Atmel Corporation
 * Copyright (C) 2010-2011 ST Microelectronics
 * Copyright (C) 2013 Intel Corporation
 *
 * Some parts of this driver are derived from the original dw_dmac.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/module.h>
#include <linux/device.h>
#include <linux/clk.h>
#include <linux/pm_runtime.h>
#include <linux/platform_device.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/of.h>
#include <linux/of_dma.h>
#include <linux/acpi.h>
#include <linux/acpi_dma.h>

#include "internal.h"

#define DRV_NAME	"dw_dmac"

static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
					struct of_dma *ofdma)
{
	struct dw_dma *dw = ofdma->of_dma_data;
	struct dw_dma_slave slave = {
		.dma_dev = dw->dma.dev,
	};
	dma_cap_mask_t cap;

	if (dma_spec->args_count != 3)
		return NULL;

	slave.src_id = dma_spec->args[0];
	slave.dst_id = dma_spec->args[0];
	slave.src_master = dma_spec->args[1];
	slave.dst_master = dma_spec->args[2];

	if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
		    slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
		    slave.src_master >= dw->nr_masters ||
		    slave.dst_master >= dw->nr_masters))
		return NULL;

	dma_cap_zero(cap);
	dma_cap_set(DMA_SLAVE, cap);

	/* TODO: there should be a simpler way to do this */
	return dma_request_channel(cap, dw_dma_filter, &slave);
}

#ifdef CONFIG_ACPI
static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
{
	struct acpi_dma_spec *dma_spec = param;
	struct dw_dma_slave slave = {
		.dma_dev = dma_spec->dev,
		.src_id = dma_spec->slave_id,
		.dst_id = dma_spec->slave_id,
		.src_master = 1,
		.dst_master = 0,
	};

	return dw_dma_filter(chan, &slave);
}

static void dw_dma_acpi_controller_register(struct dw_dma *dw)
{
	struct device *dev = dw->dma.dev;
	struct acpi_dma_filter_info *info;
	int ret;

	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
	if (!info)
		return;

	dma_cap_zero(info->dma_cap);
	dma_cap_set(DMA_SLAVE, info->dma_cap);
	info->filter_fn = dw_dma_acpi_filter;

	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
						info);
	if (ret)
		dev_err(dev, "could not register acpi_dma_controller\n");
}
#else /* !CONFIG_ACPI */
static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
#endif /* !CONFIG_ACPI */

#ifdef CONFIG_OF
static struct dw_dma_platform_data *
dw_dma_parse_dt(struct platform_device *pdev)
{
	struct device_node *np = pdev->dev.of_node;
	struct dw_dma_platform_data *pdata;
	u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];

	if (!np) {
		dev_err(&pdev->dev, "Missing DT data\n");
		return NULL;
	}

	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	if (!pdata)
		return NULL;

	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
		return NULL;

	if (of_property_read_bool(np, "is_private"))
		pdata->is_private = true;

	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
		pdata->chan_allocation_order = (unsigned char)tmp;

	if (!of_property_read_u32(np, "chan_priority", &tmp))
		pdata->chan_priority = tmp;

	if (!of_property_read_u32(np, "block_size", &tmp))
		pdata->block_size = tmp;

	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
		if (tmp > DW_DMA_MAX_NR_MASTERS)
			return NULL;

		pdata->nr_masters = tmp;
	}

	if (!of_property_read_u32_array(np, "data_width", arr,
				pdata->nr_masters))
		for (tmp = 0; tmp < pdata->nr_masters; tmp++)
			pdata->data_width[tmp] = arr[tmp];

	return pdata;
}
#else
static inline struct dw_dma_platform_data *
dw_dma_parse_dt(struct platform_device *pdev)
{
	return NULL;
}
#endif

static int dw_probe(struct platform_device *pdev)
{
	struct dw_dma_chip *chip;
	struct device *dev = &pdev->dev;
	struct resource *mem;
	const struct acpi_device_id *id;
	struct dw_dma_platform_data *pdata;
	int err;

	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	chip->irq = platform_get_irq(pdev, 0);
	if (chip->irq < 0)
		return chip->irq;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	chip->regs = devm_ioremap_resource(dev, mem);
	if (IS_ERR(chip->regs))
		return PTR_ERR(chip->regs);

	err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
	if (err)
		return err;

	pdata = dev_get_platdata(dev);
	if (!pdata)
		pdata = dw_dma_parse_dt(pdev);
	if (!pdata && has_acpi_companion(dev)) {
		id = acpi_match_device(dev->driver->acpi_match_table, dev);
		if (id)
			pdata = (struct dw_dma_platform_data *)id->driver_data;
	}

	chip->dev = dev;

	chip->clk = devm_clk_get(chip->dev, "hclk");
	if (IS_ERR(chip->clk))
		return PTR_ERR(chip->clk);
	err = clk_prepare_enable(chip->clk);
	if (err)
		return err;

	pm_runtime_enable(&pdev->dev);

	err = dw_dma_probe(chip, pdata);
	if (err)
		goto err_dw_dma_probe;

	platform_set_drvdata(pdev, chip);

	if (pdev->dev.of_node) {
		err = of_dma_controller_register(pdev->dev.of_node,
						 dw_dma_of_xlate, chip->dw);
		if (err)
			dev_err(&pdev->dev,
				"could not register of_dma_controller\n");
	}

	if (ACPI_HANDLE(&pdev->dev))
		dw_dma_acpi_controller_register(chip->dw);

	return 0;

err_dw_dma_probe:
	pm_runtime_disable(&pdev->dev);
	clk_disable_unprepare(chip->clk);
	return err;
}

static int dw_remove(struct platform_device *pdev)
{
	struct dw_dma_chip *chip = platform_get_drvdata(pdev);

	if (pdev->dev.of_node)
		of_dma_controller_free(pdev->dev.of_node);

	dw_dma_remove(chip);
	pm_runtime_disable(&pdev->dev);
	clk_disable_unprepare(chip->clk);

	return 0;
}

static void dw_shutdown(struct platform_device *pdev)
{
	struct dw_dma_chip *chip = platform_get_drvdata(pdev);

	dw_dma_disable(chip);
	clk_disable_unprepare(chip->clk);
}

#ifdef CONFIG_OF
static const struct of_device_id dw_dma_of_id_table[] = {
	{ .compatible = "snps,dma-spear1340" },
	{}
};
MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
#endif

#ifdef CONFIG_ACPI
static struct dw_dma_platform_data dw_dma_acpi_pdata = {
	.nr_channels = 8,
	.is_private = true,
	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
	.chan_priority = CHAN_PRIORITY_ASCENDING,
	.block_size = 4095,
	.nr_masters = 2,
};

static const struct acpi_device_id dw_dma_acpi_id_table[] = {
	{ "INTL9C60", (kernel_ulong_t)&dw_dma_acpi_pdata },
	{ }
};
MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
#endif

#ifdef CONFIG_PM_SLEEP

static int dw_suspend_late(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_dma_chip *chip = platform_get_drvdata(pdev);

	dw_dma_disable(chip);
	clk_disable_unprepare(chip->clk);

	return 0;
}

static int dw_resume_early(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_dma_chip *chip = platform_get_drvdata(pdev);

	clk_prepare_enable(chip->clk);
	return dw_dma_enable(chip);
}

#endif /* CONFIG_PM_SLEEP */

static const struct dev_pm_ops dw_dev_pm_ops = {
	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
};

static struct platform_driver dw_driver = {
	.probe		= dw_probe,
	.remove		= dw_remove,
	.shutdown       = dw_shutdown,
	.driver = {
		.name	= DRV_NAME,
		.pm	= &dw_dev_pm_ops,
		.of_match_table = of_match_ptr(dw_dma_of_id_table),
		.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
	},
};

static int __init dw_init(void)
{
	return platform_driver_register(&dw_driver);
}
subsys_initcall(dw_init);

static void __exit dw_exit(void)
{
	platform_driver_unregister(&dw_driver);
}
module_exit(dw_exit);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
MODULE_ALIAS("platform:" DRV_NAME);
Commit	Line	Data
9cade1a4 AS	1	/*
	2	* Platform driver for the Synopsys DesignWare DMA Controller
	3	*
	4	* Copyright (C) 2007-2008 Atmel Corporation
	5	* Copyright (C) 2010-2011 ST Microelectronics
	6	* Copyright (C) 2013 Intel Corporation
	7	*
	8	* Some parts of this driver are derived from the original dw_dmac.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/module.h>
	16	#include <linux/device.h>
	17	#include <linux/clk.h>
6acf3998	18	#include <linux/pm_runtime.h>
9cade1a4 AS	19	#include <linux/platform_device.h>
	20	#include <linux/dmaengine.h>
	21	#include <linux/dma-mapping.h>
	22	#include <linux/of.h>
	23	#include <linux/of_dma.h>
	24	#include <linux/acpi.h>
	25	#include <linux/acpi_dma.h>
	26
	27	#include "internal.h"
	28
a104a45b AS	29	#define DRV_NAME "dw_dmac"
a104a45b AS	30
9cade1a4 AS	31	static struct dma_chan dw_dma_of_xlate(struct of_phandle_args dma_spec,
	32	struct of_dma *ofdma)
	33	{
	34	struct dw_dma *dw = ofdma->of_dma_data;
4d130de2 AS	35	struct dw_dma_slave slave = {
4d130de2 AS	36	.dma_dev = dw->dma.dev,
9cade1a4 AS	37	};
	38	dma_cap_mask_t cap;
	39
	40	if (dma_spec->args_count != 3)
	41	return NULL;
	42
4d130de2 AS	43	slave.src_id = dma_spec->args[0];
	44	slave.dst_id = dma_spec->args[0];
	45	slave.src_master = dma_spec->args[1];
	46	slave.dst_master = dma_spec->args[2];
9cade1a4	47
4d130de2 AS	48	if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS \|\|
	49	slave.dst_id >= DW_DMA_MAX_NR_REQUESTS \|\|
	50	slave.src_master >= dw->nr_masters \|\|
	51	slave.dst_master >= dw->nr_masters))
9cade1a4 AS	52	return NULL;
	53
	54	dma_cap_zero(cap);
	55	dma_cap_set(DMA_SLAVE, cap);
	56
	57	/* TODO: there should be a simpler way to do this */
4d130de2	58	return dma_request_channel(cap, dw_dma_filter, &slave);
9cade1a4 AS	59	}
	60
	61	#ifdef CONFIG_ACPI
	62	static bool dw_dma_acpi_filter(struct dma_chan chan, void param)
	63	{
9cade1a4	64	struct acpi_dma_spec *dma_spec = param;
4d130de2 AS	65	struct dw_dma_slave slave = {
	66	.dma_dev = dma_spec->dev,
	67	.src_id = dma_spec->slave_id,
	68	.dst_id = dma_spec->slave_id,
	69	.src_master = 1,
	70	.dst_master = 0,
	71	};
9cade1a4	72
4d130de2	73	return dw_dma_filter(chan, &slave);
9cade1a4 AS	74	}
	75
	76	static void dw_dma_acpi_controller_register(struct dw_dma *dw)
	77	{
	78	struct device *dev = dw->dma.dev;
	79	struct acpi_dma_filter_info *info;
	80	int ret;
	81
	82	info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
	83	if (!info)
	84	return;
	85
	86	dma_cap_zero(info->dma_cap);
	87	dma_cap_set(DMA_SLAVE, info->dma_cap);
	88	info->filter_fn = dw_dma_acpi_filter;
	89
	90	ret = devm_acpi_dma_controller_register(dev, acpi_dma_simple_xlate,
	91	info);
	92	if (ret)
	93	dev_err(dev, "could not register acpi_dma_controller\n");
	94	}
	95	#else /* !CONFIG_ACPI */
	96	static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
	97	#endif /* !CONFIG_ACPI */
	98
	99	#ifdef CONFIG_OF
	100	static struct dw_dma_platform_data *
	101	dw_dma_parse_dt(struct platform_device *pdev)
	102	{
	103	struct device_node *np = pdev->dev.of_node;
	104	struct dw_dma_platform_data *pdata;
d8ded50f	105	u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
9cade1a4 AS	106
	107	if (!np) {
	108	dev_err(&pdev->dev, "Missing DT data\n");
	109	return NULL;
	110	}
	111
	112	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	113	if (!pdata)
	114	return NULL;
	115
	116	if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
	117	return NULL;
	118
	119	if (of_property_read_bool(np, "is_private"))
	120	pdata->is_private = true;
	121
	122	if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
	123	pdata->chan_allocation_order = (unsigned char)tmp;
	124
	125	if (!of_property_read_u32(np, "chan_priority", &tmp))
	126	pdata->chan_priority = tmp;
	127
	128	if (!of_property_read_u32(np, "block_size", &tmp))
	129	pdata->block_size = tmp;
	130
	131	if (!of_property_read_u32(np, "dma-masters", &tmp)) {
d8ded50f	132	if (tmp > DW_DMA_MAX_NR_MASTERS)
9cade1a4 AS	133	return NULL;
	134
	135	pdata->nr_masters = tmp;
	136	}
	137
	138	if (!of_property_read_u32_array(np, "data_width", arr,
	139	pdata->nr_masters))
	140	for (tmp = 0; tmp < pdata->nr_masters; tmp++)
	141	pdata->data_width[tmp] = arr[tmp];
	142
	143	return pdata;
	144	}
	145	#else
	146	static inline struct dw_dma_platform_data *
	147	dw_dma_parse_dt(struct platform_device *pdev)
	148	{
	149	return NULL;
	150	}
	151	#endif
	152
	153	static int dw_probe(struct platform_device *pdev)
	154	{
	155	struct dw_dma_chip *chip;
	156	struct device *dev = &pdev->dev;
	157	struct resource *mem;
175267b3	158	const struct acpi_device_id *id;
9cade1a4 AS	159	struct dw_dma_platform_data *pdata;
	160	int err;
	161
	162	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
	163	if (!chip)
	164	return -ENOMEM;
	165
	166	chip->irq = platform_get_irq(pdev, 0);
	167	if (chip->irq < 0)
	168	return chip->irq;
	169
	170	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	171	chip->regs = devm_ioremap_resource(dev, mem);
	172	if (IS_ERR(chip->regs))
	173	return PTR_ERR(chip->regs);
	174
24353b8b RK	175	err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
	176	if (err)
	177	return err;
9cade1a4 AS	178
	179	pdata = dev_get_platdata(dev);
	180	if (!pdata)
	181	pdata = dw_dma_parse_dt(pdev);
175267b3 AS	182	if (!pdata && has_acpi_companion(dev)) {
	183	id = acpi_match_device(dev->driver->acpi_match_table, dev);
	184	if (id)
	185	pdata = (struct dw_dma_platform_data *)id->driver_data;
	186	}
9cade1a4 AS	187
	188	chip->dev = dev;
	189
a15636e8 AS	190	chip->clk = devm_clk_get(chip->dev, "hclk");
	191	if (IS_ERR(chip->clk))
	192	return PTR_ERR(chip->clk);
	193	err = clk_prepare_enable(chip->clk);
9cade1a4 AS	194	if (err)
	195	return err;
	196
6acf3998 AS	197	pm_runtime_enable(&pdev->dev);
6acf3998 AS	198
a15636e8 AS	199	err = dw_dma_probe(chip, pdata);
	200	if (err)
	201	goto err_dw_dma_probe;
	202
9cade1a4 AS	203	platform_set_drvdata(pdev, chip);
	204
	205	if (pdev->dev.of_node) {
	206	err = of_dma_controller_register(pdev->dev.of_node,
	207	dw_dma_of_xlate, chip->dw);
	208	if (err)
	209	dev_err(&pdev->dev,
	210	"could not register of_dma_controller\n");
	211	}
	212
	213	if (ACPI_HANDLE(&pdev->dev))
	214	dw_dma_acpi_controller_register(chip->dw);
	215
	216	return 0;
a15636e8 AS	217
a15636e8 AS	218	err_dw_dma_probe:
6acf3998	219	pm_runtime_disable(&pdev->dev);
a15636e8 AS	220	clk_disable_unprepare(chip->clk);
a15636e8 AS	221	return err;
9cade1a4 AS	222	}
	223
	224	static int dw_remove(struct platform_device *pdev)
	225	{
	226	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
	227
	228	if (pdev->dev.of_node)
	229	of_dma_controller_free(pdev->dev.of_node);
	230
a15636e8	231	dw_dma_remove(chip);
6acf3998	232	pm_runtime_disable(&pdev->dev);
a15636e8 AS	233	clk_disable_unprepare(chip->clk);
	234
	235	return 0;
9cade1a4 AS	236	}
	237
	238	static void dw_shutdown(struct platform_device *pdev)
	239	{
	240	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
	241
2540f74b	242	dw_dma_disable(chip);
a15636e8	243	clk_disable_unprepare(chip->clk);
9cade1a4 AS	244	}
	245
	246	#ifdef CONFIG_OF
	247	static const struct of_device_id dw_dma_of_id_table[] = {
	248	{ .compatible = "snps,dma-spear1340" },
	249	{}
	250	};
	251	MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
	252	#endif
	253
	254	#ifdef CONFIG_ACPI
175267b3 AS	255	static struct dw_dma_platform_data dw_dma_acpi_pdata = {
	256	.nr_channels = 8,
	257	.is_private = true,
	258	.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
	259	.chan_priority = CHAN_PRIORITY_ASCENDING,
	260	.block_size = 4095,
	261	.nr_masters = 2,
	262	};
	263
9cade1a4	264	static const struct acpi_device_id dw_dma_acpi_id_table[] = {
175267b3	265	{ "INTL9C60", (kernel_ulong_t)&dw_dma_acpi_pdata },
9cade1a4 AS	266	{ }
9cade1a4 AS	267	};
be480dcb	268	MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
9cade1a4 AS	269	#endif
	270
	271	#ifdef CONFIG_PM_SLEEP
	272
067bd4fd	273	static int dw_suspend_late(struct device *dev)
9cade1a4 AS	274	{
	275	struct platform_device *pdev = to_platform_device(dev);
	276	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
	277
2540f74b	278	dw_dma_disable(chip);
a15636e8 AS	279	clk_disable_unprepare(chip->clk);
	280
	281	return 0;
9cade1a4 AS	282	}
9cade1a4 AS	283
067bd4fd	284	static int dw_resume_early(struct device *dev)
9cade1a4 AS	285	{
	286	struct platform_device *pdev = to_platform_device(dev);
	287	struct dw_dma_chip *chip = platform_get_drvdata(pdev);
	288
a15636e8	289	clk_prepare_enable(chip->clk);
2540f74b	290	return dw_dma_enable(chip);
9cade1a4 AS	291	}
9cade1a4 AS	292
067bd4fd	293	#endif /* CONFIG_PM_SLEEP */
9cade1a4 AS	294
9cade1a4 AS	295	static const struct dev_pm_ops dw_dev_pm_ops = {
067bd4fd	296	SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
9cade1a4 AS	297	};
	298
	299	static struct platform_driver dw_driver = {
	300	.probe = dw_probe,
	301	.remove = dw_remove,
2540f74b	302	.shutdown = dw_shutdown,
9cade1a4	303	.driver = {
a104a45b	304	.name = DRV_NAME,
9cade1a4 AS	305	.pm = &dw_dev_pm_ops,
	306	.of_match_table = of_match_ptr(dw_dma_of_id_table),
	307	.acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
	308	},
	309	};
	310
	311	static int __init dw_init(void)
	312	{
	313	return platform_driver_register(&dw_driver);
	314	}
	315	subsys_initcall(dw_init);
	316
	317	static void __exit dw_exit(void)
	318	{
	319	platform_driver_unregister(&dw_driver);
	320	}
	321	module_exit(dw_exit);
	322
	323	MODULE_LICENSE("GPL v2");
	324	MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
a104a45b	325	MODULE_ALIAS("platform:" DRV_NAME);