Commit | Line | Data |
---|---|---|
91b99041 DJ |
1 | /* |
2 | * EDAC PCI component | |
3 | * | |
4 | * Author: Dave Jiang <djiang@mvista.com> | |
5 | * | |
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | |
7 | * the terms of the GNU General Public License version 2. This program | |
8 | * is licensed "as is" without any warranty of any kind, whether express | |
9 | * or implied. | |
10 | * | |
11 | */ | |
12 | #include <linux/module.h> | |
13 | #include <linux/types.h> | |
14 | #include <linux/smp.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/sysctl.h> | |
17 | #include <linux/highmem.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/slab.h> | |
20 | #include <linux/spinlock.h> | |
21 | #include <linux/list.h> | |
91b99041 DJ |
22 | #include <linux/ctype.h> |
23 | #include <linux/workqueue.h> | |
24 | #include <asm/uaccess.h> | |
25 | #include <asm/page.h> | |
26 | ||
27 | #include "edac_core.h" | |
28 | #include "edac_module.h" | |
29 | ||
30 | static DEFINE_MUTEX(edac_pci_ctls_mutex); | |
ff6ac2a6 | 31 | static LIST_HEAD(edac_pci_list); |
8641a384 | 32 | static atomic_t pci_indexes = ATOMIC_INIT(0); |
91b99041 | 33 | |
91b99041 | 34 | /* |
d4c1465b DT |
35 | * edac_pci_alloc_ctl_info |
36 | * | |
37 | * The alloc() function for the 'edac_pci' control info | |
38 | * structure. The chip driver will allocate one of these for each | |
39 | * edac_pci it is going to control/register with the EDAC CORE. | |
91b99041 | 40 | */ |
079708b9 | 41 | struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt, |
052dfb45 | 42 | const char *edac_pci_name) |
91b99041 DJ |
43 | { |
44 | struct edac_pci_ctl_info *pci; | |
93e4fe64 | 45 | void *p = NULL, *pvt; |
91b99041 DJ |
46 | unsigned int size; |
47 | ||
956b9ba1 | 48 | edac_dbg(1, "\n"); |
d4c1465b | 49 | |
93e4fe64 MCC |
50 | pci = edac_align_ptr(&p, sizeof(*pci), 1); |
51 | pvt = edac_align_ptr(&p, 1, sz_pvt); | |
91b99041 DJ |
52 | size = ((unsigned long)pvt) + sz_pvt; |
53 | ||
d4c1465b DT |
54 | /* Alloc the needed control struct memory */ |
55 | pci = kzalloc(size, GFP_KERNEL); | |
56 | if (pci == NULL) | |
91b99041 DJ |
57 | return NULL; |
58 | ||
d4c1465b | 59 | /* Now much private space */ |
91b99041 DJ |
60 | pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL; |
61 | ||
62 | pci->pvt_info = pvt; | |
91b99041 DJ |
63 | pci->op_state = OP_ALLOC; |
64 | ||
079708b9 | 65 | snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name); |
91b99041 DJ |
66 | |
67 | return pci; | |
68 | } | |
69 | EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info); | |
70 | ||
71 | /* | |
72 | * edac_pci_free_ctl_info() | |
d4c1465b DT |
73 | * |
74 | * Last action on the pci control structure. | |
75 | * | |
6f042b50 | 76 | * call the remove sysfs information, which will unregister |
d4c1465b DT |
77 | * this control struct's kobj. When that kobj's ref count |
78 | * goes to zero, its release function will be call and then | |
79 | * kfree() the memory. | |
91b99041 DJ |
80 | */ |
81 | void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci) | |
82 | { | |
956b9ba1 | 83 | edac_dbg(1, "\n"); |
079708b9 | 84 | |
d4c1465b DT |
85 | edac_pci_remove_sysfs(pci); |
86 | } | |
91b99041 DJ |
87 | EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info); |
88 | ||
89 | /* | |
90 | * find_edac_pci_by_dev() | |
91 | * scans the edac_pci list for a specific 'struct device *' | |
d4c1465b DT |
92 | * |
93 | * return NULL if not found, or return control struct pointer | |
91b99041 | 94 | */ |
079708b9 | 95 | static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev) |
91b99041 DJ |
96 | { |
97 | struct edac_pci_ctl_info *pci; | |
98 | struct list_head *item; | |
99 | ||
956b9ba1 | 100 | edac_dbg(1, "\n"); |
91b99041 DJ |
101 | |
102 | list_for_each(item, &edac_pci_list) { | |
103 | pci = list_entry(item, struct edac_pci_ctl_info, link); | |
104 | ||
105 | if (pci->dev == dev) | |
106 | return pci; | |
107 | } | |
108 | ||
109 | return NULL; | |
110 | } | |
111 | ||
112 | /* | |
113 | * add_edac_pci_to_global_list | |
114 | * Before calling this function, caller must assign a unique value to | |
115 | * edac_dev->pci_idx. | |
116 | * Return: | |
117 | * 0 on success | |
118 | * 1 on failure | |
119 | */ | |
120 | static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci) | |
121 | { | |
122 | struct list_head *item, *insert_before; | |
123 | struct edac_pci_ctl_info *rover; | |
124 | ||
956b9ba1 | 125 | edac_dbg(1, "\n"); |
d4c1465b | 126 | |
91b99041 DJ |
127 | insert_before = &edac_pci_list; |
128 | ||
129 | /* Determine if already on the list */ | |
d4c1465b DT |
130 | rover = find_edac_pci_by_dev(pci->dev); |
131 | if (unlikely(rover != NULL)) | |
91b99041 DJ |
132 | goto fail0; |
133 | ||
134 | /* Insert in ascending order by 'pci_idx', so find position */ | |
135 | list_for_each(item, &edac_pci_list) { | |
136 | rover = list_entry(item, struct edac_pci_ctl_info, link); | |
137 | ||
138 | if (rover->pci_idx >= pci->pci_idx) { | |
139 | if (unlikely(rover->pci_idx == pci->pci_idx)) | |
140 | goto fail1; | |
141 | ||
142 | insert_before = item; | |
143 | break; | |
144 | } | |
145 | } | |
146 | ||
147 | list_add_tail_rcu(&pci->link, insert_before); | |
148 | return 0; | |
149 | ||
052dfb45 | 150 | fail0: |
91b99041 | 151 | edac_printk(KERN_WARNING, EDAC_PCI, |
052dfb45 | 152 | "%s (%s) %s %s already assigned %d\n", |
281efb17 | 153 | dev_name(rover->dev), edac_dev_name(rover), |
052dfb45 | 154 | rover->mod_name, rover->ctl_name, rover->pci_idx); |
91b99041 DJ |
155 | return 1; |
156 | ||
052dfb45 | 157 | fail1: |
91b99041 | 158 | edac_printk(KERN_WARNING, EDAC_PCI, |
052dfb45 DT |
159 | "but in low-level driver: attempt to assign\n" |
160 | "\tduplicate pci_idx %d in %s()\n", rover->pci_idx, | |
161 | __func__); | |
91b99041 DJ |
162 | return 1; |
163 | } | |
164 | ||
91b99041 DJ |
165 | /* |
166 | * del_edac_pci_from_global_list | |
d4c1465b DT |
167 | * |
168 | * remove the PCI control struct from the global list | |
91b99041 DJ |
169 | */ |
170 | static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci) | |
171 | { | |
172 | list_del_rcu(&pci->link); | |
e2e77098 LJ |
173 | |
174 | /* these are for safe removal of devices from global list while | |
175 | * NMI handlers may be traversing list | |
176 | */ | |
177 | synchronize_rcu(); | |
178 | INIT_LIST_HEAD(&pci->link); | |
91b99041 DJ |
179 | } |
180 | ||
1a45027d AB |
181 | #if 0 |
182 | /* Older code, but might use in the future */ | |
183 | ||
91b99041 DJ |
184 | /* |
185 | * edac_pci_find() | |
186 | * Search for an edac_pci_ctl_info structure whose index is 'idx' | |
187 | * | |
188 | * If found, return a pointer to the structure | |
189 | * Else return NULL. | |
190 | * | |
191 | * Caller must hold pci_ctls_mutex. | |
192 | */ | |
079708b9 | 193 | struct edac_pci_ctl_info *edac_pci_find(int idx) |
91b99041 DJ |
194 | { |
195 | struct list_head *item; | |
196 | struct edac_pci_ctl_info *pci; | |
197 | ||
198 | /* Iterage over list, looking for exact match of ID */ | |
199 | list_for_each(item, &edac_pci_list) { | |
200 | pci = list_entry(item, struct edac_pci_ctl_info, link); | |
201 | ||
202 | if (pci->pci_idx >= idx) { | |
203 | if (pci->pci_idx == idx) | |
204 | return pci; | |
205 | ||
079708b9 | 206 | /* not on list, so terminate early */ |
91b99041 DJ |
207 | break; |
208 | } | |
209 | } | |
210 | ||
211 | return NULL; | |
212 | } | |
213 | EXPORT_SYMBOL_GPL(edac_pci_find); | |
1a45027d | 214 | #endif |
91b99041 DJ |
215 | |
216 | /* | |
217 | * edac_pci_workq_function() | |
d4c1465b DT |
218 | * |
219 | * periodic function that performs the operation | |
220 | * scheduled by a workq request, for a given PCI control struct | |
91b99041 | 221 | */ |
91b99041 DJ |
222 | static void edac_pci_workq_function(struct work_struct *work_req) |
223 | { | |
fbeb4384 | 224 | struct delayed_work *d_work = to_delayed_work(work_req); |
91b99041 | 225 | struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work); |
d4c1465b DT |
226 | int msec; |
227 | unsigned long delay; | |
91b99041 | 228 | |
956b9ba1 | 229 | edac_dbg(3, "checking\n"); |
91b99041 | 230 | |
d4c1465b | 231 | mutex_lock(&edac_pci_ctls_mutex); |
91b99041 | 232 | |
d4c1465b DT |
233 | if (pci->op_state == OP_RUNNING_POLL) { |
234 | /* we might be in POLL mode, but there may NOT be a poll func | |
235 | */ | |
236 | if ((pci->edac_check != NULL) && edac_pci_get_check_errors()) | |
237 | pci->edac_check(pci); | |
238 | ||
239 | /* if we are on a one second period, then use round */ | |
240 | msec = edac_pci_get_poll_msec(); | |
241 | if (msec == 1000) | |
c2ae24cf | 242 | delay = round_jiffies_relative(msecs_to_jiffies(msec)); |
d4c1465b DT |
243 | else |
244 | delay = msecs_to_jiffies(msec); | |
245 | ||
246 | /* Reschedule only if we are in POLL mode */ | |
247 | queue_delayed_work(edac_workqueue, &pci->work, delay); | |
248 | } | |
91b99041 | 249 | |
d4c1465b | 250 | mutex_unlock(&edac_pci_ctls_mutex); |
91b99041 DJ |
251 | } |
252 | ||
253 | /* | |
254 | * edac_pci_workq_setup() | |
255 | * initialize a workq item for this edac_pci instance | |
256 | * passing in the new delay period in msec | |
d4c1465b DT |
257 | * |
258 | * locking model: | |
259 | * called when 'edac_pci_ctls_mutex' is locked | |
91b99041 DJ |
260 | */ |
261 | static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci, | |
079708b9 | 262 | unsigned int msec) |
91b99041 | 263 | { |
956b9ba1 | 264 | edac_dbg(0, "\n"); |
91b99041 | 265 | |
91b99041 | 266 | INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function); |
4de78c68 | 267 | queue_delayed_work(edac_workqueue, &pci->work, |
052dfb45 | 268 | msecs_to_jiffies(edac_pci_get_poll_msec())); |
91b99041 DJ |
269 | } |
270 | ||
271 | /* | |
272 | * edac_pci_workq_teardown() | |
273 | * stop the workq processing on this edac_pci instance | |
274 | */ | |
275 | static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci) | |
276 | { | |
277 | int status; | |
278 | ||
956b9ba1 | 279 | edac_dbg(0, "\n"); |
d4c1465b | 280 | |
91b99041 DJ |
281 | status = cancel_delayed_work(&pci->work); |
282 | if (status == 0) | |
283 | flush_workqueue(edac_workqueue); | |
284 | } | |
285 | ||
286 | /* | |
287 | * edac_pci_reset_delay_period | |
d4c1465b DT |
288 | * |
289 | * called with a new period value for the workq period | |
290 | * a) stop current workq timer | |
291 | * b) restart workq timer with new value | |
91b99041 DJ |
292 | */ |
293 | void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci, | |
079708b9 | 294 | unsigned long value) |
91b99041 | 295 | { |
956b9ba1 | 296 | edac_dbg(0, "\n"); |
91b99041 DJ |
297 | |
298 | edac_pci_workq_teardown(pci); | |
299 | ||
d4c1465b DT |
300 | /* need to lock for the setup */ |
301 | mutex_lock(&edac_pci_ctls_mutex); | |
302 | ||
91b99041 DJ |
303 | edac_pci_workq_setup(pci, value); |
304 | ||
d4c1465b | 305 | mutex_unlock(&edac_pci_ctls_mutex); |
91b99041 DJ |
306 | } |
307 | EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period); | |
308 | ||
8641a384 HC |
309 | /* |
310 | * edac_pci_alloc_index: Allocate a unique PCI index number | |
311 | * | |
312 | * Return: | |
313 | * allocated index number | |
314 | * | |
315 | */ | |
316 | int edac_pci_alloc_index(void) | |
317 | { | |
318 | return atomic_inc_return(&pci_indexes) - 1; | |
319 | } | |
320 | EXPORT_SYMBOL_GPL(edac_pci_alloc_index); | |
321 | ||
91b99041 DJ |
322 | /* |
323 | * edac_pci_add_device: Insert the 'edac_dev' structure into the | |
324 | * edac_pci global list and create sysfs entries associated with | |
325 | * edac_pci structure. | |
326 | * @pci: pointer to the edac_device structure to be added to the list | |
327 | * @edac_idx: A unique numeric identifier to be assigned to the | |
328 | * 'edac_pci' structure. | |
329 | * | |
330 | * Return: | |
331 | * 0 Success | |
332 | * !0 Failure | |
333 | */ | |
334 | int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx) | |
335 | { | |
956b9ba1 | 336 | edac_dbg(0, "\n"); |
91b99041 DJ |
337 | |
338 | pci->pci_idx = edac_idx; | |
d4c1465b | 339 | pci->start_time = jiffies; |
91b99041 | 340 | |
d4c1465b | 341 | mutex_lock(&edac_pci_ctls_mutex); |
91b99041 DJ |
342 | |
343 | if (add_edac_pci_to_global_list(pci)) | |
344 | goto fail0; | |
345 | ||
91b99041 DJ |
346 | if (edac_pci_create_sysfs(pci)) { |
347 | edac_pci_printk(pci, KERN_WARNING, | |
348 | "failed to create sysfs pci\n"); | |
349 | goto fail1; | |
350 | } | |
351 | ||
352 | if (pci->edac_check != NULL) { | |
353 | pci->op_state = OP_RUNNING_POLL; | |
354 | ||
355 | edac_pci_workq_setup(pci, 1000); | |
356 | } else { | |
357 | pci->op_state = OP_RUNNING_INTERRUPT; | |
358 | } | |
359 | ||
360 | edac_pci_printk(pci, KERN_INFO, | |
079708b9 DT |
361 | "Giving out device to module '%s' controller '%s':" |
362 | " DEV '%s' (%s)\n", | |
363 | pci->mod_name, | |
364 | pci->ctl_name, | |
17aa7e03 | 365 | edac_dev_name(pci), edac_op_state_to_string(pci->op_state)); |
91b99041 | 366 | |
d4c1465b | 367 | mutex_unlock(&edac_pci_ctls_mutex); |
91b99041 DJ |
368 | return 0; |
369 | ||
d4c1465b | 370 | /* error unwind stack */ |
052dfb45 | 371 | fail1: |
91b99041 | 372 | del_edac_pci_from_global_list(pci); |
052dfb45 | 373 | fail0: |
d4c1465b | 374 | mutex_unlock(&edac_pci_ctls_mutex); |
91b99041 DJ |
375 | return 1; |
376 | } | |
377 | EXPORT_SYMBOL_GPL(edac_pci_add_device); | |
378 | ||
379 | /* | |
380 | * edac_pci_del_device() | |
381 | * Remove sysfs entries for specified edac_pci structure and | |
382 | * then remove edac_pci structure from global list | |
383 | * | |
384 | * @dev: | |
385 | * Pointer to 'struct device' representing edac_pci structure | |
386 | * to remove | |
387 | * | |
388 | * Return: | |
389 | * Pointer to removed edac_pci structure, | |
390 | * or NULL if device not found | |
391 | */ | |
079708b9 | 392 | struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev) |
91b99041 DJ |
393 | { |
394 | struct edac_pci_ctl_info *pci; | |
395 | ||
956b9ba1 | 396 | edac_dbg(0, "\n"); |
91b99041 | 397 | |
d4c1465b | 398 | mutex_lock(&edac_pci_ctls_mutex); |
91b99041 | 399 | |
d4c1465b DT |
400 | /* ensure the control struct is on the global list |
401 | * if not, then leave | |
402 | */ | |
403 | pci = find_edac_pci_by_dev(dev); | |
404 | if (pci == NULL) { | |
405 | mutex_unlock(&edac_pci_ctls_mutex); | |
91b99041 DJ |
406 | return NULL; |
407 | } | |
408 | ||
409 | pci->op_state = OP_OFFLINE; | |
410 | ||
91b99041 DJ |
411 | del_edac_pci_from_global_list(pci); |
412 | ||
d4c1465b DT |
413 | mutex_unlock(&edac_pci_ctls_mutex); |
414 | ||
415 | /* stop the workq timer */ | |
416 | edac_pci_workq_teardown(pci); | |
91b99041 DJ |
417 | |
418 | edac_printk(KERN_INFO, EDAC_PCI, | |
052dfb45 | 419 | "Removed device %d for %s %s: DEV %s\n", |
17aa7e03 | 420 | pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci)); |
91b99041 DJ |
421 | |
422 | return pci; | |
423 | } | |
424 | EXPORT_SYMBOL_GPL(edac_pci_del_device); | |
425 | ||
d4c1465b DT |
426 | /* |
427 | * edac_pci_generic_check | |
428 | * | |
429 | * a Generic parity check API | |
430 | */ | |
1a45027d | 431 | static void edac_pci_generic_check(struct edac_pci_ctl_info *pci) |
91b99041 | 432 | { |
956b9ba1 | 433 | edac_dbg(4, "\n"); |
91b99041 DJ |
434 | edac_pci_do_parity_check(); |
435 | } | |
436 | ||
d4c1465b | 437 | /* free running instance index counter */ |
f044091c | 438 | static int edac_pci_idx; |
91b99041 DJ |
439 | #define EDAC_PCI_GENCTL_NAME "EDAC PCI controller" |
440 | ||
441 | struct edac_pci_gen_data { | |
442 | int edac_idx; | |
443 | }; | |
444 | ||
d4c1465b DT |
445 | /* |
446 | * edac_pci_create_generic_ctl | |
447 | * | |
448 | * A generic constructor for a PCI parity polling device | |
449 | * Some systems have more than one domain of PCI busses. | |
450 | * For systems with one domain, then this API will | |
451 | * provide for a generic poller. | |
452 | * | |
453 | * This routine calls the edac_pci_alloc_ctl_info() for | |
454 | * the generic device, with default values | |
455 | */ | |
079708b9 | 456 | struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev, |
052dfb45 | 457 | const char *mod_name) |
91b99041 DJ |
458 | { |
459 | struct edac_pci_ctl_info *pci; | |
460 | struct edac_pci_gen_data *pdata; | |
461 | ||
462 | pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME); | |
463 | if (!pci) | |
464 | return NULL; | |
465 | ||
466 | pdata = pci->pvt_info; | |
467 | pci->dev = dev; | |
468 | dev_set_drvdata(pci->dev, pci); | |
469 | pci->dev_name = pci_name(to_pci_dev(dev)); | |
470 | ||
471 | pci->mod_name = mod_name; | |
472 | pci->ctl_name = EDAC_PCI_GENCTL_NAME; | |
876bb331 BP |
473 | if (edac_op_state == EDAC_OPSTATE_POLL) |
474 | pci->edac_check = edac_pci_generic_check; | |
91b99041 DJ |
475 | |
476 | pdata->edac_idx = edac_pci_idx++; | |
477 | ||
478 | if (edac_pci_add_device(pci, pdata->edac_idx) > 0) { | |
956b9ba1 | 479 | edac_dbg(3, "failed edac_pci_add_device()\n"); |
91b99041 DJ |
480 | edac_pci_free_ctl_info(pci); |
481 | return NULL; | |
482 | } | |
483 | ||
484 | return pci; | |
485 | } | |
486 | EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl); | |
487 | ||
d4c1465b DT |
488 | /* |
489 | * edac_pci_release_generic_ctl | |
490 | * | |
491 | * The release function of a generic EDAC PCI polling device | |
492 | */ | |
91b99041 DJ |
493 | void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci) |
494 | { | |
956b9ba1 | 495 | edac_dbg(0, "pci mod=%s\n", pci->mod_name); |
d4c1465b | 496 | |
91b99041 DJ |
497 | edac_pci_del_device(pci->dev); |
498 | edac_pci_free_ctl_info(pci); | |
499 | } | |
500 | EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl); |