[deliverable/linux.git] / drivers / gpio / gpio-104-idi-48.c

/*
 * GPIO driver for the ACCES 104-IDI-48 family
 * Copyright (C) 2015 William Breathitt Gray
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, version 2, as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 */
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/gpio/driver.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/irqdesc.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>

static unsigned idi_48_base;
module_param(idi_48_base, uint, 0);
MODULE_PARM_DESC(idi_48_base, "ACCES 104-IDI-48 base address");
static unsigned idi_48_irq;
module_param(idi_48_irq, uint, 0);
MODULE_PARM_DESC(idi_48_irq, "ACCES 104-IDI-48 interrupt line number");

/**
 * struct idi_48_gpio - GPIO device private data structure
 * @chip:	instance of the gpio_chip
 * @lock:	synchronization lock to prevent I/O race conditions
 * @ack_lock:	synchronization lock to prevent IRQ handler race conditions
 * @irq_mask:	input bits affected by interrupts
 * @base:	base port address of the GPIO device
 * @extent:	extent of port address region of the GPIO device
 * @irq:	Interrupt line number
 * @cos_enb:	Change-Of-State IRQ enable boundaries mask
 */
struct idi_48_gpio {
	struct gpio_chip chip;
	spinlock_t lock;
	spinlock_t ack_lock;
	unsigned char irq_mask[6];
	unsigned base;
	unsigned extent;
	unsigned irq;
	unsigned char cos_enb;
};

static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
	return 1;
}

static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
	return 0;
}

static struct idi_48_gpio *to_idi48gpio(struct gpio_chip *gc)
{
	return container_of(gc, struct idi_48_gpio, chip);
}

static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset)
{
	struct idi_48_gpio *const idi48gpio = to_idi48gpio(chip);
	unsigned i;
	const unsigned register_offset[6] = { 0, 1, 2, 4, 5, 6 };
	unsigned base_offset;
	unsigned mask;

	for (i = 0; i < 48; i += 8)
		if (offset < i + 8) {
			base_offset = register_offset[i / 8];
			mask = BIT(offset - i);

			return !!(inb(idi48gpio->base + base_offset) & mask);
		}

	/* The following line should never execute since offset < 48 */
	return 0;
}

static void idi_48_irq_ack(struct irq_data *data)
{
}

static void idi_48_irq_mask(struct irq_data *data)
{
	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
	struct idi_48_gpio *const idi48gpio = to_idi48gpio(chip);
	const unsigned offset = irqd_to_hwirq(data);
	unsigned i;
	unsigned mask;
	unsigned boundary;
	unsigned long flags;

	for (i = 0; i < 48; i += 8)
		if (offset < i + 8) {
			mask = BIT(offset - i);
			boundary = i / 8;

			idi48gpio->irq_mask[boundary] &= ~mask;

			if (!idi48gpio->irq_mask[boundary]) {
				idi48gpio->cos_enb &= ~BIT(boundary);

				spin_lock_irqsave(&idi48gpio->lock, flags);

				outb(idi48gpio->cos_enb, idi48gpio->base + 7);

				spin_unlock_irqrestore(&idi48gpio->lock, flags);
			}

			return;
		}
}

static void idi_48_irq_unmask(struct irq_data *data)
{
	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
	struct idi_48_gpio *const idi48gpio = to_idi48gpio(chip);
	const unsigned offset = irqd_to_hwirq(data);
	unsigned i;
	unsigned mask;
	unsigned boundary;
	unsigned prev_irq_mask;
	unsigned long flags;

	for (i = 0; i < 48; i += 8)
		if (offset < i + 8) {
			mask = BIT(offset - i);
			boundary = i / 8;
			prev_irq_mask = idi48gpio->irq_mask[boundary];

			idi48gpio->irq_mask[boundary] |= mask;

			if (!prev_irq_mask) {
				idi48gpio->cos_enb |= BIT(boundary);

				spin_lock_irqsave(&idi48gpio->lock, flags);

				outb(idi48gpio->cos_enb, idi48gpio->base + 7);

				spin_unlock_irqrestore(&idi48gpio->lock, flags);
			}

			return;
		}
}

static int idi_48_irq_set_type(struct irq_data *data, unsigned flow_type)
{
	/* The only valid irq types are none and both-edges */
	if (flow_type != IRQ_TYPE_NONE &&
		(flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
		return -EINVAL;

	return 0;
}

static struct irq_chip idi_48_irqchip = {
	.name = "104-idi-48",
	.irq_ack = idi_48_irq_ack,
	.irq_mask = idi_48_irq_mask,
	.irq_unmask = idi_48_irq_unmask,
	.irq_set_type = idi_48_irq_set_type
};

static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
{
	struct idi_48_gpio *const idi48gpio = dev_id;
	unsigned long cos_status;
	unsigned long boundary;
	unsigned long irq_mask;
	unsigned long bit_num;
	unsigned long gpio;
	struct gpio_chip *const chip = &idi48gpio->chip;

	spin_lock(&idi48gpio->ack_lock);

	spin_lock(&idi48gpio->lock);

	cos_status = inb(idi48gpio->base + 7);

	spin_unlock(&idi48gpio->lock);

	/* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */
	if (cos_status & BIT(6)) {
		spin_unlock(&idi48gpio->ack_lock);
		return IRQ_NONE;
	}

	/* Bit 0-5 indicate which Change-Of-State boundary triggered the IRQ */
	cos_status &= 0x3F;

	for_each_set_bit(boundary, &cos_status, 6) {
		irq_mask = idi48gpio->irq_mask[boundary];

		for_each_set_bit(bit_num, &irq_mask, 8) {
			gpio = bit_num + boundary * 8;

			generic_handle_irq(irq_find_mapping(chip->irqdomain,
				gpio));
		}
	}

	spin_unlock(&idi48gpio->ack_lock);

	return IRQ_HANDLED;
}

static int __init idi_48_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct idi_48_gpio *idi48gpio;
	const unsigned base = idi_48_base;
	const unsigned extent = 8;
	const char *const name = dev_name(dev);
	int err;
	const unsigned irq = idi_48_irq;

	idi48gpio = devm_kzalloc(dev, sizeof(*idi48gpio), GFP_KERNEL);
	if (!idi48gpio)
		return -ENOMEM;

	if (!request_region(base, extent, name)) {
		dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n",
			name, base, base + extent);
		err = -EBUSY;
		goto err_lock_io_port;
	}

	idi48gpio->chip.label = name;
	idi48gpio->chip.parent = dev;
	idi48gpio->chip.owner = THIS_MODULE;
	idi48gpio->chip.base = -1;
	idi48gpio->chip.ngpio = 48;
	idi48gpio->chip.get_direction = idi_48_gpio_get_direction;
	idi48gpio->chip.direction_input = idi_48_gpio_direction_input;
	idi48gpio->chip.get = idi_48_gpio_get;
	idi48gpio->base = base;
	idi48gpio->extent = extent;
	idi48gpio->irq = irq;

	spin_lock_init(&idi48gpio->lock);

	dev_set_drvdata(dev, idi48gpio);

	err = gpiochip_add(&idi48gpio->chip);
	if (err) {
		dev_err(dev, "GPIO registering failed (%d)\n", err);
		goto err_gpio_register;
	}

	/* Disable IRQ by default */
	outb(0, base + 7);
	inb(base + 7);

	err = gpiochip_irqchip_add(&idi48gpio->chip, &idi_48_irqchip, 0,
		handle_edge_irq, IRQ_TYPE_NONE);
	if (err) {
		dev_err(dev, "Could not add irqchip (%d)\n", err);
		goto err_gpiochip_irqchip_add;
	}

	err = request_irq(irq, idi_48_irq_handler, 0, name, idi48gpio);
	if (err) {
		dev_err(dev, "IRQ handler registering failed (%d)\n", err);
		goto err_request_irq;
	}

	return 0;

err_request_irq:
err_gpiochip_irqchip_add:
	gpiochip_remove(&idi48gpio->chip);
err_gpio_register:
	release_region(base, extent);
err_lock_io_port:
	return err;
}

static int idi_48_remove(struct platform_device *pdev)
{
	struct idi_48_gpio *const idi48gpio = platform_get_drvdata(pdev);

	free_irq(idi48gpio->irq, idi48gpio);
	gpiochip_remove(&idi48gpio->chip);
	release_region(idi48gpio->base, idi48gpio->extent);

	return 0;
}

static struct platform_device *idi_48_device;

static struct platform_driver idi_48_driver = {
	.driver = {
		.name = "104-idi-48"
	},
	.remove = idi_48_remove
};

static void __exit idi_48_exit(void)
{
	platform_device_unregister(idi_48_device);
	platform_driver_unregister(&idi_48_driver);
}

static int __init idi_48_init(void)
{
	int err;

	idi_48_device = platform_device_alloc(idi_48_driver.driver.name, -1);
	if (!idi_48_device)
		return -ENOMEM;

	err = platform_device_add(idi_48_device);
	if (err)
		goto err_platform_device;

	err = platform_driver_probe(&idi_48_driver, idi_48_probe);
	if (err)
		goto err_platform_driver;

	return 0;

err_platform_driver:
	platform_device_del(idi_48_device);
err_platform_device:
	platform_device_put(idi_48_device);
	return err;
}

module_init(idi_48_init);
module_exit(idi_48_exit);

MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
6ddcf9b4 WBG	1	/*
	2	* GPIO driver for the ACCES 104-IDI-48 family
	3	* Copyright (C) 2015 William Breathitt Gray
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License, version 2, as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful, but
	10	* WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	12	* General Public License for more details.
	13	*/
	14	#include <linux/bitops.h>
	15	#include <linux/device.h>
	16	#include <linux/errno.h>
	17	#include <linux/gpio/driver.h>
	18	#include <linux/io.h>
	19	#include <linux/ioport.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/irqdesc.h>
	22	#include <linux/kernel.h>
	23	#include <linux/module.h>
	24	#include <linux/moduleparam.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/spinlock.h>
	27
	28	static unsigned idi_48_base;
	29	module_param(idi_48_base, uint, 0);
	30	MODULE_PARM_DESC(idi_48_base, "ACCES 104-IDI-48 base address");
	31	static unsigned idi_48_irq;
	32	module_param(idi_48_irq, uint, 0);
	33	MODULE_PARM_DESC(idi_48_irq, "ACCES 104-IDI-48 interrupt line number");
	34
	35	/**
	36	* struct idi_48_gpio - GPIO device private data structure
	37	* @chip: instance of the gpio_chip
	38	* @lock: synchronization lock to prevent I/O race conditions
9ae48210	39	* @ack_lock: synchronization lock to prevent IRQ handler race conditions
6ddcf9b4 WBG	40	* @irq_mask: input bits affected by interrupts
	41	* @base: base port address of the GPIO device
	42	* @extent: extent of port address region of the GPIO device
	43	* @irq: Interrupt line number
	44	* @cos_enb: Change-Of-State IRQ enable boundaries mask
	45	*/
	46	struct idi_48_gpio {
	47	struct gpio_chip chip;
	48	spinlock_t lock;
9ae48210	49	spinlock_t ack_lock;
6ddcf9b4 WBG	50	unsigned char irq_mask[6];
	51	unsigned base;
	52	unsigned extent;
	53	unsigned irq;
	54	unsigned char cos_enb;
	55	};
	56
	57	static int idi_48_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
	58	{
	59	return 1;
	60	}
	61
	62	static int idi_48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
	63	{
	64	return 0;
	65	}
	66
	67	static struct idi_48_gpio to_idi48gpio(struct gpio_chip gc)
	68	{
	69	return container_of(gc, struct idi_48_gpio, chip);
	70	}
	71
	72	static int idi_48_gpio_get(struct gpio_chip *chip, unsigned offset)
	73	{
	74	struct idi_48_gpio *const idi48gpio = to_idi48gpio(chip);
	75	unsigned i;
	76	const unsigned register_offset[6] = { 0, 1, 2, 4, 5, 6 };
	77	unsigned base_offset;
	78	unsigned mask;
	79
	80	for (i = 0; i < 48; i += 8)
	81	if (offset < i + 8) {
	82	base_offset = register_offset[i / 8];
	83	mask = BIT(offset - i);
	84
	85	return !!(inb(idi48gpio->base + base_offset) & mask);
	86	}
	87
	88	/* The following line should never execute since offset < 48 */
	89	return 0;
	90	}
	91
	92	static void idi_48_irq_ack(struct irq_data *data)
	93	{
6ddcf9b4 WBG	94	}
	95
	96	static void idi_48_irq_mask(struct irq_data *data)
	97	{
	98	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
	99	struct idi_48_gpio *const idi48gpio = to_idi48gpio(chip);
	100	const unsigned offset = irqd_to_hwirq(data);
	101	unsigned i;
	102	unsigned mask;
	103	unsigned boundary;
	104	unsigned long flags;
	105
	106	for (i = 0; i < 48; i += 8)
	107	if (offset < i + 8) {
	108	mask = BIT(offset - i);
	109	boundary = i / 8;
	110
	111	idi48gpio->irq_mask[boundary] &= ~mask;
	112
	113	if (!idi48gpio->irq_mask[boundary]) {
	114	idi48gpio->cos_enb &= ~BIT(boundary);
	115
	116	spin_lock_irqsave(&idi48gpio->lock, flags);
	117
	118	outb(idi48gpio->cos_enb, idi48gpio->base + 7);
	119
	120	spin_unlock_irqrestore(&idi48gpio->lock, flags);
	121	}
	122
	123	return;
	124	}
	125	}
	126
	127	static void idi_48_irq_unmask(struct irq_data *data)
	128	{
	129	struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
	130	struct idi_48_gpio *const idi48gpio = to_idi48gpio(chip);
	131	const unsigned offset = irqd_to_hwirq(data);
	132	unsigned i;
	133	unsigned mask;
	134	unsigned boundary;
	135	unsigned prev_irq_mask;
	136	unsigned long flags;
	137
	138	for (i = 0; i < 48; i += 8)
	139	if (offset < i + 8) {
	140	mask = BIT(offset - i);
	141	boundary = i / 8;
	142	prev_irq_mask = idi48gpio->irq_mask[boundary];
	143
	144	idi48gpio->irq_mask[boundary] \|= mask;
	145
	146	if (!prev_irq_mask) {
	147	idi48gpio->cos_enb \|= BIT(boundary);
	148
	149	spin_lock_irqsave(&idi48gpio->lock, flags);
	150
	151	outb(idi48gpio->cos_enb, idi48gpio->base + 7);
	152
	153	spin_unlock_irqrestore(&idi48gpio->lock, flags);
	154	}
	155
	156	return;
	157	}
158	}
159
160	static int idi_48_irq_set_type(struct irq_data *data, unsigned flow_type)
161	{
162	/* The only valid irq types are none and both-edges */
163	if (flow_type != IRQ_TYPE_NONE &&
164	(flow_type & IRQ_TYPE_EDGE_BOTH) != IRQ_TYPE_EDGE_BOTH)
165	return -EINVAL;
166
167	return 0;
168	}
169
170	static struct irq_chip idi_48_irqchip = {
171	.name = "104-idi-48",
172	.irq_ack = idi_48_irq_ack,
173	.irq_mask = idi_48_irq_mask,
174	.irq_unmask = idi_48_irq_unmask,
175	.irq_set_type = idi_48_irq_set_type
176	};
177
178	static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
179	{
180	struct idi_48_gpio *const idi48gpio = dev_id;
181	unsigned long cos_status;
182	unsigned long boundary;
183	unsigned long irq_mask;
184	unsigned long bit_num;
185	unsigned long gpio;
186	struct gpio_chip *const chip = &idi48gpio->chip;
187
9ae48210 WBG	188	spin_lock(&idi48gpio->ack_lock);
9ae48210 WBG	189
6ddcf9b4 WBG	190	spin_lock(&idi48gpio->lock);
	191
	192	cos_status = inb(idi48gpio->base + 7);
	193
	194	spin_unlock(&idi48gpio->lock);
	195
	196	/* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */
9ae48210 WBG	197	if (cos_status & BIT(6)) {
9ae48210 WBG	198	spin_unlock(&idi48gpio->ack_lock);
6ddcf9b4	199	return IRQ_NONE;
9ae48210	200	}
6ddcf9b4 WBG	201
	202	/* Bit 0-5 indicate which Change-Of-State boundary triggered the IRQ */
	203	cos_status &= 0x3F;
	204
	205	for_each_set_bit(boundary, &cos_status, 6) {
	206	irq_mask = idi48gpio->irq_mask[boundary];
	207
	208	for_each_set_bit(bit_num, &irq_mask, 8) {
	209	gpio = bit_num + boundary * 8;
	210
	211	generic_handle_irq(irq_find_mapping(chip->irqdomain,
	212	gpio));
	213	}
	214	}
	215
9ae48210 WBG	216	spin_unlock(&idi48gpio->ack_lock);
9ae48210 WBG	217
6ddcf9b4 WBG	218	return IRQ_HANDLED;
	219	}
	220
	221	static int __init idi_48_probe(struct platform_device *pdev)
	222	{
	223	struct device *dev = &pdev->dev;
	224	struct idi_48_gpio *idi48gpio;
	225	const unsigned base = idi_48_base;
	226	const unsigned extent = 8;
	227	const char *const name = dev_name(dev);
	228	int err;
	229	const unsigned irq = idi_48_irq;
	230
	231	idi48gpio = devm_kzalloc(dev, sizeof(*idi48gpio), GFP_KERNEL);
	232	if (!idi48gpio)
	233	return -ENOMEM;
	234
	235	if (!request_region(base, extent, name)) {
	236	dev_err(dev, "Unable to lock %s port addresses (0x%X-0x%X)\n",
	237	name, base, base + extent);
	238	err = -EBUSY;
	239	goto err_lock_io_port;
	240	}
	241
	242	idi48gpio->chip.label = name;
	243	idi48gpio->chip.parent = dev;
	244	idi48gpio->chip.owner = THIS_MODULE;
	245	idi48gpio->chip.base = -1;
	246	idi48gpio->chip.ngpio = 48;
	247	idi48gpio->chip.get_direction = idi_48_gpio_get_direction;
	248	idi48gpio->chip.direction_input = idi_48_gpio_direction_input;
	249	idi48gpio->chip.get = idi_48_gpio_get;
	250	idi48gpio->base = base;
	251	idi48gpio->extent = extent;
	252	idi48gpio->irq = irq;
	253
	254	spin_lock_init(&idi48gpio->lock);
	255
	256	dev_set_drvdata(dev, idi48gpio);
	257
	258	err = gpiochip_add(&idi48gpio->chip);
	259	if (err) {
	260	dev_err(dev, "GPIO registering failed (%d)\n", err);
	261	goto err_gpio_register;
	262	}
	263
	264	/* Disable IRQ by default */
	265	outb(0, base + 7);
	266	inb(base + 7);
	267
	268	err = gpiochip_irqchip_add(&idi48gpio->chip, &idi_48_irqchip, 0,
	269	handle_edge_irq, IRQ_TYPE_NONE);
	270	if (err) {
	271	dev_err(dev, "Could not add irqchip (%d)\n", err);
	272	goto err_gpiochip_irqchip_add;
	273	}
	274
	275	err = request_irq(irq, idi_48_irq_handler, 0, name, idi48gpio);
	276	if (err) {
	277	dev_err(dev, "IRQ handler registering failed (%d)\n", err);
	278	goto err_request_irq;
	279	}
	280
	281	return 0;
282
283	err_request_irq:
284	err_gpiochip_irqchip_add:
285	gpiochip_remove(&idi48gpio->chip);
286	err_gpio_register:
287	release_region(base, extent);
288	err_lock_io_port:
289	return err;
290	}
291
292	static int idi_48_remove(struct platform_device *pdev)
293	{
294	struct idi_48_gpio *const idi48gpio = platform_get_drvdata(pdev);
295
296	free_irq(idi48gpio->irq, idi48gpio);
297	gpiochip_remove(&idi48gpio->chip);
298	release_region(idi48gpio->base, idi48gpio->extent);
299
300	return 0;
301	}
302
303	static struct platform_device *idi_48_device;
304
305	static struct platform_driver idi_48_driver = {
306	.driver = {
307	.name = "104-idi-48"
308	},
309	.remove = idi_48_remove
310	};
311
312	static void __exit idi_48_exit(void)
313	{
314	platform_device_unregister(idi_48_device);
315	platform_driver_unregister(&idi_48_driver);
316	}
317
318	static int __init idi_48_init(void)
319	{
320	int err;
321
322	idi_48_device = platform_device_alloc(idi_48_driver.driver.name, -1);
323	if (!idi_48_device)
324	return -ENOMEM;
325
326	err = platform_device_add(idi_48_device);
327	if (err)
328	goto err_platform_device;
329
330	err = platform_driver_probe(&idi_48_driver, idi_48_probe);
331	if (err)
332	goto err_platform_driver;
333
334	return 0;
335
336	err_platform_driver:
337	platform_device_del(idi_48_device);
338	err_platform_device:
339	platform_device_put(idi_48_device);
340	return err;
341	}
342
343	module_init(idi_48_init);
344	module_exit(idi_48_exit);
345
346	MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
347	MODULE_DESCRIPTION("ACCES 104-IDI-48 GPIO driver");
348	MODULE_LICENSE("GPL");