gpio: ath79: Move to the generic GPIO driver
[deliverable/linux.git] / drivers / gpio / gpio-ath79.c
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1/*
2 * Atheros AR71XX/AR724X/AR913X GPIO API support
3 *
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4 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
5 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 *
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8 * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
9 *
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10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14
49a5bd88 15#include <linux/gpio/driver.h>
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16#include <linux/platform_data/gpio-ath79.h>
17#include <linux/of_device.h>
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18
19#include <asm/mach-ath79/ar71xx_regs.h>
6eae43c5 20
49a5bd88 21struct ath79_gpio_ctrl {
ab32770e 22 struct gpio_chip gc;
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23 void __iomem *base;
24 spinlock_t lock;
25};
26
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27static const struct of_device_id ath79_gpio_of_match[] = {
28 { .compatible = "qca,ar7100-gpio" },
29 { .compatible = "qca,ar9340-gpio" },
30 {},
31};
32
33static int ath79_gpio_probe(struct platform_device *pdev)
6eae43c5 34{
ab128afc 35 struct ath79_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev);
2ddf3a79 36 struct device_node *np = pdev->dev.of_node;
49a5bd88 37 struct ath79_gpio_ctrl *ctrl;
2ddf3a79 38 struct resource *res;
49a5bd88 39 u32 ath79_gpio_count;
2ddf3a79 40 bool oe_inverted;
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41 int err;
42
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43 ctrl = devm_kzalloc(&pdev->dev, sizeof(*ctrl), GFP_KERNEL);
44 if (!ctrl)
45 return -ENOMEM;
46
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47 if (np) {
48 err = of_property_read_u32(np, "ngpios", &ath79_gpio_count);
49 if (err) {
50 dev_err(&pdev->dev, "ngpios property is not valid\n");
51 return err;
52 }
53 if (ath79_gpio_count >= 32) {
54 dev_err(&pdev->dev, "ngpios must be less than 32\n");
55 return -EINVAL;
56 }
57 oe_inverted = of_device_is_compatible(np, "qca,ar9340-gpio");
58 } else if (pdata) {
59 ath79_gpio_count = pdata->ngpios;
60 oe_inverted = pdata->oe_inverted;
61 } else {
62 dev_err(&pdev->dev, "No DT node or platform data found\n");
63 return -EINVAL;
64 }
65
66 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
49a5bd88 67 ctrl->base = devm_ioremap_nocache(
2ddf3a79 68 &pdev->dev, res->start, resource_size(res));
49a5bd88 69 if (!ctrl->base)
2ddf3a79 70 return -ENOMEM;
6eae43c5 71
49a5bd88 72 spin_lock_init(&ctrl->lock);
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73 err = bgpio_init(&ctrl->gc, &pdev->dev, 4,
74 ctrl->base + AR71XX_GPIO_REG_IN,
75 ctrl->base + AR71XX_GPIO_REG_SET,
76 ctrl->base + AR71XX_GPIO_REG_CLEAR,
77 oe_inverted ? NULL : ctrl->base + AR71XX_GPIO_REG_OE,
78 oe_inverted ? ctrl->base + AR71XX_GPIO_REG_OE : NULL,
79 0);
80 if (err) {
81 dev_err(&pdev->dev, "bgpio_init failed\n");
82 return err;
5b5b544e 83 }
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84 /* Use base 0 to stay compatible with legacy platforms */
85 ctrl->gc.base = 0;
6eae43c5 86
ab32770e 87 err = gpiochip_add_data(&ctrl->gc, ctrl);
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88 if (err) {
89 dev_err(&pdev->dev,
90 "cannot add AR71xx GPIO chip, error=%d", err);
91 return err;
92 }
93
94 return 0;
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95}
96
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97static struct platform_driver ath79_gpio_driver = {
98 .driver = {
99 .name = "ath79-gpio",
100 .of_match_table = ath79_gpio_of_match,
101 },
102 .probe = ath79_gpio_probe,
103};
104
105module_platform_driver(ath79_gpio_driver);
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