Commit | Line | Data |
---|---|---|
bbcd6d54 | 1 | /* |
c103de24 | 2 | * MAX732x I2C Port Expander with 8/16 I/O |
bbcd6d54 EM |
3 | * |
4 | * Copyright (C) 2007 Marvell International Ltd. | |
5 | * Copyright (C) 2008 Jack Ren <jack.ren@marvell.com> | |
6 | * Copyright (C) 2008 Eric Miao <eric.miao@marvell.com> | |
7 | * | |
8 | * Derived from drivers/gpio/pca953x.c | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/string.h> | |
19 | #include <linux/gpio.h> | |
a80a0bbe MZ |
20 | #include <linux/interrupt.h> |
21 | #include <linux/irq.h> | |
479f8a57 | 22 | #include <linux/irqdomain.h> |
bbcd6d54 EM |
23 | #include <linux/i2c.h> |
24 | #include <linux/i2c/max732x.h> | |
43c4bcf9 | 25 | #include <linux/of.h> |
bbcd6d54 EM |
26 | |
27 | ||
28 | /* | |
29 | * Each port of MAX732x (including MAX7319) falls into one of the | |
30 | * following three types: | |
31 | * | |
32 | * - Push Pull Output | |
33 | * - Input | |
34 | * - Open Drain I/O | |
35 | * | |
36 | * designated by 'O', 'I' and 'P' individually according to MAXIM's | |
a80a0bbe MZ |
37 | * datasheets. 'I' and 'P' ports are interrupt capables, some with |
38 | * a dedicated interrupt mask. | |
bbcd6d54 EM |
39 | * |
40 | * There are two groups of I/O ports, each group usually includes | |
41 | * up to 8 I/O ports, and is accessed by a specific I2C address: | |
42 | * | |
43 | * - Group A : by I2C address 0b'110xxxx | |
44 | * - Group B : by I2C address 0b'101xxxx | |
45 | * | |
46 | * where 'xxxx' is decided by the connections of pin AD2/AD0. The | |
47 | * address used also affects the initial state of output signals. | |
48 | * | |
49 | * Within each group of ports, there are five known combinations of | |
50 | * I/O ports: 4I4O, 4P4O, 8I, 8P, 8O, see the definitions below for | |
a80a0bbe MZ |
51 | * the detailed organization of these ports. Only Goup A is interrupt |
52 | * capable. | |
bbcd6d54 EM |
53 | * |
54 | * GPIO numbers start from 'gpio_base + 0' to 'gpio_base + 8/16', | |
55 | * and GPIOs from GROUP_A are numbered before those from GROUP_B | |
56 | * (if there are two groups). | |
57 | * | |
58 | * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so | |
59 | * they are not supported by this driver. | |
60 | */ | |
61 | ||
62 | #define PORT_NONE 0x0 /* '/' No Port */ | |
63 | #define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */ | |
64 | #define PORT_INPUT 0x2 /* 'I' Input Only */ | |
65 | #define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */ | |
66 | ||
67 | #define IO_4I4O 0x5AA5 /* O7 O6 I5 I4 I3 I2 O1 O0 */ | |
68 | #define IO_4P4O 0x5FF5 /* O7 O6 P5 P4 P3 P2 O1 O0 */ | |
69 | #define IO_8I 0xAAAA /* I7 I6 I5 I4 I3 I2 I1 I0 */ | |
70 | #define IO_8P 0xFFFF /* P7 P6 P5 P4 P3 P2 P1 P0 */ | |
71 | #define IO_8O 0x5555 /* O7 O6 O5 O4 O3 O2 O1 O0 */ | |
72 | ||
73 | #define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */ | |
74 | #define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */ | |
75 | ||
a80a0bbe MZ |
76 | #define INT_NONE 0x0 /* No interrupt capability */ |
77 | #define INT_NO_MASK 0x1 /* Has interrupts, no mask */ | |
78 | #define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */ | |
79 | #define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */ | |
80 | ||
81 | #define INT_CAPS(x) (((uint64_t)(x)) << 32) | |
82 | ||
83 | enum { | |
84 | MAX7319, | |
85 | MAX7320, | |
86 | MAX7321, | |
87 | MAX7322, | |
88 | MAX7323, | |
89 | MAX7324, | |
90 | MAX7325, | |
91 | MAX7326, | |
92 | MAX7327, | |
93 | }; | |
94 | ||
95 | static uint64_t max732x_features[] = { | |
96 | [MAX7319] = GROUP_A(IO_8I) | INT_CAPS(INT_MERGED_MASK), | |
97 | [MAX7320] = GROUP_B(IO_8O), | |
98 | [MAX7321] = GROUP_A(IO_8P) | INT_CAPS(INT_NO_MASK), | |
99 | [MAX7322] = GROUP_A(IO_4I4O) | INT_CAPS(INT_MERGED_MASK), | |
100 | [MAX7323] = GROUP_A(IO_4P4O) | INT_CAPS(INT_INDEP_MASK), | |
101 | [MAX7324] = GROUP_A(IO_8I) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
102 | [MAX7325] = GROUP_A(IO_8P) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
103 | [MAX7326] = GROUP_A(IO_4I4O) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK), | |
104 | [MAX7327] = GROUP_A(IO_4P4O) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK), | |
105 | }; | |
106 | ||
bbcd6d54 | 107 | static const struct i2c_device_id max732x_id[] = { |
a80a0bbe MZ |
108 | { "max7319", MAX7319 }, |
109 | { "max7320", MAX7320 }, | |
110 | { "max7321", MAX7321 }, | |
111 | { "max7322", MAX7322 }, | |
112 | { "max7323", MAX7323 }, | |
113 | { "max7324", MAX7324 }, | |
114 | { "max7325", MAX7325 }, | |
115 | { "max7326", MAX7326 }, | |
116 | { "max7327", MAX7327 }, | |
bbcd6d54 EM |
117 | { }, |
118 | }; | |
119 | MODULE_DEVICE_TABLE(i2c, max732x_id); | |
120 | ||
43c4bcf9 SP |
121 | #ifdef CONFIG_OF |
122 | static const struct of_device_id max732x_of_table[] = { | |
123 | { .compatible = "maxim,max7319" }, | |
124 | { .compatible = "maxim,max7320" }, | |
125 | { .compatible = "maxim,max7321" }, | |
126 | { .compatible = "maxim,max7322" }, | |
127 | { .compatible = "maxim,max7323" }, | |
128 | { .compatible = "maxim,max7324" }, | |
129 | { .compatible = "maxim,max7325" }, | |
130 | { .compatible = "maxim,max7326" }, | |
131 | { .compatible = "maxim,max7327" }, | |
132 | { } | |
133 | }; | |
134 | MODULE_DEVICE_TABLE(of, max732x_of_table); | |
135 | #endif | |
136 | ||
bbcd6d54 EM |
137 | struct max732x_chip { |
138 | struct gpio_chip gpio_chip; | |
139 | ||
140 | struct i2c_client *client; /* "main" client */ | |
141 | struct i2c_client *client_dummy; | |
142 | struct i2c_client *client_group_a; | |
143 | struct i2c_client *client_group_b; | |
144 | ||
145 | unsigned int mask_group_a; | |
146 | unsigned int dir_input; | |
147 | unsigned int dir_output; | |
148 | ||
149 | struct mutex lock; | |
150 | uint8_t reg_out[2]; | |
a80a0bbe MZ |
151 | |
152 | #ifdef CONFIG_GPIO_MAX732X_IRQ | |
479f8a57 SP |
153 | struct irq_domain *irq_domain; |
154 | struct mutex irq_lock; | |
155 | int irq_base; | |
156 | uint8_t irq_mask; | |
157 | uint8_t irq_mask_cur; | |
158 | uint8_t irq_trig_raise; | |
159 | uint8_t irq_trig_fall; | |
160 | uint8_t irq_features; | |
a80a0bbe | 161 | #endif |
bbcd6d54 EM |
162 | }; |
163 | ||
37fc8a92 LW |
164 | static inline struct max732x_chip *to_max732x(struct gpio_chip *gc) |
165 | { | |
166 | return container_of(gc, struct max732x_chip, gpio_chip); | |
167 | } | |
168 | ||
a80a0bbe | 169 | static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val) |
bbcd6d54 EM |
170 | { |
171 | struct i2c_client *client; | |
172 | int ret; | |
173 | ||
174 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
175 | ret = i2c_smbus_write_byte(client, val); | |
176 | if (ret < 0) { | |
177 | dev_err(&client->dev, "failed writing\n"); | |
178 | return ret; | |
179 | } | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
a80a0bbe | 184 | static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val) |
bbcd6d54 EM |
185 | { |
186 | struct i2c_client *client; | |
187 | int ret; | |
188 | ||
189 | client = group_a ? chip->client_group_a : chip->client_group_b; | |
190 | ret = i2c_smbus_read_byte(client); | |
191 | if (ret < 0) { | |
192 | dev_err(&client->dev, "failed reading\n"); | |
193 | return ret; | |
194 | } | |
195 | ||
196 | *val = (uint8_t)ret; | |
197 | return 0; | |
198 | } | |
199 | ||
200 | static inline int is_group_a(struct max732x_chip *chip, unsigned off) | |
201 | { | |
202 | return (1u << off) & chip->mask_group_a; | |
203 | } | |
204 | ||
205 | static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |
206 | { | |
37fc8a92 | 207 | struct max732x_chip *chip = to_max732x(gc); |
bbcd6d54 EM |
208 | uint8_t reg_val; |
209 | int ret; | |
210 | ||
a80a0bbe | 211 | ret = max732x_readb(chip, is_group_a(chip, off), ®_val); |
bbcd6d54 EM |
212 | if (ret < 0) |
213 | return 0; | |
214 | ||
215 | return reg_val & (1u << (off & 0x7)); | |
216 | } | |
217 | ||
161af6cd MR |
218 | static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask, |
219 | int val) | |
bbcd6d54 | 220 | { |
37fc8a92 | 221 | struct max732x_chip *chip = to_max732x(gc); |
161af6cd | 222 | uint8_t reg_out; |
bbcd6d54 EM |
223 | int ret; |
224 | ||
bbcd6d54 EM |
225 | mutex_lock(&chip->lock); |
226 | ||
227 | reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0]; | |
161af6cd | 228 | reg_out = (reg_out & ~mask) | (val & mask); |
bbcd6d54 | 229 | |
a80a0bbe | 230 | ret = max732x_writeb(chip, is_group_a(chip, off), reg_out); |
bbcd6d54 EM |
231 | if (ret < 0) |
232 | goto out; | |
233 | ||
234 | /* update the shadow register then */ | |
235 | if (off > 7) | |
236 | chip->reg_out[1] = reg_out; | |
237 | else | |
238 | chip->reg_out[0] = reg_out; | |
239 | out: | |
240 | mutex_unlock(&chip->lock); | |
241 | } | |
242 | ||
161af6cd MR |
243 | static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) |
244 | { | |
245 | unsigned base = off & ~0x7; | |
246 | uint8_t mask = 1u << (off & 0x7); | |
247 | ||
248 | max732x_gpio_set_mask(gc, base, mask, val << (off & 0x7)); | |
249 | } | |
250 | ||
251 | static void max732x_gpio_set_multiple(struct gpio_chip *gc, | |
252 | unsigned long *mask, unsigned long *bits) | |
253 | { | |
254 | unsigned mask_lo = mask[0] & 0xff; | |
255 | unsigned mask_hi = (mask[0] >> 8) & 0xff; | |
256 | ||
257 | if (mask_lo) | |
258 | max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] & 0xff); | |
259 | if (mask_hi) | |
260 | max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] >> 8) & 0xff); | |
261 | } | |
262 | ||
bbcd6d54 EM |
263 | static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off) |
264 | { | |
37fc8a92 | 265 | struct max732x_chip *chip = to_max732x(gc); |
bbcd6d54 EM |
266 | unsigned int mask = 1u << off; |
267 | ||
bbcd6d54 EM |
268 | if ((mask & chip->dir_input) == 0) { |
269 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
270 | chip->client->name, off); | |
271 | return -EACCES; | |
272 | } | |
273 | ||
a13c1868 MZ |
274 | /* |
275 | * Open-drain pins must be set to high impedance (which is | |
276 | * equivalent to output-high) to be turned into an input. | |
277 | */ | |
278 | if ((mask & chip->dir_output)) | |
279 | max732x_gpio_set_value(gc, off, 1); | |
280 | ||
bbcd6d54 EM |
281 | return 0; |
282 | } | |
283 | ||
284 | static int max732x_gpio_direction_output(struct gpio_chip *gc, | |
285 | unsigned off, int val) | |
286 | { | |
37fc8a92 | 287 | struct max732x_chip *chip = to_max732x(gc); |
bbcd6d54 EM |
288 | unsigned int mask = 1u << off; |
289 | ||
bbcd6d54 EM |
290 | if ((mask & chip->dir_output) == 0) { |
291 | dev_dbg(&chip->client->dev, "%s port %d is input only\n", | |
292 | chip->client->name, off); | |
293 | return -EACCES; | |
294 | } | |
295 | ||
296 | max732x_gpio_set_value(gc, off, val); | |
297 | return 0; | |
298 | } | |
299 | ||
a80a0bbe MZ |
300 | #ifdef CONFIG_GPIO_MAX732X_IRQ |
301 | static int max732x_writew(struct max732x_chip *chip, uint16_t val) | |
302 | { | |
303 | int ret; | |
304 | ||
305 | val = cpu_to_le16(val); | |
306 | ||
307 | ret = i2c_master_send(chip->client_group_a, (char *)&val, 2); | |
308 | if (ret < 0) { | |
309 | dev_err(&chip->client_group_a->dev, "failed writing\n"); | |
310 | return ret; | |
311 | } | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
316 | static int max732x_readw(struct max732x_chip *chip, uint16_t *val) | |
317 | { | |
318 | int ret; | |
319 | ||
320 | ret = i2c_master_recv(chip->client_group_a, (char *)val, 2); | |
321 | if (ret < 0) { | |
322 | dev_err(&chip->client_group_a->dev, "failed reading\n"); | |
323 | return ret; | |
324 | } | |
325 | ||
326 | *val = le16_to_cpu(*val); | |
327 | return 0; | |
328 | } | |
329 | ||
330 | static void max732x_irq_update_mask(struct max732x_chip *chip) | |
331 | { | |
332 | uint16_t msg; | |
333 | ||
334 | if (chip->irq_mask == chip->irq_mask_cur) | |
335 | return; | |
336 | ||
337 | chip->irq_mask = chip->irq_mask_cur; | |
338 | ||
339 | if (chip->irq_features == INT_NO_MASK) | |
340 | return; | |
341 | ||
342 | mutex_lock(&chip->lock); | |
343 | ||
344 | switch (chip->irq_features) { | |
345 | case INT_INDEP_MASK: | |
346 | msg = (chip->irq_mask << 8) | chip->reg_out[0]; | |
347 | max732x_writew(chip, msg); | |
348 | break; | |
349 | ||
350 | case INT_MERGED_MASK: | |
351 | msg = chip->irq_mask | chip->reg_out[0]; | |
352 | max732x_writeb(chip, 1, (uint8_t)msg); | |
353 | break; | |
354 | } | |
355 | ||
356 | mutex_unlock(&chip->lock); | |
357 | } | |
358 | ||
359 | static int max732x_gpio_to_irq(struct gpio_chip *gc, unsigned off) | |
360 | { | |
37fc8a92 | 361 | struct max732x_chip *chip = to_max732x(gc); |
479f8a57 SP |
362 | |
363 | if (chip->irq_domain) { | |
364 | return irq_create_mapping(chip->irq_domain, | |
365 | chip->irq_base + off); | |
366 | } else { | |
367 | return -ENXIO; | |
368 | } | |
a80a0bbe MZ |
369 | } |
370 | ||
fbc4667a | 371 | static void max732x_irq_mask(struct irq_data *d) |
a80a0bbe | 372 | { |
fbc4667a | 373 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe | 374 | |
479f8a57 | 375 | chip->irq_mask_cur &= ~(1 << d->hwirq); |
a80a0bbe MZ |
376 | } |
377 | ||
fbc4667a | 378 | static void max732x_irq_unmask(struct irq_data *d) |
a80a0bbe | 379 | { |
fbc4667a | 380 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe | 381 | |
479f8a57 | 382 | chip->irq_mask_cur |= 1 << d->hwirq; |
a80a0bbe MZ |
383 | } |
384 | ||
fbc4667a | 385 | static void max732x_irq_bus_lock(struct irq_data *d) |
a80a0bbe | 386 | { |
fbc4667a | 387 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
a80a0bbe MZ |
388 | |
389 | mutex_lock(&chip->irq_lock); | |
390 | chip->irq_mask_cur = chip->irq_mask; | |
391 | } | |
392 | ||
fbc4667a | 393 | static void max732x_irq_bus_sync_unlock(struct irq_data *d) |
a80a0bbe | 394 | { |
fbc4667a | 395 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
09afa276 SP |
396 | uint16_t new_irqs; |
397 | uint16_t level; | |
a80a0bbe MZ |
398 | |
399 | max732x_irq_update_mask(chip); | |
09afa276 SP |
400 | |
401 | new_irqs = chip->irq_trig_fall | chip->irq_trig_raise; | |
402 | while (new_irqs) { | |
403 | level = __ffs(new_irqs); | |
404 | max732x_gpio_direction_input(&chip->gpio_chip, level); | |
405 | new_irqs &= ~(1 << level); | |
406 | } | |
407 | ||
a80a0bbe MZ |
408 | mutex_unlock(&chip->irq_lock); |
409 | } | |
410 | ||
fbc4667a | 411 | static int max732x_irq_set_type(struct irq_data *d, unsigned int type) |
a80a0bbe | 412 | { |
fbc4667a | 413 | struct max732x_chip *chip = irq_data_get_irq_chip_data(d); |
479f8a57 | 414 | uint16_t off = d->hwirq; |
a80a0bbe MZ |
415 | uint16_t mask = 1 << off; |
416 | ||
417 | if (!(mask & chip->dir_input)) { | |
418 | dev_dbg(&chip->client->dev, "%s port %d is output only\n", | |
419 | chip->client->name, off); | |
420 | return -EACCES; | |
421 | } | |
422 | ||
423 | if (!(type & IRQ_TYPE_EDGE_BOTH)) { | |
424 | dev_err(&chip->client->dev, "irq %d: unsupported type %d\n", | |
fbc4667a | 425 | d->irq, type); |
a80a0bbe MZ |
426 | return -EINVAL; |
427 | } | |
428 | ||
429 | if (type & IRQ_TYPE_EDGE_FALLING) | |
430 | chip->irq_trig_fall |= mask; | |
431 | else | |
432 | chip->irq_trig_fall &= ~mask; | |
433 | ||
434 | if (type & IRQ_TYPE_EDGE_RISING) | |
435 | chip->irq_trig_raise |= mask; | |
436 | else | |
437 | chip->irq_trig_raise &= ~mask; | |
438 | ||
09afa276 | 439 | return 0; |
a80a0bbe MZ |
440 | } |
441 | ||
442 | static struct irq_chip max732x_irq_chip = { | |
443 | .name = "max732x", | |
fbc4667a LB |
444 | .irq_mask = max732x_irq_mask, |
445 | .irq_unmask = max732x_irq_unmask, | |
446 | .irq_bus_lock = max732x_irq_bus_lock, | |
447 | .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock, | |
448 | .irq_set_type = max732x_irq_set_type, | |
a80a0bbe MZ |
449 | }; |
450 | ||
451 | static uint8_t max732x_irq_pending(struct max732x_chip *chip) | |
452 | { | |
453 | uint8_t cur_stat; | |
454 | uint8_t old_stat; | |
455 | uint8_t trigger; | |
456 | uint8_t pending; | |
457 | uint16_t status; | |
458 | int ret; | |
459 | ||
460 | ret = max732x_readw(chip, &status); | |
461 | if (ret) | |
462 | return 0; | |
463 | ||
464 | trigger = status >> 8; | |
465 | trigger &= chip->irq_mask; | |
466 | ||
467 | if (!trigger) | |
468 | return 0; | |
469 | ||
470 | cur_stat = status & 0xFF; | |
471 | cur_stat &= chip->irq_mask; | |
472 | ||
473 | old_stat = cur_stat ^ trigger; | |
474 | ||
475 | pending = (old_stat & chip->irq_trig_fall) | | |
476 | (cur_stat & chip->irq_trig_raise); | |
477 | pending &= trigger; | |
478 | ||
479 | return pending; | |
480 | } | |
481 | ||
482 | static irqreturn_t max732x_irq_handler(int irq, void *devid) | |
483 | { | |
484 | struct max732x_chip *chip = devid; | |
485 | uint8_t pending; | |
486 | uint8_t level; | |
487 | ||
488 | pending = max732x_irq_pending(chip); | |
489 | ||
490 | if (!pending) | |
491 | return IRQ_HANDLED; | |
492 | ||
493 | do { | |
494 | level = __ffs(pending); | |
479f8a57 | 495 | handle_nested_irq(irq_find_mapping(chip->irq_domain, level)); |
a80a0bbe MZ |
496 | |
497 | pending &= ~(1 << level); | |
498 | } while (pending); | |
499 | ||
500 | return IRQ_HANDLED; | |
501 | } | |
502 | ||
479f8a57 SP |
503 | static int max732x_irq_map(struct irq_domain *h, unsigned int virq, |
504 | irq_hw_number_t hw) | |
505 | { | |
506 | struct max732x_chip *chip = h->host_data; | |
507 | ||
508 | if (!(chip->dir_input & (1 << hw))) { | |
509 | dev_err(&chip->client->dev, | |
510 | "Attempt to map output line as IRQ line: %lu\n", | |
511 | hw); | |
512 | return -EPERM; | |
513 | } | |
514 | ||
515 | irq_set_chip_data(virq, chip); | |
516 | irq_set_chip_and_handler(virq, &max732x_irq_chip, | |
517 | handle_edge_irq); | |
518 | irq_set_nested_thread(virq, 1); | |
519 | #ifdef CONFIG_ARM | |
520 | /* ARM needs us to explicitly flag the IRQ as valid | |
521 | * and will set them noprobe when we do so. */ | |
522 | set_irq_flags(virq, IRQF_VALID); | |
523 | #else | |
524 | irq_set_noprobe(virq); | |
525 | #endif | |
526 | ||
527 | return 0; | |
528 | } | |
529 | ||
530 | static struct irq_domain_ops max732x_irq_domain_ops = { | |
531 | .map = max732x_irq_map, | |
532 | .xlate = irq_domain_xlate_twocell, | |
533 | }; | |
534 | ||
535 | static void max732x_irq_teardown(struct max732x_chip *chip) | |
536 | { | |
537 | if (chip->client->irq && chip->irq_domain) | |
538 | irq_domain_remove(chip->irq_domain); | |
539 | } | |
540 | ||
a80a0bbe MZ |
541 | static int max732x_irq_setup(struct max732x_chip *chip, |
542 | const struct i2c_device_id *id) | |
543 | { | |
544 | struct i2c_client *client = chip->client; | |
e56aee18 | 545 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe MZ |
546 | int has_irq = max732x_features[id->driver_data] >> 32; |
547 | int ret; | |
548 | ||
43c4bcf9 SP |
549 | if (((pdata && pdata->irq_base) || client->irq) |
550 | && has_irq != INT_NONE) { | |
43c4bcf9 SP |
551 | if (pdata) |
552 | chip->irq_base = pdata->irq_base; | |
a80a0bbe MZ |
553 | chip->irq_features = has_irq; |
554 | mutex_init(&chip->irq_lock); | |
555 | ||
479f8a57 SP |
556 | chip->irq_domain = irq_domain_add_simple(client->dev.of_node, |
557 | chip->gpio_chip.ngpio, chip->irq_base, | |
558 | &max732x_irq_domain_ops, chip); | |
559 | if (!chip->irq_domain) { | |
560 | dev_err(&client->dev, "Failed to create IRQ domain\n"); | |
561 | return -ENOMEM; | |
a80a0bbe MZ |
562 | } |
563 | ||
564 | ret = request_threaded_irq(client->irq, | |
565 | NULL, | |
566 | max732x_irq_handler, | |
567 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | |
568 | dev_name(&client->dev), chip); | |
569 | if (ret) { | |
570 | dev_err(&client->dev, "failed to request irq %d\n", | |
571 | client->irq); | |
572 | goto out_failed; | |
573 | } | |
574 | ||
575 | chip->gpio_chip.to_irq = max732x_gpio_to_irq; | |
576 | } | |
577 | ||
578 | return 0; | |
579 | ||
580 | out_failed: | |
479f8a57 | 581 | max732x_irq_teardown(chip); |
a80a0bbe MZ |
582 | return ret; |
583 | } | |
584 | ||
a80a0bbe MZ |
585 | #else /* CONFIG_GPIO_MAX732X_IRQ */ |
586 | static int max732x_irq_setup(struct max732x_chip *chip, | |
587 | const struct i2c_device_id *id) | |
588 | { | |
589 | struct i2c_client *client = chip->client; | |
e56aee18 | 590 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
a80a0bbe MZ |
591 | int has_irq = max732x_features[id->driver_data] >> 32; |
592 | ||
43c4bcf9 | 593 | if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE) |
a80a0bbe MZ |
594 | dev_warn(&client->dev, "interrupt support not compiled in\n"); |
595 | ||
596 | return 0; | |
597 | } | |
598 | ||
599 | static void max732x_irq_teardown(struct max732x_chip *chip) | |
600 | { | |
601 | } | |
602 | #endif | |
603 | ||
3836309d | 604 | static int max732x_setup_gpio(struct max732x_chip *chip, |
bbcd6d54 EM |
605 | const struct i2c_device_id *id, |
606 | unsigned gpio_start) | |
607 | { | |
608 | struct gpio_chip *gc = &chip->gpio_chip; | |
a80a0bbe | 609 | uint32_t id_data = (uint32_t)max732x_features[id->driver_data]; |
bbcd6d54 EM |
610 | int i, port = 0; |
611 | ||
612 | for (i = 0; i < 16; i++, id_data >>= 2) { | |
613 | unsigned int mask = 1 << port; | |
614 | ||
615 | switch (id_data & 0x3) { | |
616 | case PORT_OUTPUT: | |
617 | chip->dir_output |= mask; | |
618 | break; | |
619 | case PORT_INPUT: | |
620 | chip->dir_input |= mask; | |
621 | break; | |
622 | case PORT_OPENDRAIN: | |
623 | chip->dir_output |= mask; | |
624 | chip->dir_input |= mask; | |
625 | break; | |
626 | default: | |
627 | continue; | |
628 | } | |
629 | ||
630 | if (i < 8) | |
631 | chip->mask_group_a |= mask; | |
632 | port++; | |
633 | } | |
634 | ||
635 | if (chip->dir_input) | |
636 | gc->direction_input = max732x_gpio_direction_input; | |
637 | if (chip->dir_output) { | |
638 | gc->direction_output = max732x_gpio_direction_output; | |
639 | gc->set = max732x_gpio_set_value; | |
161af6cd | 640 | gc->set_multiple = max732x_gpio_set_multiple; |
bbcd6d54 EM |
641 | } |
642 | gc->get = max732x_gpio_get_value; | |
9fb1f39e | 643 | gc->can_sleep = true; |
bbcd6d54 EM |
644 | |
645 | gc->base = gpio_start; | |
646 | gc->ngpio = port; | |
647 | gc->label = chip->client->name; | |
648 | gc->owner = THIS_MODULE; | |
649 | ||
650 | return port; | |
651 | } | |
652 | ||
43c4bcf9 SP |
653 | static struct max732x_platform_data *of_gpio_max732x(struct device *dev) |
654 | { | |
655 | struct max732x_platform_data *pdata; | |
656 | ||
657 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | |
658 | if (!pdata) | |
659 | return NULL; | |
660 | ||
661 | pdata->gpio_base = -1; | |
662 | ||
663 | return pdata; | |
664 | } | |
665 | ||
3836309d | 666 | static int max732x_probe(struct i2c_client *client, |
bbcd6d54 EM |
667 | const struct i2c_device_id *id) |
668 | { | |
669 | struct max732x_platform_data *pdata; | |
43c4bcf9 | 670 | struct device_node *node; |
bbcd6d54 EM |
671 | struct max732x_chip *chip; |
672 | struct i2c_client *c; | |
673 | uint16_t addr_a, addr_b; | |
674 | int ret, nr_port; | |
675 | ||
e56aee18 | 676 | pdata = dev_get_platdata(&client->dev); |
43c4bcf9 SP |
677 | node = client->dev.of_node; |
678 | ||
679 | if (!pdata && node) | |
680 | pdata = of_gpio_max732x(&client->dev); | |
681 | ||
682 | if (!pdata) { | |
a342d215 BD |
683 | dev_dbg(&client->dev, "no platform data\n"); |
684 | return -EINVAL; | |
685 | } | |
bbcd6d54 | 686 | |
43c4bcf9 | 687 | chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL); |
bbcd6d54 EM |
688 | if (chip == NULL) |
689 | return -ENOMEM; | |
690 | chip->client = client; | |
691 | ||
692 | nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base); | |
43c4bcf9 | 693 | chip->gpio_chip.dev = &client->dev; |
bbcd6d54 EM |
694 | |
695 | addr_a = (client->addr & 0x0f) | 0x60; | |
696 | addr_b = (client->addr & 0x0f) | 0x50; | |
697 | ||
698 | switch (client->addr & 0x70) { | |
699 | case 0x60: | |
700 | chip->client_group_a = client; | |
5535cb68 | 701 | if (nr_port > 8) { |
bbcd6d54 EM |
702 | c = i2c_new_dummy(client->adapter, addr_b); |
703 | chip->client_group_b = chip->client_dummy = c; | |
704 | } | |
705 | break; | |
706 | case 0x50: | |
707 | chip->client_group_b = client; | |
5535cb68 | 708 | if (nr_port > 8) { |
bbcd6d54 EM |
709 | c = i2c_new_dummy(client->adapter, addr_a); |
710 | chip->client_group_a = chip->client_dummy = c; | |
711 | } | |
712 | break; | |
713 | default: | |
714 | dev_err(&client->dev, "invalid I2C address specified %02x\n", | |
715 | client->addr); | |
716 | ret = -EINVAL; | |
717 | goto out_failed; | |
f561b423 KK |
718 | } |
719 | ||
720 | if (nr_port > 8 && !chip->client_dummy) { | |
721 | dev_err(&client->dev, | |
722 | "Failed to allocate second group I2C device\n"); | |
723 | ret = -ENODEV; | |
724 | goto out_failed; | |
bbcd6d54 EM |
725 | } |
726 | ||
727 | mutex_init(&chip->lock); | |
728 | ||
a80a0bbe | 729 | max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]); |
5535cb68 | 730 | if (nr_port > 8) |
a80a0bbe MZ |
731 | max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]); |
732 | ||
733 | ret = max732x_irq_setup(chip, id); | |
734 | if (ret) | |
735 | goto out_failed; | |
bbcd6d54 EM |
736 | |
737 | ret = gpiochip_add(&chip->gpio_chip); | |
738 | if (ret) | |
739 | goto out_failed; | |
740 | ||
43c4bcf9 | 741 | if (pdata && pdata->setup) { |
bbcd6d54 EM |
742 | ret = pdata->setup(client, chip->gpio_chip.base, |
743 | chip->gpio_chip.ngpio, pdata->context); | |
744 | if (ret < 0) | |
745 | dev_warn(&client->dev, "setup failed, %d\n", ret); | |
746 | } | |
747 | ||
748 | i2c_set_clientdata(client, chip); | |
749 | return 0; | |
750 | ||
751 | out_failed: | |
c75793d8 KK |
752 | if (chip->client_dummy) |
753 | i2c_unregister_device(chip->client_dummy); | |
a80a0bbe | 754 | max732x_irq_teardown(chip); |
bbcd6d54 EM |
755 | return ret; |
756 | } | |
757 | ||
206210ce | 758 | static int max732x_remove(struct i2c_client *client) |
bbcd6d54 | 759 | { |
e56aee18 | 760 | struct max732x_platform_data *pdata = dev_get_platdata(&client->dev); |
bbcd6d54 | 761 | struct max732x_chip *chip = i2c_get_clientdata(client); |
bbcd6d54 | 762 | |
43c4bcf9 SP |
763 | if (pdata && pdata->teardown) { |
764 | int ret; | |
765 | ||
bbcd6d54 EM |
766 | ret = pdata->teardown(client, chip->gpio_chip.base, |
767 | chip->gpio_chip.ngpio, pdata->context); | |
768 | if (ret < 0) { | |
769 | dev_err(&client->dev, "%s failed, %d\n", | |
770 | "teardown", ret); | |
771 | return ret; | |
772 | } | |
773 | } | |
774 | ||
9f5132ae | 775 | gpiochip_remove(&chip->gpio_chip); |
bbcd6d54 | 776 | |
a80a0bbe MZ |
777 | max732x_irq_teardown(chip); |
778 | ||
bbcd6d54 EM |
779 | /* unregister any dummy i2c_client */ |
780 | if (chip->client_dummy) | |
781 | i2c_unregister_device(chip->client_dummy); | |
782 | ||
bbcd6d54 EM |
783 | return 0; |
784 | } | |
785 | ||
786 | static struct i2c_driver max732x_driver = { | |
787 | .driver = { | |
43c4bcf9 SP |
788 | .name = "max732x", |
789 | .owner = THIS_MODULE, | |
790 | .of_match_table = of_match_ptr(max732x_of_table), | |
bbcd6d54 EM |
791 | }, |
792 | .probe = max732x_probe, | |
8283c4ff | 793 | .remove = max732x_remove, |
bbcd6d54 EM |
794 | .id_table = max732x_id, |
795 | }; | |
796 | ||
797 | static int __init max732x_init(void) | |
798 | { | |
799 | return i2c_add_driver(&max732x_driver); | |
800 | } | |
2f8d1197 DB |
801 | /* register after i2c postcore initcall and before |
802 | * subsys initcalls that may rely on these GPIOs | |
803 | */ | |
804 | subsys_initcall(max732x_init); | |
bbcd6d54 EM |
805 | |
806 | static void __exit max732x_exit(void) | |
807 | { | |
808 | i2c_del_driver(&max732x_driver); | |
809 | } | |
810 | module_exit(max732x_exit); | |
811 | ||
812 | MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"); | |
813 | MODULE_DESCRIPTION("GPIO expander driver for MAX732X"); | |
814 | MODULE_LICENSE("GPL"); |