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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[deliverable/linux.git] / drivers / gpio / gpio-mcp23s08.c
CommitLineData
e58b9e27 1/*
4e47f91b
LP		 2 * MCP23S08 SPI/I2C GPIO gpio expander driver
3 *
4 * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
5 * supported.
6 * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
7 * interrupts is also supported.
8 * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
9 * also capable of generating interrupts, but the linux driver does not
10 * support that yet.
e58b9e27
DB		 11 */
12
13#include <linux/kernel.h>
14#include <linux/device.h>
e58b9e27 15#include <linux/mutex.h>
bb207ef1 16#include <linux/module.h>
d120c17f 17#include <linux/gpio.h>
752ad5e8 18#include <linux/i2c.h>
e58b9e27
DB		 19#include <linux/spi/spi.h>
20#include <linux/spi/mcp23s08.h>
5a0e3ad6 21#include <linux/slab.h>
0b7bb77f 22#include <asm/byteorder.h>
4e47f91b
LP		 23#include <linux/interrupt.h>
24#include <linux/of_irq.h>
97ddb1c8 25#include <linux/of_device.h>
e58b9e27 26
0b7bb77f
PK		 27/**
28 * MCP types supported by driver
29 */
30#define MCP_TYPE_S08 0
31#define MCP_TYPE_S17 1
752ad5e8
PK		 32#define MCP_TYPE_008 2
33#define MCP_TYPE_017 3
e58b9e27
DB		 34
35/* Registers are all 8 bits wide.
36 *
37 * The mcp23s17 has twice as many bits, and can be configured to work
38 * with either 16 bit registers or with two adjacent 8 bit banks.
e58b9e27
DB		 39 */
40#define MCP_IODIR 0x00 /* init/reset: all ones */
41#define MCP_IPOL 0x01
42#define MCP_GPINTEN 0x02
43#define MCP_DEFVAL 0x03
44#define MCP_INTCON 0x04
45#define MCP_IOCON 0x05
4e47f91b 46# define IOCON_MIRROR (1 << 6)
e58b9e27
DB		 47# define IOCON_SEQOP (1 << 5)
48# define IOCON_HAEN (1 << 3)
49# define IOCON_ODR (1 << 2)
50# define IOCON_INTPOL (1 << 1)
51#define MCP_GPPU 0x06
52#define MCP_INTF 0x07
53#define MCP_INTCAP 0x08
54#define MCP_GPIO 0x09
55#define MCP_OLAT 0x0a
56
0b7bb77f
PK		 57struct mcp23s08;
58
59struct mcp23s08_ops {
60 int (*read)(struct mcp23s08 *mcp, unsigned reg);
61 int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
62 int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
63 u16 *vals, unsigned n);
64};
65
e58b9e27 66struct mcp23s08 {
e58b9e27 67 u8 addr;
a4e63554 68 bool irq_active_high;
e58b9e27 69
0b7bb77f 70 u16 cache[11];
4e47f91b
LP		 71 u16 irq_rise;
72 u16 irq_fall;
73 int irq;
74 bool irq_controller;
e58b9e27
DB		 75 /* lock protects the cached values */
76 struct mutex lock;
4e47f91b
LP		 77 struct mutex irq_lock;
78 struct irq_domain *irq_domain;
e58b9e27
DB		 79
80 struct gpio_chip chip;
81
0b7bb77f 82 const struct mcp23s08_ops *ops;
d62b98f3 83 void *data; /* ops specific data */
e58b9e27
DB		 84};
85
0b7bb77f 86/* A given spi_device can represent up to eight mcp23sxx chips
8f1cc3b1
DB		 87 * sharing the same chipselect but using different addresses
88 * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
89 * Driver data holds all the per-chip data.
90 */
91struct mcp23s08_driver_data {
92 unsigned ngpio;
0b7bb77f 93 struct mcp23s08 *mcp[8];
8f1cc3b1
DB		 94 struct mcp23s08 chip[];
95};
96
4e47f91b
LP		 97/* This lock class tells lockdep that GPIO irqs are in a different
98 * category than their parents, so it won't report false recursion.
99 */
100static struct lock_class_key gpio_lock_class;
101
752ad5e8
PK		 102/*----------------------------------------------------------------------*/
103
cbf24fad 104#if IS_ENABLED(CONFIG_I2C)
752ad5e8
PK		 105
106static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
107{
108 return i2c_smbus_read_byte_data(mcp->data, reg);
109}
110
111static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
112{
113 return i2c_smbus_write_byte_data(mcp->data, reg, val);
114}
115
116static int
117mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
118{
119 while (n--) {
120 int ret = mcp23008_read(mcp, reg++);
121 if (ret < 0)
122 return ret;
123 *vals++ = ret;
124 }
125
126 return 0;
127}
128
129static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
130{
131 return i2c_smbus_read_word_data(mcp->data, reg << 1);
132}
133
134static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
135{
136 return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
137}
138
139static int
140mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
141{
142 while (n--) {
143 int ret = mcp23017_read(mcp, reg++);
144 if (ret < 0)
145 return ret;
146 *vals++ = ret;
147 }
148
149 return 0;
150}
151
152static const struct mcp23s08_ops mcp23008_ops = {
153 .read = mcp23008_read,
154 .write = mcp23008_write,
155 .read_regs = mcp23008_read_regs,
156};
157
158static const struct mcp23s08_ops mcp23017_ops = {
159 .read = mcp23017_read,
160 .write = mcp23017_write,
161 .read_regs = mcp23017_read_regs,
162};
163
164#endif /* CONFIG_I2C */
165
166/*----------------------------------------------------------------------*/
167
d62b98f3
PK		 168#ifdef CONFIG_SPI_MASTER
169
e58b9e27
DB		 170static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
171{
172 u8 tx[2], rx[1];
173 int status;
174
175 tx[0] = mcp->addr | 0x01;
176 tx[1] = reg;
33bc8411 177 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
e58b9e27
DB		 178 return (status < 0) ? status : rx[0];
179}
180
0b7bb77f 181static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
e58b9e27
DB		 182{
183 u8 tx[3];
184
185 tx[0] = mcp->addr;
186 tx[1] = reg;
187 tx[2] = val;
33bc8411 188 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
e58b9e27
DB		 189}
190
191static int
0b7bb77f 192mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
e58b9e27 193{
0b7bb77f
PK		 194 u8 tx[2], *tmp;
195 int status;
e58b9e27 196
33bc8411 197 if ((n + reg) > sizeof(mcp->cache))
e58b9e27
DB		 198 return -EINVAL;
199 tx[0] = mcp->addr | 0x01;
200 tx[1] = reg;
0b7bb77f
PK		 201
202 tmp = (u8 *)vals;
33bc8411 203 status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
0b7bb77f
PK		 204 if (status >= 0) {
205 while (n--)
206 vals[n] = tmp[n]; /* expand to 16bit */
207 }
208 return status;
209}
210
211static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
212{
213 u8 tx[2], rx[2];
214 int status;
215
216 tx[0] = mcp->addr | 0x01;
217 tx[1] = reg << 1;
33bc8411 218 status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
0b7bb77f
PK		 219 return (status < 0) ? status : (rx[0] | (rx[1] << 8));
220}
221
222static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
223{
224 u8 tx[4];
225
226 tx[0] = mcp->addr;
227 tx[1] = reg << 1;
228 tx[2] = val;
229 tx[3] = val >> 8;
33bc8411 230 return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
0b7bb77f
PK		 231}
232
233static int
234mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
235{
236 u8 tx[2];
237 int status;
238
33bc8411 239 if ((n + reg) > sizeof(mcp->cache))
0b7bb77f
PK		 240 return -EINVAL;
241 tx[0] = mcp->addr | 0x01;
242 tx[1] = reg << 1;
243
33bc8411 244 status = spi_write_then_read(mcp->data, tx, sizeof(tx),
0b7bb77f
PK		 245 (u8 *)vals, n * 2);
246 if (status >= 0) {
247 while (n--)
248 vals[n] = __le16_to_cpu((__le16)vals[n]);
249 }
250
251 return status;
e58b9e27
DB		 252}
253
0b7bb77f
PK		 254static const struct mcp23s08_ops mcp23s08_ops = {
255 .read = mcp23s08_read,
256 .write = mcp23s08_write,
257 .read_regs = mcp23s08_read_regs,
258};
259
260static const struct mcp23s08_ops mcp23s17_ops = {
261 .read = mcp23s17_read,
262 .write = mcp23s17_write,
263 .read_regs = mcp23s17_read_regs,
264};
265
d62b98f3 266#endif /* CONFIG_SPI_MASTER */
0b7bb77f 267
e58b9e27
DB		 268/*----------------------------------------------------------------------*/
269
270static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
271{
272 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
273 int status;
274
275 mutex_lock(&mcp->lock);
276 mcp->cache[MCP_IODIR] |= (1 << offset);
0b7bb77f 277 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
e58b9e27
DB		 278 mutex_unlock(&mcp->lock);
279 return status;
280}
281
282static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
283{
284 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
285 int status;
286
287 mutex_lock(&mcp->lock);
288
289 /* REVISIT reading this clears any IRQ ... */
0b7bb77f 290 status = mcp->ops->read(mcp, MCP_GPIO);
e58b9e27
DB		 291 if (status < 0)
292 status = 0;
293 else {
294 mcp->cache[MCP_GPIO] = status;
295 status = !!(status & (1 << offset));
296 }
297 mutex_unlock(&mcp->lock);
298 return status;
299}
300
301static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
302{
0b7bb77f 303 unsigned olat = mcp->cache[MCP_OLAT];
e58b9e27
DB		 304
305 if (value)
306 olat |= mask;
307 else
308 olat &= ~mask;
309 mcp->cache[MCP_OLAT] = olat;
0b7bb77f 310 return mcp->ops->write(mcp, MCP_OLAT, olat);
e58b9e27
DB		 311}
312
313static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
314{
315 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
0b7bb77f 316 unsigned mask = 1 << offset;
e58b9e27
DB		 317
318 mutex_lock(&mcp->lock);
319 __mcp23s08_set(mcp, mask, value);
320 mutex_unlock(&mcp->lock);
321}
322
323static int
324mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
325{
326 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
0b7bb77f 327 unsigned mask = 1 << offset;
e58b9e27
DB		 328 int status;
329
330 mutex_lock(&mcp->lock);
331 status = __mcp23s08_set(mcp, mask, value);
332 if (status == 0) {
333 mcp->cache[MCP_IODIR] &= ~mask;
0b7bb77f 334 status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
e58b9e27
DB		 335 }
336 mutex_unlock(&mcp->lock);
337 return status;
338}
339
4e47f91b
LP		 340/*----------------------------------------------------------------------*/
341static irqreturn_t mcp23s08_irq(int irq, void *data)
342{
343 struct mcp23s08 *mcp = data;
344 int intcap, intf, i;
345 unsigned int child_irq;
346
347 mutex_lock(&mcp->lock);
348 intf = mcp->ops->read(mcp, MCP_INTF);
349 if (intf < 0) {
350 mutex_unlock(&mcp->lock);
351 return IRQ_HANDLED;
352 }
353
354 mcp->cache[MCP_INTF] = intf;
355
356 intcap = mcp->ops->read(mcp, MCP_INTCAP);
357 if (intcap < 0) {
358 mutex_unlock(&mcp->lock);
359 return IRQ_HANDLED;
360 }
361
362 mcp->cache[MCP_INTCAP] = intcap;
363 mutex_unlock(&mcp->lock);
364
365
366 for (i = 0; i < mcp->chip.ngpio; i++) {
367 if ((BIT(i) & mcp->cache[MCP_INTF]) &&
368 ((BIT(i) & intcap & mcp->irq_rise) ||
369 (mcp->irq_fall & ~intcap & BIT(i)))) {
370 child_irq = irq_find_mapping(mcp->irq_domain, i);
371 handle_nested_irq(child_irq);
372 }
373 }
374
375 return IRQ_HANDLED;
376}
377
378static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
379{
380 struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
381
382 return irq_find_mapping(mcp->irq_domain, offset);
383}
384
385static void mcp23s08_irq_mask(struct irq_data *data)
386{
387 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
388 unsigned int pos = data->hwirq;
389
390 mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
391}
392
393static void mcp23s08_irq_unmask(struct irq_data *data)
394{
395 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
396 unsigned int pos = data->hwirq;
397
398 mcp->cache[MCP_GPINTEN] |= BIT(pos);
399}
400
401static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
402{
403 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
404 unsigned int pos = data->hwirq;
405 int status = 0;
406
407 if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
408 mcp->cache[MCP_INTCON] &= ~BIT(pos);
409 mcp->irq_rise |= BIT(pos);
410 mcp->irq_fall |= BIT(pos);
411 } else if (type & IRQ_TYPE_EDGE_RISING) {
412 mcp->cache[MCP_INTCON] &= ~BIT(pos);
413 mcp->irq_rise |= BIT(pos);
414 mcp->irq_fall &= ~BIT(pos);
415 } else if (type & IRQ_TYPE_EDGE_FALLING) {
416 mcp->cache[MCP_INTCON] &= ~BIT(pos);
417 mcp->irq_rise &= ~BIT(pos);
418 mcp->irq_fall |= BIT(pos);
419 } else
420 return -EINVAL;
421
422 return status;
423}
424
425static void mcp23s08_irq_bus_lock(struct irq_data *data)
426{
427 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
428
429 mutex_lock(&mcp->irq_lock);
430}
431
432static void mcp23s08_irq_bus_unlock(struct irq_data *data)
433{
434 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
435
436 mutex_lock(&mcp->lock);
437 mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
438 mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
439 mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
440 mutex_unlock(&mcp->lock);
441 mutex_unlock(&mcp->irq_lock);
442}
443
57ef0428 444static int mcp23s08_irq_reqres(struct irq_data *data)
4e47f91b
LP		 445{
446 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
447
e3a2e878 448 if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) {
4e47f91b
LP		 449 dev_err(mcp->chip.dev,
450 "unable to lock HW IRQ %lu for IRQ usage\n",
451 data->hwirq);
57ef0428
LW		 452 return -EINVAL;
453 }
4e47f91b 454
4e47f91b
LP		 455 return 0;
456}
457
57ef0428 458static void mcp23s08_irq_relres(struct irq_data *data)
4e47f91b
LP		 459{
460 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
461
e3a2e878 462 gpiochip_unlock_as_irq(&mcp->chip, data->hwirq);
4e47f91b
LP		 463}
464
465static struct irq_chip mcp23s08_irq_chip = {
466 .name = "gpio-mcp23xxx",
467 .irq_mask = mcp23s08_irq_mask,
468 .irq_unmask = mcp23s08_irq_unmask,
469 .irq_set_type = mcp23s08_irq_set_type,
470 .irq_bus_lock = mcp23s08_irq_bus_lock,
471 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
57ef0428
LW		 472 .irq_request_resources = mcp23s08_irq_reqres,
473 .irq_release_resources = mcp23s08_irq_relres,
4e47f91b
LP		 474};
475
476static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
477{
478 struct gpio_chip *chip = &mcp->chip;
479 int err, irq, j;
a4e63554 480 unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
4e47f91b
LP		 481
482 mutex_init(&mcp->irq_lock);
483
3af0dbd5 484 mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio,
4e47f91b
LP		 485 &irq_domain_simple_ops, mcp);
486 if (!mcp->irq_domain)
487 return -ENODEV;
488
a4e63554
AS		 489 if (mcp->irq_active_high)
490 irqflags |= IRQF_TRIGGER_HIGH;
491 else
492 irqflags |= IRQF_TRIGGER_LOW;
493
4e47f91b 494 err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq,
a4e63554 495 irqflags, dev_name(chip->dev), mcp);
4e47f91b
LP		 496 if (err != 0) {
497 dev_err(chip->dev, "unable to request IRQ#%d: %d\n",
498 mcp->irq, err);
499 return err;
500 }
501
502 chip->to_irq = mcp23s08_gpio_to_irq;
503
504 for (j = 0; j < mcp->chip.ngpio; j++) {
505 irq = irq_create_mapping(mcp->irq_domain, j);
506 irq_set_lockdep_class(irq, &gpio_lock_class);
507 irq_set_chip_data(irq, mcp);
508 irq_set_chip(irq, &mcp23s08_irq_chip);
509 irq_set_nested_thread(irq, true);
510#ifdef CONFIG_ARM
511 set_irq_flags(irq, IRQF_VALID);
512#else
513 irq_set_noprobe(irq);
514#endif
515 }
516 return 0;
517}
518
519static void mcp23s08_irq_teardown(struct mcp23s08 *mcp)
520{
521 unsigned int irq, i;
522
4e47f91b
LP		 523 for (i = 0; i < mcp->chip.ngpio; i++) {
524 irq = irq_find_mapping(mcp->irq_domain, i);
525 if (irq > 0)
526 irq_dispose_mapping(irq);
527 }
528
529 irq_domain_remove(mcp->irq_domain);
530}
531
e58b9e27
DB		 532/*----------------------------------------------------------------------*/
533
534#ifdef CONFIG_DEBUG_FS
535
536#include <linux/seq_file.h>
537
538/*
539 * This shows more info than the generic gpio dump code:
540 * pullups, deglitching, open drain drive.
541 */
542static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
543{
544 struct mcp23s08 *mcp;
545 char bank;
1d1c1d9b 546 int t;
e58b9e27
DB		 547 unsigned mask;
548
549 mcp = container_of(chip, struct mcp23s08, chip);
550
551 /* NOTE: we only handle one bank for now ... */
0b7bb77f 552 bank = '0' + ((mcp->addr >> 1) & 0x7);
e58b9e27
DB		 553
554 mutex_lock(&mcp->lock);
0b7bb77f 555 t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
e58b9e27
DB		 556 if (t < 0) {
557 seq_printf(s, " I/O ERROR %d\n", t);
558 goto done;
559 }
560
0b7bb77f 561 for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
e58b9e27
DB		 562 const char *label;
563
564 label = gpiochip_is_requested(chip, t);
565 if (!label)
566 continue;
567
568 seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
569 chip->base + t, bank, t, label,
570 (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
571 (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
eb1567f7 572 (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
e58b9e27 573 /* NOTE: ignoring the irq-related registers */
33bc8411 574 seq_puts(s, "\n");
e58b9e27
DB		 575 }
576done:
577 mutex_unlock(&mcp->lock);
578}
579
580#else
581#define mcp23s08_dbg_show NULL
582#endif
583
584/*----------------------------------------------------------------------*/
585
d62b98f3 586static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
4e47f91b 587 void *data, unsigned addr, unsigned type,
3af0dbd5 588 struct mcp23s08_platform_data *pdata, int cs)
e58b9e27 589{
d62b98f3 590 int status;
4e47f91b 591 bool mirror = false;
e58b9e27 592
e58b9e27
DB		 593 mutex_init(&mcp->lock);
594
d62b98f3
PK		 595 mcp->data = data;
596 mcp->addr = addr;
a4e63554 597 mcp->irq_active_high = false;
e58b9e27 598
e58b9e27
DB		 599 mcp->chip.direction_input = mcp23s08_direction_input;
600 mcp->chip.get = mcp23s08_get;
601 mcp->chip.direction_output = mcp23s08_direction_output;
602 mcp->chip.set = mcp23s08_set;
603 mcp->chip.dbg_show = mcp23s08_dbg_show;
97ddb1c8
LP		 604#ifdef CONFIG_OF
605 mcp->chip.of_gpio_n_cells = 2;
606 mcp->chip.of_node = dev->of_node;
607#endif
e58b9e27 608
d62b98f3
PK		 609 switch (type) {
610#ifdef CONFIG_SPI_MASTER
611 case MCP_TYPE_S08:
0b7bb77f
PK		 612 mcp->ops = &mcp23s08_ops;
613 mcp->chip.ngpio = 8;
614 mcp->chip.label = "mcp23s08";
d62b98f3
PK		 615 break;
616
617 case MCP_TYPE_S17:
618 mcp->ops = &mcp23s17_ops;
619 mcp->chip.ngpio = 16;
620 mcp->chip.label = "mcp23s17";
621 break;
622#endif /* CONFIG_SPI_MASTER */
623
cbf24fad 624#if IS_ENABLED(CONFIG_I2C)
752ad5e8
PK		 625 case MCP_TYPE_008:
626 mcp->ops = &mcp23008_ops;
627 mcp->chip.ngpio = 8;
628 mcp->chip.label = "mcp23008";
629 break;
630
631 case MCP_TYPE_017:
632 mcp->ops = &mcp23017_ops;
633 mcp->chip.ngpio = 16;
634 mcp->chip.label = "mcp23017";
635 break;
636#endif /* CONFIG_I2C */
637
d62b98f3
PK		 638 default:
639 dev_err(dev, "invalid device type (%d)\n", type);
640 return -EINVAL;
0b7bb77f 641 }
d62b98f3 642
3af0dbd5 643 mcp->chip.base = pdata->base;
9fb1f39e 644 mcp->chip.can_sleep = true;
d62b98f3 645 mcp->chip.dev = dev;
d72cbed0 646 mcp->chip.owner = THIS_MODULE;
e58b9e27 647
8f1cc3b1
DB		 648 /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
649 * and MCP_IOCON.HAEN = 1, so we work with all chips.
650 */
4e47f91b 651
0b7bb77f 652 status = mcp->ops->read(mcp, MCP_IOCON);
e58b9e27
DB		 653 if (status < 0)
654 goto fail;
4e47f91b 655
3af0dbd5 656 mcp->irq_controller = pdata->irq_controller;
a4e63554 657 if (mcp->irq && mcp->irq_controller) {
170680ab
LW		 658 mcp->irq_active_high =
659 of_property_read_bool(mcp->chip.dev->of_node,
660 "microchip,irq-active-high");
4e47f91b 661
a4e63554
AS		 662 if (type == MCP_TYPE_017)
663 mirror = pdata->mirror;
664 }
665
666 if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
667 mcp->irq_active_high) {
0b7bb77f
PK		 668 /* mcp23s17 has IOCON twice, make sure they are in sync */
669 status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
670 status |= IOCON_HAEN | (IOCON_HAEN << 8);
a4e63554
AS		 671 if (mcp->irq_active_high)
672 status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
673 else
674 status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
675
4e47f91b
LP		 676 if (mirror)
677 status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
678
0b7bb77f 679 status = mcp->ops->write(mcp, MCP_IOCON, status);
e58b9e27
DB		 680 if (status < 0)
681 goto fail;
682 }
683
684 /* configure ~100K pullups */
3af0dbd5 685 status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
e58b9e27
DB		 686 if (status < 0)
687 goto fail;
688
0b7bb77f 689 status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
e58b9e27
DB		 690 if (status < 0)
691 goto fail;
692
693 /* disable inverter on input */
694 if (mcp->cache[MCP_IPOL] != 0) {
695 mcp->cache[MCP_IPOL] = 0;
0b7bb77f
PK		 696 status = mcp->ops->write(mcp, MCP_IPOL, 0);
697 if (status < 0)
698 goto fail;
e58b9e27
DB		 699 }
700
701 /* disable irqs */
702 if (mcp->cache[MCP_GPINTEN] != 0) {
703 mcp->cache[MCP_GPINTEN] = 0;
0b7bb77f 704 status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
8f1cc3b1
DB		 705 if (status < 0)
706 goto fail;
e58b9e27
DB		 707 }
708
709 status = gpiochip_add(&mcp->chip);
4e47f91b
LP		 710 if (status < 0)
711 goto fail;
712
713 if (mcp->irq && mcp->irq_controller) {
714 status = mcp23s08_irq_setup(mcp);
715 if (status) {
716 mcp23s08_irq_teardown(mcp);
717 goto fail;
718 }
719 }
8f1cc3b1
DB		 720fail:
721 if (status < 0)
d62b98f3
PK		 722 dev_dbg(dev, "can't setup chip %d, --> %d\n",
723 addr, status);
8f1cc3b1
DB		 724 return status;
725}
726
752ad5e8
PK		 727/*----------------------------------------------------------------------*/
728
97ddb1c8
LP		 729#ifdef CONFIG_OF
730#ifdef CONFIG_SPI_MASTER
ac791804 731static const struct of_device_id mcp23s08_spi_of_match[] = {
97ddb1c8 732 {
45971686
LP		 733 .compatible = "microchip,mcp23s08",
734 .data = (void *) MCP_TYPE_S08,
97ddb1c8
LP		 735 },
736 {
45971686
LP		 737 .compatible = "microchip,mcp23s17",
738 .data = (void *) MCP_TYPE_S17,
739 },
740/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
741 {
742 .compatible = "mcp,mcp23s08",
743 .data = (void *) MCP_TYPE_S08,
744 },
745 {
746 .compatible = "mcp,mcp23s17",
747 .data = (void *) MCP_TYPE_S17,
97ddb1c8
LP		 748 },
749 { },
750};
751MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
752#endif
753
754#if IS_ENABLED(CONFIG_I2C)
ac791804 755static const struct of_device_id mcp23s08_i2c_of_match[] = {
97ddb1c8 756 {
45971686
LP		 757 .compatible = "microchip,mcp23008",
758 .data = (void *) MCP_TYPE_008,
97ddb1c8
LP		 759 },
760 {
45971686
LP		 761 .compatible = "microchip,mcp23017",
762 .data = (void *) MCP_TYPE_017,
763 },
764/* NOTE: The use of the mcp prefix is deprecated and will be removed. */
765 {
766 .compatible = "mcp,mcp23008",
767 .data = (void *) MCP_TYPE_008,
768 },
769 {
770 .compatible = "mcp,mcp23017",
771 .data = (void *) MCP_TYPE_017,
97ddb1c8
LP		 772 },
773 { },
774};
775MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
776#endif
777#endif /* CONFIG_OF */
778
779
cbf24fad 780#if IS_ENABLED(CONFIG_I2C)
752ad5e8 781
3836309d 782static int mcp230xx_probe(struct i2c_client *client,
752ad5e8
PK		 783 const struct i2c_device_id *id)
784{
3af0dbd5 785 struct mcp23s08_platform_data *pdata, local_pdata;
752ad5e8 786 struct mcp23s08 *mcp;
3af0dbd5 787 int status;
97ddb1c8
LP		 788 const struct of_device_id *match;
789
790 match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
791 &client->dev);
3af0dbd5
SZ		 792 if (match) {
793 pdata = &local_pdata;
794 pdata->base = -1;
795 pdata->chip[0].pullups = 0;
796 pdata->irq_controller = of_property_read_bool(
797 client->dev.of_node,
798 "interrupt-controller");
799 pdata->mirror = of_property_read_bool(client->dev.of_node,
800 "microchip,irq-mirror");
4e47f91b 801 client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
97ddb1c8 802 } else {
3af0dbd5 803 pdata = dev_get_platdata(&client->dev);
b184c388
SZ		 804 if (!pdata) {
805 pdata = devm_kzalloc(&client->dev,
806 sizeof(struct mcp23s08_platform_data),
807 GFP_KERNEL);
808 pdata->base = -1;
97ddb1c8 809 }
752ad5e8
PK		 810 }
811
33bc8411 812 mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
752ad5e8
PK		 813 if (!mcp)
814 return -ENOMEM;
815
4e47f91b 816 mcp->irq = client->irq;
752ad5e8 817 status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
3af0dbd5 818 id->driver_data, pdata, 0);
752ad5e8
PK		 819 if (status)
820 goto fail;
821
822 i2c_set_clientdata(client, mcp);
823
824 return 0;
825
826fail:
827 kfree(mcp);
828
829 return status;
830}
831
206210ce 832static int mcp230xx_remove(struct i2c_client *client)
752ad5e8
PK		 833{
834 struct mcp23s08 *mcp = i2c_get_clientdata(client);
752ad5e8 835
4e47f91b
LP		 836 if (client->irq && mcp->irq_controller)
837 mcp23s08_irq_teardown(mcp);
838
9f5132ae 839 gpiochip_remove(&mcp->chip);
840 kfree(mcp);
752ad5e8 841
9f5132ae 842 return 0;
752ad5e8
PK		 843}
844
845static const struct i2c_device_id mcp230xx_id[] = {
846 { "mcp23008", MCP_TYPE_008 },
847 { "mcp23017", MCP_TYPE_017 },
848 { },
849};
850MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
851
852static struct i2c_driver mcp230xx_driver = {
853 .driver = {
854 .name = "mcp230xx",
855 .owner = THIS_MODULE,
97ddb1c8 856 .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
752ad5e8
PK		 857 },
858 .probe = mcp230xx_probe,
8283c4ff 859 .remove = mcp230xx_remove,
752ad5e8
PK		 860 .id_table = mcp230xx_id,
861};
862
863static int __init mcp23s08_i2c_init(void)
864{
865 return i2c_add_driver(&mcp230xx_driver);
866}
867
868static void mcp23s08_i2c_exit(void)
869{
870 i2c_del_driver(&mcp230xx_driver);
871}
872
873#else
874
875static int __init mcp23s08_i2c_init(void) { return 0; }
876static void mcp23s08_i2c_exit(void) { }
877
878#endif /* CONFIG_I2C */
879
880/*----------------------------------------------------------------------*/
881
d62b98f3
PK		 882#ifdef CONFIG_SPI_MASTER
883
8f1cc3b1
DB		 884static int mcp23s08_probe(struct spi_device *spi)
885{
3af0dbd5 886 struct mcp23s08_platform_data *pdata, local_pdata;
8f1cc3b1 887 unsigned addr;
596a1c5f 888 int chips = 0;
8f1cc3b1 889 struct mcp23s08_driver_data *data;
0b7bb77f 890 int status, type;
3af0dbd5 891 unsigned ngpio = 0;
97ddb1c8
LP		 892 const struct of_device_id *match;
893 u32 spi_present_mask = 0;
894
895 match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
896 if (match) {
de755c33 897 type = (int)(uintptr_t)match->data;
97ddb1c8 898 status = of_property_read_u32(spi->dev.of_node,
45971686 899 "microchip,spi-present-mask", &spi_present_mask);
97ddb1c8 900 if (status) {
45971686
LP		 901 status = of_property_read_u32(spi->dev.of_node,
902 "mcp,spi-present-mask", &spi_present_mask);
903 if (status) {
904 dev_err(&spi->dev,
905 "DT has no spi-present-mask\n");
906 return -ENODEV;
907 }
97ddb1c8
LP		 908 }
909 if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
910 dev_err(&spi->dev, "invalid spi-present-mask\n");
911 return -ENODEV;
912 }
8f1cc3b1 913
3af0dbd5
SZ		 914 pdata = &local_pdata;
915 pdata->base = -1;
99e4b98d 916 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
3af0dbd5 917 pdata->chip[addr].pullups = 0;
3e3bed91
MS		 918 if (spi_present_mask & (1 << addr))
919 chips++;
99e4b98d 920 }
3af0dbd5
SZ		 921 pdata->irq_controller = of_property_read_bool(
922 spi->dev.of_node,
923 "interrupt-controller");
924 pdata->mirror = of_property_read_bool(spi->dev.of_node,
925 "microchip,irq-mirror");
97ddb1c8
LP		 926 } else {
927 type = spi_get_device_id(spi)->driver_data;
e56aee18 928 pdata = dev_get_platdata(&spi->dev);
b184c388
SZ		 929 if (!pdata) {
930 pdata = devm_kzalloc(&spi->dev,
931 sizeof(struct mcp23s08_platform_data),
932 GFP_KERNEL);
933 pdata->base = -1;
0b7bb77f 934 }
97ddb1c8
LP		 935
936 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
937 if (!pdata->chip[addr].is_present)
938 continue;
939 chips++;
940 if ((type == MCP_TYPE_S08) && (addr > 3)) {
941 dev_err(&spi->dev,
942 "mcp23s08 only supports address 0..3\n");
943 return -EINVAL;
944 }
945 spi_present_mask |= 1 << addr;
97ddb1c8 946 }
8f1cc3b1 947 }
8f1cc3b1 948
99e4b98d
MW		 949 if (!chips)
950 return -ENODEV;
951
7898b31e
VB		 952 data = devm_kzalloc(&spi->dev,
953 sizeof(*data) + chips * sizeof(struct mcp23s08),
954 GFP_KERNEL);
8f1cc3b1
DB		 955 if (!data)
956 return -ENOMEM;
7898b31e 957
8f1cc3b1
DB		 958 spi_set_drvdata(spi, data);
959
a231b88c
AS		 960 spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
961
0b7bb77f 962 for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
97ddb1c8 963 if (!(spi_present_mask & (1 << addr)))
8f1cc3b1
DB		 964 continue;
965 chips--;
966 data->mcp[addr] = &data->chip[chips];
a231b88c 967 data->mcp[addr]->irq = spi->irq;
d62b98f3 968 status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
3af0dbd5
SZ		 969 0x40 | (addr << 1), type, pdata,
970 addr);
8f1cc3b1
DB		 971 if (status < 0)
972 goto fail;
0b7bb77f 973
3af0dbd5
SZ		 974 if (pdata->base != -1)
975 pdata->base += (type == MCP_TYPE_S17) ? 16 : 8;
97ddb1c8 976 ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
8f1cc3b1 977 }
97ddb1c8 978 data->ngpio = ngpio;
e58b9e27
DB		 979
980 /* NOTE: these chips have a relatively sane IRQ framework, with
981 * per-signal masking and level/edge triggering. It's not yet
982 * handled here...
983 */
984
e58b9e27
DB		 985 return 0;
986
987fail:
0b7bb77f 988 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
8f1cc3b1
DB		 989
990 if (!data->mcp[addr])
991 continue;
9f5132ae 992 gpiochip_remove(&data->mcp[addr]->chip);
8f1cc3b1 993 }
e58b9e27
DB		 994 return status;
995}
996
997static int mcp23s08_remove(struct spi_device *spi)
998{
8f1cc3b1 999 struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
8f1cc3b1 1000 unsigned addr;
e58b9e27 1001
0b7bb77f 1002 for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
8f1cc3b1
DB		 1003
1004 if (!data->mcp[addr])
1005 continue;
1006
a231b88c
AS		 1007 if (spi->irq && data->mcp[addr]->irq_controller)
1008 mcp23s08_irq_teardown(data->mcp[addr]);
9f5132ae 1009 gpiochip_remove(&data->mcp[addr]->chip);
8f1cc3b1 1010 }
c4941e07 1011
9f5132ae 1012 return 0;
e58b9e27
DB		 1013}
1014
0b7bb77f
PK		 1015static const struct spi_device_id mcp23s08_ids[] = {
1016 { "mcp23s08", MCP_TYPE_S08 },
1017 { "mcp23s17", MCP_TYPE_S17 },
1018 { },
1019};
1020MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
1021
e58b9e27
DB		 1022static struct spi_driver mcp23s08_driver = {
1023 .probe = mcp23s08_probe,
1024 .remove = mcp23s08_remove,
0b7bb77f 1025 .id_table = mcp23s08_ids,
e58b9e27
DB		 1026 .driver = {
1027 .name = "mcp23s08",
1028 .owner = THIS_MODULE,
97ddb1c8 1029 .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
e58b9e27
DB		 1030 },
1031};
1032
d62b98f3
PK		 1033static int __init mcp23s08_spi_init(void)
1034{
1035 return spi_register_driver(&mcp23s08_driver);
1036}
1037
1038static void mcp23s08_spi_exit(void)
1039{
1040 spi_unregister_driver(&mcp23s08_driver);
1041}
1042
1043#else
1044
1045static int __init mcp23s08_spi_init(void) { return 0; }
1046static void mcp23s08_spi_exit(void) { }
1047
1048#endif /* CONFIG_SPI_MASTER */
1049
e58b9e27
DB		 1050/*----------------------------------------------------------------------*/
1051
1052static int __init mcp23s08_init(void)
1053{
752ad5e8
PK		 1054 int ret;
1055
1056 ret = mcp23s08_spi_init();
1057 if (ret)
1058 goto spi_fail;
1059
1060 ret = mcp23s08_i2c_init();
1061 if (ret)
1062 goto i2c_fail;
1063
1064 return 0;
1065
1066 i2c_fail:
1067 mcp23s08_spi_exit();
1068 spi_fail:
1069 return ret;
e58b9e27 1070}
752ad5e8 1071/* register after spi/i2c postcore initcall and before
673c0c00
DB		 1072 * subsys initcalls that may rely on these GPIOs
1073 */
1074subsys_initcall(mcp23s08_init);
e58b9e27
DB		 1075
1076static void __exit mcp23s08_exit(void)
1077{
d62b98f3 1078 mcp23s08_spi_exit();
752ad5e8 1079 mcp23s08_i2c_exit();
e58b9e27
DB		 1080}
1081module_exit(mcp23s08_exit);
1082
1083MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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