Commit | Line | Data |
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3cd2550c | 1 | /* |
2 | * MPC52xx gpio driver | |
3 | * | |
4 | * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #include <linux/of.h> | |
21 | #include <linux/kernel.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
3cd2550c | 23 | #include <linux/of_gpio.h> |
24 | #include <linux/io.h> | |
25 | #include <linux/of_platform.h> | |
bb207ef1 | 26 | #include <linux/module.h> |
3cd2550c | 27 | |
28 | #include <asm/gpio.h> | |
29 | #include <asm/mpc52xx.h> | |
30 | #include <sysdev/fsl_soc.h> | |
31 | ||
32 | static DEFINE_SPINLOCK(gpio_lock); | |
33 | ||
34 | struct mpc52xx_gpiochip { | |
35 | struct of_mm_gpio_chip mmchip; | |
36 | unsigned int shadow_dvo; | |
37 | unsigned int shadow_gpioe; | |
38 | unsigned int shadow_ddr; | |
39 | }; | |
40 | ||
41 | /* | |
42 | * GPIO LIB API implementation for wakeup GPIOs. | |
43 | * | |
44 | * There's a maximum of 8 wakeup GPIOs. Which of these are available | |
45 | * for use depends on your board setup. | |
46 | * | |
47 | * 0 -> GPIO_WKUP_7 | |
48 | * 1 -> GPIO_WKUP_6 | |
49 | * 2 -> PSC6_1 | |
50 | * 3 -> PSC6_0 | |
51 | * 4 -> ETH_17 | |
52 | * 5 -> PSC3_9 | |
53 | * 6 -> PSC2_4 | |
54 | * 7 -> PSC1_4 | |
55 | * | |
56 | */ | |
57 | static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio) | |
58 | { | |
59 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
60 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; | |
61 | unsigned int ret; | |
62 | ||
63 | ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1; | |
64 | ||
65 | pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret); | |
66 | ||
67 | return ret; | |
68 | } | |
69 | ||
70 | static inline void | |
71 | __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |
72 | { | |
73 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
74 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | |
75 | struct mpc52xx_gpiochip, mmchip); | |
76 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; | |
77 | ||
78 | if (val) | |
79 | chip->shadow_dvo |= 1 << (7 - gpio); | |
80 | else | |
81 | chip->shadow_dvo &= ~(1 << (7 - gpio)); | |
82 | ||
83 | out_8(®s->wkup_dvo, chip->shadow_dvo); | |
84 | } | |
85 | ||
86 | static void | |
87 | mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |
88 | { | |
89 | unsigned long flags; | |
90 | ||
91 | spin_lock_irqsave(&gpio_lock, flags); | |
92 | ||
93 | __mpc52xx_wkup_gpio_set(gc, gpio, val); | |
94 | ||
95 | spin_unlock_irqrestore(&gpio_lock, flags); | |
96 | ||
97 | pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val); | |
98 | } | |
99 | ||
100 | static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | |
101 | { | |
102 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
103 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | |
104 | struct mpc52xx_gpiochip, mmchip); | |
93072457 | 105 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; |
3cd2550c | 106 | unsigned long flags; |
107 | ||
108 | spin_lock_irqsave(&gpio_lock, flags); | |
109 | ||
110 | /* set the direction */ | |
111 | chip->shadow_ddr &= ~(1 << (7 - gpio)); | |
112 | out_8(®s->wkup_ddr, chip->shadow_ddr); | |
113 | ||
114 | /* and enable the pin */ | |
115 | chip->shadow_gpioe |= 1 << (7 - gpio); | |
116 | out_8(®s->wkup_gpioe, chip->shadow_gpioe); | |
117 | ||
118 | spin_unlock_irqrestore(&gpio_lock, flags); | |
119 | ||
120 | return 0; | |
121 | } | |
122 | ||
123 | static int | |
124 | mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |
125 | { | |
126 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
93072457 | 127 | struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs; |
3cd2550c | 128 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, |
129 | struct mpc52xx_gpiochip, mmchip); | |
130 | unsigned long flags; | |
131 | ||
132 | spin_lock_irqsave(&gpio_lock, flags); | |
133 | ||
134 | __mpc52xx_wkup_gpio_set(gc, gpio, val); | |
135 | ||
136 | /* Then set direction */ | |
137 | chip->shadow_ddr |= 1 << (7 - gpio); | |
138 | out_8(®s->wkup_ddr, chip->shadow_ddr); | |
139 | ||
140 | /* Finally enable the pin */ | |
141 | chip->shadow_gpioe |= 1 << (7 - gpio); | |
142 | out_8(®s->wkup_gpioe, chip->shadow_gpioe); | |
143 | ||
144 | spin_unlock_irqrestore(&gpio_lock, flags); | |
145 | ||
146 | pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
3836309d | 151 | static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev) |
3cd2550c | 152 | { |
153 | struct mpc52xx_gpiochip *chip; | |
93072457 | 154 | struct mpc52xx_gpio_wkup __iomem *regs; |
a19e3da5 | 155 | struct gpio_chip *gc; |
3cd2550c | 156 | int ret; |
157 | ||
f91b2dbb | 158 | chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL); |
3cd2550c | 159 | if (!chip) |
160 | return -ENOMEM; | |
161 | ||
f91b2dbb RRD |
162 | platform_set_drvdata(ofdev, chip); |
163 | ||
a19e3da5 | 164 | gc = &chip->mmchip.gc; |
3cd2550c | 165 | |
a19e3da5 AV |
166 | gc->ngpio = 8; |
167 | gc->direction_input = mpc52xx_wkup_gpio_dir_in; | |
168 | gc->direction_output = mpc52xx_wkup_gpio_dir_out; | |
169 | gc->get = mpc52xx_wkup_gpio_get; | |
170 | gc->set = mpc52xx_wkup_gpio_set; | |
3cd2550c | 171 | |
61c7a080 | 172 | ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); |
3cd2550c | 173 | if (ret) |
174 | return ret; | |
175 | ||
176 | regs = chip->mmchip.regs; | |
177 | chip->shadow_gpioe = in_8(®s->wkup_gpioe); | |
178 | chip->shadow_ddr = in_8(®s->wkup_ddr); | |
179 | chip->shadow_dvo = in_8(®s->wkup_dvo); | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
a454dc50 | 184 | static int mpc52xx_gpiochip_remove(struct platform_device *ofdev) |
3cd2550c | 185 | { |
f91b2dbb RRD |
186 | struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev); |
187 | ||
188 | of_mm_gpiochip_remove(&chip->mmchip); | |
189 | ||
190 | return 0; | |
3cd2550c | 191 | } |
192 | ||
193 | static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = { | |
6eae1ace | 194 | { .compatible = "fsl,mpc5200-gpio-wkup", }, |
3cd2550c | 195 | {} |
196 | }; | |
197 | ||
00006124 | 198 | static struct platform_driver mpc52xx_wkup_gpiochip_driver = { |
4018294b | 199 | .driver = { |
6eae1ace | 200 | .name = "mpc5200-gpio-wkup", |
4018294b GL |
201 | .of_match_table = mpc52xx_wkup_gpiochip_match, |
202 | }, | |
3cd2550c | 203 | .probe = mpc52xx_wkup_gpiochip_probe, |
204 | .remove = mpc52xx_gpiochip_remove, | |
205 | }; | |
206 | ||
207 | /* | |
208 | * GPIO LIB API implementation for simple GPIOs | |
209 | * | |
210 | * There's a maximum of 32 simple GPIOs. Which of these are available | |
211 | * for use depends on your board setup. | |
212 | * The numbering reflects the bit numbering in the port registers: | |
213 | * | |
214 | * 0..1 > reserved | |
215 | * 2..3 > IRDA | |
216 | * 4..7 > ETHR | |
217 | * 8..11 > reserved | |
218 | * 12..15 > USB | |
219 | * 16..17 > reserved | |
220 | * 18..23 > PSC3 | |
221 | * 24..27 > PSC2 | |
222 | * 28..31 > PSC1 | |
223 | */ | |
224 | static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio) | |
225 | { | |
226 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
227 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; | |
228 | unsigned int ret; | |
229 | ||
230 | ret = (in_be32(®s->simple_ival) >> (31 - gpio)) & 1; | |
231 | ||
232 | return ret; | |
233 | } | |
234 | ||
235 | static inline void | |
236 | __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |
237 | { | |
238 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
239 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | |
240 | struct mpc52xx_gpiochip, mmchip); | |
241 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; | |
242 | ||
243 | if (val) | |
244 | chip->shadow_dvo |= 1 << (31 - gpio); | |
245 | else | |
246 | chip->shadow_dvo &= ~(1 << (31 - gpio)); | |
247 | out_be32(®s->simple_dvo, chip->shadow_dvo); | |
248 | } | |
249 | ||
250 | static void | |
251 | mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |
252 | { | |
253 | unsigned long flags; | |
254 | ||
255 | spin_lock_irqsave(&gpio_lock, flags); | |
256 | ||
257 | __mpc52xx_simple_gpio_set(gc, gpio, val); | |
258 | ||
259 | spin_unlock_irqrestore(&gpio_lock, flags); | |
260 | ||
261 | pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val); | |
262 | } | |
263 | ||
264 | static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | |
265 | { | |
266 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
267 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | |
268 | struct mpc52xx_gpiochip, mmchip); | |
93072457 | 269 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; |
3cd2550c | 270 | unsigned long flags; |
271 | ||
272 | spin_lock_irqsave(&gpio_lock, flags); | |
273 | ||
274 | /* set the direction */ | |
275 | chip->shadow_ddr &= ~(1 << (31 - gpio)); | |
276 | out_be32(®s->simple_ddr, chip->shadow_ddr); | |
277 | ||
278 | /* and enable the pin */ | |
279 | chip->shadow_gpioe |= 1 << (31 - gpio); | |
280 | out_be32(®s->simple_gpioe, chip->shadow_gpioe); | |
281 | ||
282 | spin_unlock_irqrestore(&gpio_lock, flags); | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | static int | |
288 | mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |
289 | { | |
290 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | |
291 | struct mpc52xx_gpiochip *chip = container_of(mm_gc, | |
292 | struct mpc52xx_gpiochip, mmchip); | |
93072457 | 293 | struct mpc52xx_gpio __iomem *regs = mm_gc->regs; |
3cd2550c | 294 | unsigned long flags; |
295 | ||
296 | spin_lock_irqsave(&gpio_lock, flags); | |
297 | ||
298 | /* First set initial value */ | |
299 | __mpc52xx_simple_gpio_set(gc, gpio, val); | |
300 | ||
301 | /* Then set direction */ | |
302 | chip->shadow_ddr |= 1 << (31 - gpio); | |
303 | out_be32(®s->simple_ddr, chip->shadow_ddr); | |
304 | ||
305 | /* Finally enable the pin */ | |
306 | chip->shadow_gpioe |= 1 << (31 - gpio); | |
307 | out_be32(®s->simple_gpioe, chip->shadow_gpioe); | |
308 | ||
309 | spin_unlock_irqrestore(&gpio_lock, flags); | |
310 | ||
311 | pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val); | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
3836309d | 316 | static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev) |
3cd2550c | 317 | { |
318 | struct mpc52xx_gpiochip *chip; | |
a19e3da5 | 319 | struct gpio_chip *gc; |
93072457 | 320 | struct mpc52xx_gpio __iomem *regs; |
3cd2550c | 321 | int ret; |
322 | ||
f91b2dbb | 323 | chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL); |
3cd2550c | 324 | if (!chip) |
325 | return -ENOMEM; | |
326 | ||
f91b2dbb RRD |
327 | platform_set_drvdata(ofdev, chip); |
328 | ||
a19e3da5 | 329 | gc = &chip->mmchip.gc; |
3cd2550c | 330 | |
a19e3da5 AV |
331 | gc->ngpio = 32; |
332 | gc->direction_input = mpc52xx_simple_gpio_dir_in; | |
333 | gc->direction_output = mpc52xx_simple_gpio_dir_out; | |
334 | gc->get = mpc52xx_simple_gpio_get; | |
335 | gc->set = mpc52xx_simple_gpio_set; | |
3cd2550c | 336 | |
61c7a080 | 337 | ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip); |
3cd2550c | 338 | if (ret) |
339 | return ret; | |
340 | ||
341 | regs = chip->mmchip.regs; | |
342 | chip->shadow_gpioe = in_be32(®s->simple_gpioe); | |
343 | chip->shadow_ddr = in_be32(®s->simple_ddr); | |
344 | chip->shadow_dvo = in_be32(®s->simple_dvo); | |
345 | ||
346 | return 0; | |
347 | } | |
348 | ||
349 | static const struct of_device_id mpc52xx_simple_gpiochip_match[] = { | |
6eae1ace | 350 | { .compatible = "fsl,mpc5200-gpio", }, |
3cd2550c | 351 | {} |
352 | }; | |
353 | ||
00006124 | 354 | static struct platform_driver mpc52xx_simple_gpiochip_driver = { |
4018294b | 355 | .driver = { |
6eae1ace | 356 | .name = "mpc5200-gpio", |
4018294b GL |
357 | .of_match_table = mpc52xx_simple_gpiochip_match, |
358 | }, | |
3cd2550c | 359 | .probe = mpc52xx_simple_gpiochip_probe, |
360 | .remove = mpc52xx_gpiochip_remove, | |
361 | }; | |
362 | ||
3cd2550c | 363 | static int __init mpc52xx_gpio_init(void) |
364 | { | |
00006124 | 365 | if (platform_driver_register(&mpc52xx_wkup_gpiochip_driver)) |
3cd2550c | 366 | printk(KERN_ERR "Unable to register wakeup GPIO driver\n"); |
367 | ||
00006124 | 368 | if (platform_driver_register(&mpc52xx_simple_gpiochip_driver)) |
3cd2550c | 369 | printk(KERN_ERR "Unable to register simple GPIO driver\n"); |
370 | ||
3cd2550c | 371 | return 0; |
372 | } | |
373 | ||
3cd2550c | 374 | /* Make sure we get initialised before anyone else tries to use us */ |
375 | subsys_initcall(mpc52xx_gpio_init); | |
376 | ||
f91b2dbb RRD |
377 | static void __exit mpc52xx_gpio_exit(void) |
378 | { | |
379 | platform_driver_unregister(&mpc52xx_wkup_gpiochip_driver); | |
380 | ||
381 | platform_driver_unregister(&mpc52xx_simple_gpiochip_driver); | |
382 | } | |
383 | module_exit(mpc52xx_gpio_exit); | |
3cd2550c | 384 | |
385 | MODULE_DESCRIPTION("Freescale MPC52xx gpio driver"); | |
386 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de"); | |
387 | MODULE_LICENSE("GPL v2"); | |
388 |