Commit | Line | Data |
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15fae37d | 1 | /* |
c103de24 | 2 | * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders |
15fae37d DB |
3 | * |
4 | * Copyright (C) 2007 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
d120c17f | 23 | #include <linux/gpio.h> |
15fae37d DB |
24 | #include <linux/i2c.h> |
25 | #include <linux/i2c/pcf857x.h> | |
bb207ef1 | 26 | #include <linux/module.h> |
15fae37d | 27 | |
15fae37d | 28 | |
3760f736 JD |
29 | static const struct i2c_device_id pcf857x_id[] = { |
30 | { "pcf8574", 8 }, | |
4ba2ccb8 | 31 | { "pcf8574a", 8 }, |
3760f736 JD |
32 | { "pca8574", 8 }, |
33 | { "pca9670", 8 }, | |
34 | { "pca9672", 8 }, | |
35 | { "pca9674", 8 }, | |
36 | { "pcf8575", 16 }, | |
37 | { "pca8575", 16 }, | |
38 | { "pca9671", 16 }, | |
39 | { "pca9673", 16 }, | |
40 | { "pca9675", 16 }, | |
1673ad52 DB |
41 | { "max7328", 8 }, |
42 | { "max7329", 8 }, | |
3760f736 JD |
43 | { } |
44 | }; | |
45 | MODULE_DEVICE_TABLE(i2c, pcf857x_id); | |
46 | ||
15fae37d DB |
47 | /* |
48 | * The pcf857x, pca857x, and pca967x chips only expose one read and one | |
49 | * write register. Writing a "one" bit (to match the reset state) lets | |
50 | * that pin be used as an input; it's not an open-drain model, but acts | |
51 | * a bit like one. This is described as "quasi-bidirectional"; read the | |
52 | * chip documentation for details. | |
53 | * | |
54 | * Many other I2C GPIO expander chips (like the pca953x models) have | |
55 | * more complex register models and more conventional circuitry using | |
56 | * push/pull drivers. They often use the same 0x20..0x27 addresses as | |
57 | * pcf857x parts, making the "legacy" I2C driver model problematic. | |
58 | */ | |
59 | struct pcf857x { | |
60 | struct gpio_chip chip; | |
61 | struct i2c_client *client; | |
1673ad52 | 62 | struct mutex lock; /* protect 'out' */ |
15fae37d DB |
63 | unsigned out; /* software latch */ |
64 | }; | |
65 | ||
66 | /*-------------------------------------------------------------------------*/ | |
67 | ||
68 | /* Talk to 8-bit I/O expander */ | |
69 | ||
70 | static int pcf857x_input8(struct gpio_chip *chip, unsigned offset) | |
71 | { | |
72 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
1673ad52 | 73 | int status; |
15fae37d | 74 | |
1673ad52 | 75 | mutex_lock(&gpio->lock); |
15fae37d | 76 | gpio->out |= (1 << offset); |
1673ad52 DB |
77 | status = i2c_smbus_write_byte(gpio->client, gpio->out); |
78 | mutex_unlock(&gpio->lock); | |
79 | ||
80 | return status; | |
15fae37d DB |
81 | } |
82 | ||
83 | static int pcf857x_get8(struct gpio_chip *chip, unsigned offset) | |
84 | { | |
85 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
86 | s32 value; | |
87 | ||
88 | value = i2c_smbus_read_byte(gpio->client); | |
89 | return (value < 0) ? 0 : (value & (1 << offset)); | |
90 | } | |
91 | ||
92 | static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value) | |
93 | { | |
94 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
95 | unsigned bit = 1 << offset; | |
1673ad52 | 96 | int status; |
15fae37d | 97 | |
1673ad52 | 98 | mutex_lock(&gpio->lock); |
15fae37d DB |
99 | if (value) |
100 | gpio->out |= bit; | |
101 | else | |
102 | gpio->out &= ~bit; | |
1673ad52 DB |
103 | status = i2c_smbus_write_byte(gpio->client, gpio->out); |
104 | mutex_unlock(&gpio->lock); | |
105 | ||
106 | return status; | |
15fae37d DB |
107 | } |
108 | ||
109 | static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value) | |
110 | { | |
111 | pcf857x_output8(chip, offset, value); | |
112 | } | |
113 | ||
114 | /*-------------------------------------------------------------------------*/ | |
115 | ||
116 | /* Talk to 16-bit I/O expander */ | |
117 | ||
118 | static int i2c_write_le16(struct i2c_client *client, u16 word) | |
119 | { | |
120 | u8 buf[2] = { word & 0xff, word >> 8, }; | |
121 | int status; | |
122 | ||
123 | status = i2c_master_send(client, buf, 2); | |
124 | return (status < 0) ? status : 0; | |
125 | } | |
126 | ||
127 | static int i2c_read_le16(struct i2c_client *client) | |
128 | { | |
129 | u8 buf[2]; | |
130 | int status; | |
131 | ||
132 | status = i2c_master_recv(client, buf, 2); | |
133 | if (status < 0) | |
134 | return status; | |
135 | return (buf[1] << 8) | buf[0]; | |
136 | } | |
137 | ||
138 | static int pcf857x_input16(struct gpio_chip *chip, unsigned offset) | |
139 | { | |
140 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
1673ad52 | 141 | int status; |
15fae37d | 142 | |
1673ad52 | 143 | mutex_lock(&gpio->lock); |
15fae37d | 144 | gpio->out |= (1 << offset); |
1673ad52 DB |
145 | status = i2c_write_le16(gpio->client, gpio->out); |
146 | mutex_unlock(&gpio->lock); | |
147 | ||
148 | return status; | |
15fae37d DB |
149 | } |
150 | ||
151 | static int pcf857x_get16(struct gpio_chip *chip, unsigned offset) | |
152 | { | |
153 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
154 | int value; | |
155 | ||
156 | value = i2c_read_le16(gpio->client); | |
157 | return (value < 0) ? 0 : (value & (1 << offset)); | |
158 | } | |
159 | ||
160 | static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value) | |
161 | { | |
162 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
163 | unsigned bit = 1 << offset; | |
1673ad52 | 164 | int status; |
15fae37d | 165 | |
1673ad52 | 166 | mutex_lock(&gpio->lock); |
15fae37d DB |
167 | if (value) |
168 | gpio->out |= bit; | |
169 | else | |
170 | gpio->out &= ~bit; | |
1673ad52 DB |
171 | status = i2c_write_le16(gpio->client, gpio->out); |
172 | mutex_unlock(&gpio->lock); | |
173 | ||
174 | return status; | |
15fae37d DB |
175 | } |
176 | ||
177 | static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value) | |
178 | { | |
179 | pcf857x_output16(chip, offset, value); | |
180 | } | |
181 | ||
182 | /*-------------------------------------------------------------------------*/ | |
183 | ||
d2653e92 JD |
184 | static int pcf857x_probe(struct i2c_client *client, |
185 | const struct i2c_device_id *id) | |
15fae37d DB |
186 | { |
187 | struct pcf857x_platform_data *pdata; | |
188 | struct pcf857x *gpio; | |
189 | int status; | |
190 | ||
191 | pdata = client->dev.platform_data; | |
a342d215 BD |
192 | if (!pdata) { |
193 | dev_dbg(&client->dev, "no platform data\n"); | |
a342d215 | 194 | } |
15fae37d DB |
195 | |
196 | /* Allocate, initialize, and register this gpio_chip. */ | |
197 | gpio = kzalloc(sizeof *gpio, GFP_KERNEL); | |
198 | if (!gpio) | |
199 | return -ENOMEM; | |
200 | ||
1673ad52 DB |
201 | mutex_init(&gpio->lock); |
202 | ||
49946f68 | 203 | gpio->chip.base = pdata ? pdata->gpio_base : -1; |
15fae37d | 204 | gpio->chip.can_sleep = 1; |
d8f388d8 | 205 | gpio->chip.dev = &client->dev; |
d72cbed0 | 206 | gpio->chip.owner = THIS_MODULE; |
15fae37d DB |
207 | |
208 | /* NOTE: the OnSemi jlc1562b is also largely compatible with | |
209 | * these parts, notably for output. It has a low-resolution | |
210 | * DAC instead of pin change IRQs; and its inputs can be the | |
211 | * result of comparators. | |
212 | */ | |
213 | ||
214 | /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; | |
215 | * 9670, 9672, 9764, and 9764a use quite a variety. | |
216 | * | |
217 | * NOTE: we don't distinguish here between *4 and *4a parts. | |
218 | */ | |
3760f736 JD |
219 | gpio->chip.ngpio = id->driver_data; |
220 | if (gpio->chip.ngpio == 8) { | |
15fae37d DB |
221 | gpio->chip.direction_input = pcf857x_input8; |
222 | gpio->chip.get = pcf857x_get8; | |
223 | gpio->chip.direction_output = pcf857x_output8; | |
224 | gpio->chip.set = pcf857x_set8; | |
225 | ||
226 | if (!i2c_check_functionality(client->adapter, | |
227 | I2C_FUNC_SMBUS_BYTE)) | |
228 | status = -EIO; | |
229 | ||
230 | /* fail if there's no chip present */ | |
231 | else | |
232 | status = i2c_smbus_read_byte(client); | |
233 | ||
234 | /* '75/'75c addresses are 0x20..0x27, just like the '74; | |
235 | * the '75c doesn't have a current source pulling high. | |
236 | * 9671, 9673, and 9765 use quite a variety of addresses. | |
237 | * | |
238 | * NOTE: we don't distinguish here between '75 and '75c parts. | |
239 | */ | |
3760f736 | 240 | } else if (gpio->chip.ngpio == 16) { |
15fae37d DB |
241 | gpio->chip.direction_input = pcf857x_input16; |
242 | gpio->chip.get = pcf857x_get16; | |
243 | gpio->chip.direction_output = pcf857x_output16; | |
244 | gpio->chip.set = pcf857x_set16; | |
245 | ||
246 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) | |
247 | status = -EIO; | |
248 | ||
249 | /* fail if there's no chip present */ | |
250 | else | |
251 | status = i2c_read_le16(client); | |
252 | ||
a342d215 BD |
253 | } else { |
254 | dev_dbg(&client->dev, "unsupported number of gpios\n"); | |
255 | status = -EINVAL; | |
256 | } | |
15fae37d DB |
257 | |
258 | if (status < 0) | |
259 | goto fail; | |
260 | ||
261 | gpio->chip.label = client->name; | |
262 | ||
263 | gpio->client = client; | |
264 | i2c_set_clientdata(client, gpio); | |
265 | ||
266 | /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. | |
267 | * We can't actually know whether a pin is configured (a) as output | |
268 | * and driving the signal low, or (b) as input and reporting a low | |
269 | * value ... without knowing the last value written since the chip | |
270 | * came out of reset (if any). We can't read the latched output. | |
271 | * | |
272 | * In short, the only reliable solution for setting up pin direction | |
273 | * is to do it explicitly. The setup() method can do that, but it | |
274 | * may cause transient glitching since it can't know the last value | |
275 | * written (some pins may need to be driven low). | |
276 | * | |
277 | * Using pdata->n_latch avoids that trouble. When left initialized | |
278 | * to zero, our software copy of the "latch" then matches the chip's | |
279 | * all-ones reset state. Otherwise it flags pins to be driven low. | |
280 | */ | |
49946f68 | 281 | gpio->out = pdata ? ~pdata->n_latch : ~0; |
15fae37d DB |
282 | |
283 | status = gpiochip_add(&gpio->chip); | |
284 | if (status < 0) | |
285 | goto fail; | |
286 | ||
287 | /* NOTE: these chips can issue "some pin-changed" IRQs, which we | |
288 | * don't yet even try to use. Among other issues, the relevant | |
289 | * genirq state isn't available to modular drivers; and most irq | |
290 | * methods can't be called from sleeping contexts. | |
291 | */ | |
292 | ||
64842aad | 293 | dev_info(&client->dev, "%s\n", |
15fae37d DB |
294 | client->irq ? " (irq ignored)" : ""); |
295 | ||
296 | /* Let platform code set up the GPIOs and their users. | |
297 | * Now is the first time anyone could use them. | |
298 | */ | |
49946f68 | 299 | if (pdata && pdata->setup) { |
15fae37d DB |
300 | status = pdata->setup(client, |
301 | gpio->chip.base, gpio->chip.ngpio, | |
302 | pdata->context); | |
303 | if (status < 0) | |
304 | dev_warn(&client->dev, "setup --> %d\n", status); | |
305 | } | |
306 | ||
307 | return 0; | |
308 | ||
309 | fail: | |
310 | dev_dbg(&client->dev, "probe error %d for '%s'\n", | |
311 | status, client->name); | |
312 | kfree(gpio); | |
313 | return status; | |
314 | } | |
315 | ||
316 | static int pcf857x_remove(struct i2c_client *client) | |
317 | { | |
318 | struct pcf857x_platform_data *pdata = client->dev.platform_data; | |
319 | struct pcf857x *gpio = i2c_get_clientdata(client); | |
320 | int status = 0; | |
321 | ||
49946f68 | 322 | if (pdata && pdata->teardown) { |
15fae37d DB |
323 | status = pdata->teardown(client, |
324 | gpio->chip.base, gpio->chip.ngpio, | |
325 | pdata->context); | |
326 | if (status < 0) { | |
327 | dev_err(&client->dev, "%s --> %d\n", | |
328 | "teardown", status); | |
329 | return status; | |
330 | } | |
331 | } | |
332 | ||
333 | status = gpiochip_remove(&gpio->chip); | |
334 | if (status == 0) | |
335 | kfree(gpio); | |
336 | else | |
337 | dev_err(&client->dev, "%s --> %d\n", "remove", status); | |
338 | return status; | |
339 | } | |
340 | ||
341 | static struct i2c_driver pcf857x_driver = { | |
342 | .driver = { | |
343 | .name = "pcf857x", | |
344 | .owner = THIS_MODULE, | |
345 | }, | |
346 | .probe = pcf857x_probe, | |
347 | .remove = pcf857x_remove, | |
3760f736 | 348 | .id_table = pcf857x_id, |
15fae37d DB |
349 | }; |
350 | ||
351 | static int __init pcf857x_init(void) | |
352 | { | |
353 | return i2c_add_driver(&pcf857x_driver); | |
354 | } | |
2f8d1197 DB |
355 | /* register after i2c postcore initcall and before |
356 | * subsys initcalls that may rely on these GPIOs | |
357 | */ | |
358 | subsys_initcall(pcf857x_init); | |
15fae37d DB |
359 | |
360 | static void __exit pcf857x_exit(void) | |
361 | { | |
362 | i2c_del_driver(&pcf857x_driver); | |
363 | } | |
364 | module_exit(pcf857x_exit); | |
365 | ||
366 | MODULE_LICENSE("GPL"); | |
367 | MODULE_AUTHOR("David Brownell"); |