gpio: pcf857x: remove the irq_demux_work and gpio->irq
[deliverable/linux.git] / drivers / gpio / gpio-pcf857x.c
CommitLineData
15fae37d 1/*
c103de24 2 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
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DB
3 *
4 * Copyright (C) 2007 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
d120c17f 21#include <linux/gpio.h>
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22#include <linux/i2c.h>
23#include <linux/i2c/pcf857x.h>
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24#include <linux/interrupt.h>
25#include <linux/irq.h>
26#include <linux/irqdomain.h>
c990d6cb 27#include <linux/kernel.h>
bb207ef1 28#include <linux/module.h>
c990d6cb 29#include <linux/slab.h>
6e20a0a4 30#include <linux/spinlock.h>
15fae37d 31
15fae37d 32
3760f736
JD
33static const struct i2c_device_id pcf857x_id[] = {
34 { "pcf8574", 8 },
4ba2ccb8 35 { "pcf8574a", 8 },
3760f736
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36 { "pca8574", 8 },
37 { "pca9670", 8 },
38 { "pca9672", 8 },
39 { "pca9674", 8 },
40 { "pcf8575", 16 },
41 { "pca8575", 16 },
42 { "pca9671", 16 },
43 { "pca9673", 16 },
44 { "pca9675", 16 },
1673ad52
DB
45 { "max7328", 8 },
46 { "max7329", 8 },
02130490 47 { "tca9554", 8 },
3760f736
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48 { }
49};
50MODULE_DEVICE_TABLE(i2c, pcf857x_id);
51
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DB
52/*
53 * The pcf857x, pca857x, and pca967x chips only expose one read and one
54 * write register. Writing a "one" bit (to match the reset state) lets
55 * that pin be used as an input; it's not an open-drain model, but acts
56 * a bit like one. This is described as "quasi-bidirectional"; read the
57 * chip documentation for details.
58 *
59 * Many other I2C GPIO expander chips (like the pca953x models) have
60 * more complex register models and more conventional circuitry using
61 * push/pull drivers. They often use the same 0x20..0x27 addresses as
62 * pcf857x parts, making the "legacy" I2C driver model problematic.
63 */
64struct pcf857x {
65 struct gpio_chip chip;
66 struct i2c_client *client;
1673ad52 67 struct mutex lock; /* protect 'out' */
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68 struct irq_domain *irq_domain; /* for irq demux */
69 spinlock_t slock; /* protect irq demux */
15fae37d 70 unsigned out; /* software latch */
6e20a0a4 71 unsigned status; /* current status */
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72
73 int (*write)(struct i2c_client *client, unsigned data);
74 int (*read)(struct i2c_client *client);
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75};
76
77/*-------------------------------------------------------------------------*/
78
79/* Talk to 8-bit I/O expander */
80
0c65ddd4 81static int i2c_write_le8(struct i2c_client *client, unsigned data)
15fae37d 82{
0c65ddd4 83 return i2c_smbus_write_byte(client, data);
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DB
84}
85
0c65ddd4 86static int i2c_read_le8(struct i2c_client *client)
15fae37d 87{
0c65ddd4 88 return (int)i2c_smbus_read_byte(client);
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DB
89}
90
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91/* Talk to 16-bit I/O expander */
92
0c65ddd4 93static int i2c_write_le16(struct i2c_client *client, unsigned word)
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DB
94{
95 u8 buf[2] = { word & 0xff, word >> 8, };
96 int status;
97
98 status = i2c_master_send(client, buf, 2);
99 return (status < 0) ? status : 0;
100}
101
102static int i2c_read_le16(struct i2c_client *client)
103{
104 u8 buf[2];
105 int status;
106
107 status = i2c_master_recv(client, buf, 2);
108 if (status < 0)
109 return status;
110 return (buf[1] << 8) | buf[0];
111}
112
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113/*-------------------------------------------------------------------------*/
114
115static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
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116{
117 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
1673ad52 118 int status;
15fae37d 119
1673ad52 120 mutex_lock(&gpio->lock);
15fae37d 121 gpio->out |= (1 << offset);
0c65ddd4 122 status = gpio->write(gpio->client, gpio->out);
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123 mutex_unlock(&gpio->lock);
124
125 return status;
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126}
127
0c65ddd4 128static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
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129{
130 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
131 int value;
132
0c65ddd4 133 value = gpio->read(gpio->client);
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DB
134 return (value < 0) ? 0 : (value & (1 << offset));
135}
136
0c65ddd4 137static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
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DB
138{
139 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
140 unsigned bit = 1 << offset;
1673ad52 141 int status;
15fae37d 142
1673ad52 143 mutex_lock(&gpio->lock);
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144 if (value)
145 gpio->out |= bit;
146 else
147 gpio->out &= ~bit;
0c65ddd4 148 status = gpio->write(gpio->client, gpio->out);
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149 mutex_unlock(&gpio->lock);
150
151 return status;
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152}
153
0c65ddd4 154static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
15fae37d 155{
0c65ddd4 156 pcf857x_output(chip, offset, value);
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157}
158
159/*-------------------------------------------------------------------------*/
160
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161static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
162{
163 struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);
164
165 return irq_create_mapping(gpio->irq_domain, offset);
166}
167
5c21d008
GC
168static irqreturn_t pcf857x_irq(int irq, void *data)
169{
170 struct pcf857x *gpio = data;
171 unsigned long change, i, status, flags;
172
173 status = gpio->read(gpio->client);
174
175 spin_lock_irqsave(&gpio->slock, flags);
176
177 change = gpio->status ^ status;
178 for_each_set_bit(i, &change, gpio->chip.ngpio)
179 generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
180 gpio->status = status;
181
182 spin_unlock_irqrestore(&gpio->slock, flags);
183
184 return IRQ_HANDLED;
185}
186
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187static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq,
188 irq_hw_number_t hw)
189{
190 irq_set_chip_and_handler(virq,
191 &dummy_irq_chip,
192 handle_level_irq);
193 return 0;
194}
195
196static struct irq_domain_ops pcf857x_irq_domain_ops = {
197 .map = pcf857x_irq_domain_map,
198};
199
200static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
201{
202 if (gpio->irq_domain)
203 irq_domain_remove(gpio->irq_domain);
204
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205}
206
207static int pcf857x_irq_domain_init(struct pcf857x *gpio,
805f864e 208 struct i2c_client *client)
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209{
210 int status;
211
805f864e 212 gpio->irq_domain = irq_domain_add_linear(client->dev.of_node,
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213 gpio->chip.ngpio,
214 &pcf857x_irq_domain_ops,
215 NULL);
216 if (!gpio->irq_domain)
217 goto fail;
218
219 /* enable real irq */
5c21d008
GC
220 status = devm_request_threaded_irq(&client->dev, client->irq,
221 NULL, pcf857x_irq, IRQF_ONESHOT |
222 IRQF_TRIGGER_FALLING,
223 dev_name(&client->dev), gpio);
224
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225 if (status)
226 goto fail;
227
228 /* enable gpio_to_irq() */
6e20a0a4 229 gpio->chip.to_irq = pcf857x_to_irq;
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230
231 return 0;
232
233fail:
234 pcf857x_irq_domain_cleanup(gpio);
235 return -EINVAL;
236}
237
238/*-------------------------------------------------------------------------*/
239
d2653e92
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240static int pcf857x_probe(struct i2c_client *client,
241 const struct i2c_device_id *id)
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242{
243 struct pcf857x_platform_data *pdata;
244 struct pcf857x *gpio;
245 int status;
246
e56aee18 247 pdata = dev_get_platdata(&client->dev);
a342d215
BD
248 if (!pdata) {
249 dev_dbg(&client->dev, "no platform data\n");
a342d215 250 }
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251
252 /* Allocate, initialize, and register this gpio_chip. */
f39f54af 253 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
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254 if (!gpio)
255 return -ENOMEM;
256
1673ad52 257 mutex_init(&gpio->lock);
6e20a0a4 258 spin_lock_init(&gpio->slock);
1673ad52 259
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260 gpio->chip.base = pdata ? pdata->gpio_base : -1;
261 gpio->chip.can_sleep = 1;
262 gpio->chip.dev = &client->dev;
263 gpio->chip.owner = THIS_MODULE;
264 gpio->chip.get = pcf857x_get;
265 gpio->chip.set = pcf857x_set;
266 gpio->chip.direction_input = pcf857x_input;
267 gpio->chip.direction_output = pcf857x_output;
268 gpio->chip.ngpio = id->driver_data;
15fae37d 269
6e20a0a4 270 /* enable gpio_to_irq() if platform has settings */
655c4e79
LP
271 if (client->irq) {
272 status = pcf857x_irq_domain_init(gpio, client);
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273 if (status < 0) {
274 dev_err(&client->dev, "irq_domain init failed\n");
275 goto fail;
276 }
277 }
278
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279 /* NOTE: the OnSemi jlc1562b is also largely compatible with
280 * these parts, notably for output. It has a low-resolution
281 * DAC instead of pin change IRQs; and its inputs can be the
282 * result of comparators.
283 */
284
285 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
286 * 9670, 9672, 9764, and 9764a use quite a variety.
287 *
288 * NOTE: we don't distinguish here between *4 and *4a parts.
289 */
3760f736 290 if (gpio->chip.ngpio == 8) {
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291 gpio->write = i2c_write_le8;
292 gpio->read = i2c_read_le8;
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293
294 if (!i2c_check_functionality(client->adapter,
295 I2C_FUNC_SMBUS_BYTE))
296 status = -EIO;
297
298 /* fail if there's no chip present */
299 else
300 status = i2c_smbus_read_byte(client);
301
302 /* '75/'75c addresses are 0x20..0x27, just like the '74;
303 * the '75c doesn't have a current source pulling high.
304 * 9671, 9673, and 9765 use quite a variety of addresses.
305 *
306 * NOTE: we don't distinguish here between '75 and '75c parts.
307 */
3760f736 308 } else if (gpio->chip.ngpio == 16) {
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309 gpio->write = i2c_write_le16;
310 gpio->read = i2c_read_le16;
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311
312 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
313 status = -EIO;
314
315 /* fail if there's no chip present */
316 else
317 status = i2c_read_le16(client);
318
a342d215
BD
319 } else {
320 dev_dbg(&client->dev, "unsupported number of gpios\n");
321 status = -EINVAL;
322 }
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DB
323
324 if (status < 0)
325 goto fail;
326
327 gpio->chip.label = client->name;
328
329 gpio->client = client;
330 i2c_set_clientdata(client, gpio);
331
332 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
333 * We can't actually know whether a pin is configured (a) as output
334 * and driving the signal low, or (b) as input and reporting a low
335 * value ... without knowing the last value written since the chip
336 * came out of reset (if any). We can't read the latched output.
337 *
338 * In short, the only reliable solution for setting up pin direction
339 * is to do it explicitly. The setup() method can do that, but it
340 * may cause transient glitching since it can't know the last value
341 * written (some pins may need to be driven low).
342 *
343 * Using pdata->n_latch avoids that trouble. When left initialized
344 * to zero, our software copy of the "latch" then matches the chip's
345 * all-ones reset state. Otherwise it flags pins to be driven low.
346 */
49946f68 347 gpio->out = pdata ? ~pdata->n_latch : ~0;
6e20a0a4 348 gpio->status = gpio->out;
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DB
349
350 status = gpiochip_add(&gpio->chip);
351 if (status < 0)
352 goto fail;
353
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354 /* Let platform code set up the GPIOs and their users.
355 * Now is the first time anyone could use them.
356 */
49946f68 357 if (pdata && pdata->setup) {
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358 status = pdata->setup(client,
359 gpio->chip.base, gpio->chip.ngpio,
360 pdata->context);
361 if (status < 0)
362 dev_warn(&client->dev, "setup --> %d\n", status);
363 }
364
805f864e
KM
365 dev_info(&client->dev, "probed\n");
366
15fae37d
DB
367 return 0;
368
369fail:
370 dev_dbg(&client->dev, "probe error %d for '%s'\n",
371 status, client->name);
6e20a0a4 372
655c4e79 373 if (client->irq)
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KM
374 pcf857x_irq_domain_cleanup(gpio);
375
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DB
376 return status;
377}
378
379static int pcf857x_remove(struct i2c_client *client)
380{
e56aee18 381 struct pcf857x_platform_data *pdata = dev_get_platdata(&client->dev);
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DB
382 struct pcf857x *gpio = i2c_get_clientdata(client);
383 int status = 0;
384
49946f68 385 if (pdata && pdata->teardown) {
15fae37d
DB
386 status = pdata->teardown(client,
387 gpio->chip.base, gpio->chip.ngpio,
388 pdata->context);
389 if (status < 0) {
390 dev_err(&client->dev, "%s --> %d\n",
391 "teardown", status);
392 return status;
393 }
394 }
395
655c4e79 396 if (client->irq)
6e20a0a4
KM
397 pcf857x_irq_domain_cleanup(gpio);
398
15fae37d 399 status = gpiochip_remove(&gpio->chip);
f39f54af 400 if (status)
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DB
401 dev_err(&client->dev, "%s --> %d\n", "remove", status);
402 return status;
403}
404
405static struct i2c_driver pcf857x_driver = {
406 .driver = {
407 .name = "pcf857x",
408 .owner = THIS_MODULE,
409 },
410 .probe = pcf857x_probe,
411 .remove = pcf857x_remove,
3760f736 412 .id_table = pcf857x_id,
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DB
413};
414
415static int __init pcf857x_init(void)
416{
417 return i2c_add_driver(&pcf857x_driver);
418}
2f8d1197
DB
419/* register after i2c postcore initcall and before
420 * subsys initcalls that may rely on these GPIOs
421 */
422subsys_initcall(pcf857x_init);
15fae37d
DB
423
424static void __exit pcf857x_exit(void)
425{
426 i2c_del_driver(&pcf857x_driver);
427}
428module_exit(pcf857x_exit);
429
430MODULE_LICENSE("GPL");
431MODULE_AUTHOR("David Brownell");
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