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15fae37d DB |
1 | /* |
2 | * pcf857x - driver for pcf857x, pca857x, and pca967x I2C GPIO expanders | |
3 | * | |
4 | * Copyright (C) 2007 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
22 | #include <linux/slab.h> | |
23 | #include <linux/i2c.h> | |
24 | #include <linux/i2c/pcf857x.h> | |
25 | ||
26 | #include <asm/gpio.h> | |
27 | ||
28 | ||
3760f736 JD |
29 | static const struct i2c_device_id pcf857x_id[] = { |
30 | { "pcf8574", 8 }, | |
31 | { "pca8574", 8 }, | |
32 | { "pca9670", 8 }, | |
33 | { "pca9672", 8 }, | |
34 | { "pca9674", 8 }, | |
35 | { "pcf8575", 16 }, | |
36 | { "pca8575", 16 }, | |
37 | { "pca9671", 16 }, | |
38 | { "pca9673", 16 }, | |
39 | { "pca9675", 16 }, | |
40 | { } | |
41 | }; | |
42 | MODULE_DEVICE_TABLE(i2c, pcf857x_id); | |
43 | ||
15fae37d DB |
44 | /* |
45 | * The pcf857x, pca857x, and pca967x chips only expose one read and one | |
46 | * write register. Writing a "one" bit (to match the reset state) lets | |
47 | * that pin be used as an input; it's not an open-drain model, but acts | |
48 | * a bit like one. This is described as "quasi-bidirectional"; read the | |
49 | * chip documentation for details. | |
50 | * | |
51 | * Many other I2C GPIO expander chips (like the pca953x models) have | |
52 | * more complex register models and more conventional circuitry using | |
53 | * push/pull drivers. They often use the same 0x20..0x27 addresses as | |
54 | * pcf857x parts, making the "legacy" I2C driver model problematic. | |
55 | */ | |
56 | struct pcf857x { | |
57 | struct gpio_chip chip; | |
58 | struct i2c_client *client; | |
59 | unsigned out; /* software latch */ | |
60 | }; | |
61 | ||
62 | /*-------------------------------------------------------------------------*/ | |
63 | ||
64 | /* Talk to 8-bit I/O expander */ | |
65 | ||
66 | static int pcf857x_input8(struct gpio_chip *chip, unsigned offset) | |
67 | { | |
68 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
69 | ||
70 | gpio->out |= (1 << offset); | |
71 | return i2c_smbus_write_byte(gpio->client, gpio->out); | |
72 | } | |
73 | ||
74 | static int pcf857x_get8(struct gpio_chip *chip, unsigned offset) | |
75 | { | |
76 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
77 | s32 value; | |
78 | ||
79 | value = i2c_smbus_read_byte(gpio->client); | |
80 | return (value < 0) ? 0 : (value & (1 << offset)); | |
81 | } | |
82 | ||
83 | static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value) | |
84 | { | |
85 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
86 | unsigned bit = 1 << offset; | |
87 | ||
88 | if (value) | |
89 | gpio->out |= bit; | |
90 | else | |
91 | gpio->out &= ~bit; | |
92 | return i2c_smbus_write_byte(gpio->client, gpio->out); | |
93 | } | |
94 | ||
95 | static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value) | |
96 | { | |
97 | pcf857x_output8(chip, offset, value); | |
98 | } | |
99 | ||
100 | /*-------------------------------------------------------------------------*/ | |
101 | ||
102 | /* Talk to 16-bit I/O expander */ | |
103 | ||
104 | static int i2c_write_le16(struct i2c_client *client, u16 word) | |
105 | { | |
106 | u8 buf[2] = { word & 0xff, word >> 8, }; | |
107 | int status; | |
108 | ||
109 | status = i2c_master_send(client, buf, 2); | |
110 | return (status < 0) ? status : 0; | |
111 | } | |
112 | ||
113 | static int i2c_read_le16(struct i2c_client *client) | |
114 | { | |
115 | u8 buf[2]; | |
116 | int status; | |
117 | ||
118 | status = i2c_master_recv(client, buf, 2); | |
119 | if (status < 0) | |
120 | return status; | |
121 | return (buf[1] << 8) | buf[0]; | |
122 | } | |
123 | ||
124 | static int pcf857x_input16(struct gpio_chip *chip, unsigned offset) | |
125 | { | |
126 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
127 | ||
128 | gpio->out |= (1 << offset); | |
129 | return i2c_write_le16(gpio->client, gpio->out); | |
130 | } | |
131 | ||
132 | static int pcf857x_get16(struct gpio_chip *chip, unsigned offset) | |
133 | { | |
134 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
135 | int value; | |
136 | ||
137 | value = i2c_read_le16(gpio->client); | |
138 | return (value < 0) ? 0 : (value & (1 << offset)); | |
139 | } | |
140 | ||
141 | static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value) | |
142 | { | |
143 | struct pcf857x *gpio = container_of(chip, struct pcf857x, chip); | |
144 | unsigned bit = 1 << offset; | |
145 | ||
146 | if (value) | |
147 | gpio->out |= bit; | |
148 | else | |
149 | gpio->out &= ~bit; | |
150 | return i2c_write_le16(gpio->client, gpio->out); | |
151 | } | |
152 | ||
153 | static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value) | |
154 | { | |
155 | pcf857x_output16(chip, offset, value); | |
156 | } | |
157 | ||
158 | /*-------------------------------------------------------------------------*/ | |
159 | ||
d2653e92 JD |
160 | static int pcf857x_probe(struct i2c_client *client, |
161 | const struct i2c_device_id *id) | |
15fae37d DB |
162 | { |
163 | struct pcf857x_platform_data *pdata; | |
164 | struct pcf857x *gpio; | |
165 | int status; | |
166 | ||
167 | pdata = client->dev.platform_data; | |
168 | if (!pdata) | |
169 | return -ENODEV; | |
170 | ||
171 | /* Allocate, initialize, and register this gpio_chip. */ | |
172 | gpio = kzalloc(sizeof *gpio, GFP_KERNEL); | |
173 | if (!gpio) | |
174 | return -ENOMEM; | |
175 | ||
176 | gpio->chip.base = pdata->gpio_base; | |
177 | gpio->chip.can_sleep = 1; | |
d72cbed0 | 178 | gpio->chip.owner = THIS_MODULE; |
15fae37d DB |
179 | |
180 | /* NOTE: the OnSemi jlc1562b is also largely compatible with | |
181 | * these parts, notably for output. It has a low-resolution | |
182 | * DAC instead of pin change IRQs; and its inputs can be the | |
183 | * result of comparators. | |
184 | */ | |
185 | ||
186 | /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f; | |
187 | * 9670, 9672, 9764, and 9764a use quite a variety. | |
188 | * | |
189 | * NOTE: we don't distinguish here between *4 and *4a parts. | |
190 | */ | |
3760f736 JD |
191 | gpio->chip.ngpio = id->driver_data; |
192 | if (gpio->chip.ngpio == 8) { | |
15fae37d DB |
193 | gpio->chip.direction_input = pcf857x_input8; |
194 | gpio->chip.get = pcf857x_get8; | |
195 | gpio->chip.direction_output = pcf857x_output8; | |
196 | gpio->chip.set = pcf857x_set8; | |
197 | ||
198 | if (!i2c_check_functionality(client->adapter, | |
199 | I2C_FUNC_SMBUS_BYTE)) | |
200 | status = -EIO; | |
201 | ||
202 | /* fail if there's no chip present */ | |
203 | else | |
204 | status = i2c_smbus_read_byte(client); | |
205 | ||
206 | /* '75/'75c addresses are 0x20..0x27, just like the '74; | |
207 | * the '75c doesn't have a current source pulling high. | |
208 | * 9671, 9673, and 9765 use quite a variety of addresses. | |
209 | * | |
210 | * NOTE: we don't distinguish here between '75 and '75c parts. | |
211 | */ | |
3760f736 | 212 | } else if (gpio->chip.ngpio == 16) { |
15fae37d DB |
213 | gpio->chip.direction_input = pcf857x_input16; |
214 | gpio->chip.get = pcf857x_get16; | |
215 | gpio->chip.direction_output = pcf857x_output16; | |
216 | gpio->chip.set = pcf857x_set16; | |
217 | ||
218 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) | |
219 | status = -EIO; | |
220 | ||
221 | /* fail if there's no chip present */ | |
222 | else | |
223 | status = i2c_read_le16(client); | |
224 | ||
225 | } else | |
226 | status = -ENODEV; | |
227 | ||
228 | if (status < 0) | |
229 | goto fail; | |
230 | ||
231 | gpio->chip.label = client->name; | |
232 | ||
233 | gpio->client = client; | |
234 | i2c_set_clientdata(client, gpio); | |
235 | ||
236 | /* NOTE: these chips have strange "quasi-bidirectional" I/O pins. | |
237 | * We can't actually know whether a pin is configured (a) as output | |
238 | * and driving the signal low, or (b) as input and reporting a low | |
239 | * value ... without knowing the last value written since the chip | |
240 | * came out of reset (if any). We can't read the latched output. | |
241 | * | |
242 | * In short, the only reliable solution for setting up pin direction | |
243 | * is to do it explicitly. The setup() method can do that, but it | |
244 | * may cause transient glitching since it can't know the last value | |
245 | * written (some pins may need to be driven low). | |
246 | * | |
247 | * Using pdata->n_latch avoids that trouble. When left initialized | |
248 | * to zero, our software copy of the "latch" then matches the chip's | |
249 | * all-ones reset state. Otherwise it flags pins to be driven low. | |
250 | */ | |
251 | gpio->out = ~pdata->n_latch; | |
252 | ||
253 | status = gpiochip_add(&gpio->chip); | |
254 | if (status < 0) | |
255 | goto fail; | |
256 | ||
257 | /* NOTE: these chips can issue "some pin-changed" IRQs, which we | |
258 | * don't yet even try to use. Among other issues, the relevant | |
259 | * genirq state isn't available to modular drivers; and most irq | |
260 | * methods can't be called from sleeping contexts. | |
261 | */ | |
262 | ||
263 | dev_info(&client->dev, "gpios %d..%d on a %s%s\n", | |
264 | gpio->chip.base, | |
265 | gpio->chip.base + gpio->chip.ngpio - 1, | |
266 | client->name, | |
267 | client->irq ? " (irq ignored)" : ""); | |
268 | ||
269 | /* Let platform code set up the GPIOs and their users. | |
270 | * Now is the first time anyone could use them. | |
271 | */ | |
272 | if (pdata->setup) { | |
273 | status = pdata->setup(client, | |
274 | gpio->chip.base, gpio->chip.ngpio, | |
275 | pdata->context); | |
276 | if (status < 0) | |
277 | dev_warn(&client->dev, "setup --> %d\n", status); | |
278 | } | |
279 | ||
280 | return 0; | |
281 | ||
282 | fail: | |
283 | dev_dbg(&client->dev, "probe error %d for '%s'\n", | |
284 | status, client->name); | |
285 | kfree(gpio); | |
286 | return status; | |
287 | } | |
288 | ||
289 | static int pcf857x_remove(struct i2c_client *client) | |
290 | { | |
291 | struct pcf857x_platform_data *pdata = client->dev.platform_data; | |
292 | struct pcf857x *gpio = i2c_get_clientdata(client); | |
293 | int status = 0; | |
294 | ||
295 | if (pdata->teardown) { | |
296 | status = pdata->teardown(client, | |
297 | gpio->chip.base, gpio->chip.ngpio, | |
298 | pdata->context); | |
299 | if (status < 0) { | |
300 | dev_err(&client->dev, "%s --> %d\n", | |
301 | "teardown", status); | |
302 | return status; | |
303 | } | |
304 | } | |
305 | ||
306 | status = gpiochip_remove(&gpio->chip); | |
307 | if (status == 0) | |
308 | kfree(gpio); | |
309 | else | |
310 | dev_err(&client->dev, "%s --> %d\n", "remove", status); | |
311 | return status; | |
312 | } | |
313 | ||
314 | static struct i2c_driver pcf857x_driver = { | |
315 | .driver = { | |
316 | .name = "pcf857x", | |
317 | .owner = THIS_MODULE, | |
318 | }, | |
319 | .probe = pcf857x_probe, | |
320 | .remove = pcf857x_remove, | |
3760f736 | 321 | .id_table = pcf857x_id, |
15fae37d DB |
322 | }; |
323 | ||
324 | static int __init pcf857x_init(void) | |
325 | { | |
326 | return i2c_add_driver(&pcf857x_driver); | |
327 | } | |
328 | module_init(pcf857x_init); | |
329 | ||
330 | static void __exit pcf857x_exit(void) | |
331 | { | |
332 | i2c_del_driver(&pcf857x_driver); | |
333 | } | |
334 | module_exit(pcf857x_exit); | |
335 | ||
336 | MODULE_LICENSE("GPL"); | |
337 | MODULE_AUTHOR("David Brownell"); |