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8e711e1a DZ |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | ||
24 | #include <linux/firmware.h> | |
25 | #include "drmP.h" | |
26 | #include "amdgpu.h" | |
b57fd566 | 27 | #include "fiji_smum.h" |
8e711e1a DZ |
28 | |
29 | MODULE_FIRMWARE("amdgpu/fiji_smc.bin"); | |
30 | ||
31 | static void fiji_dpm_set_funcs(struct amdgpu_device *adev); | |
32 | ||
33 | static int fiji_dpm_early_init(void *handle) | |
34 | { | |
35 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
36 | ||
37 | fiji_dpm_set_funcs(adev); | |
38 | ||
39 | return 0; | |
40 | } | |
41 | ||
42 | static int fiji_dpm_init_microcode(struct amdgpu_device *adev) | |
43 | { | |
44 | char fw_name[30] = "amdgpu/fiji_smc.bin"; | |
45 | int err; | |
46 | ||
47 | err = request_firmware(&adev->pm.fw, fw_name, adev->dev); | |
48 | if (err) | |
49 | goto out; | |
50 | err = amdgpu_ucode_validate(adev->pm.fw); | |
51 | ||
52 | out: | |
53 | if (err) { | |
54 | DRM_ERROR("Failed to load firmware \"%s\"", fw_name); | |
55 | release_firmware(adev->pm.fw); | |
56 | adev->pm.fw = NULL; | |
57 | } | |
58 | return err; | |
59 | } | |
60 | ||
61 | static int fiji_dpm_sw_init(void *handle) | |
62 | { | |
63 | int ret; | |
64 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
65 | ||
66 | ret = fiji_dpm_init_microcode(adev); | |
67 | if (ret) | |
68 | return ret; | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
73 | static int fiji_dpm_sw_fini(void *handle) | |
74 | { | |
768c95e7 AD |
75 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
76 | ||
77 | release_firmware(adev->pm.fw); | |
78 | adev->pm.fw = NULL; | |
79 | ||
8e711e1a DZ |
80 | return 0; |
81 | } | |
82 | ||
83 | static int fiji_dpm_hw_init(void *handle) | |
84 | { | |
85 | int ret; | |
86 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
87 | ||
88 | mutex_lock(&adev->pm.mutex); | |
89 | ||
90 | ret = fiji_smu_init(adev); | |
91 | if (ret) { | |
92 | DRM_ERROR("SMU initialization failed\n"); | |
93 | goto fail; | |
94 | } | |
95 | ||
96 | ret = fiji_smu_start(adev); | |
97 | if (ret) { | |
98 | DRM_ERROR("SMU start failed\n"); | |
99 | goto fail; | |
100 | } | |
101 | ||
102 | mutex_unlock(&adev->pm.mutex); | |
103 | return 0; | |
104 | ||
105 | fail: | |
106 | adev->firmware.smu_load = false; | |
107 | mutex_unlock(&adev->pm.mutex); | |
108 | return -EINVAL; | |
109 | } | |
110 | ||
111 | static int fiji_dpm_hw_fini(void *handle) | |
112 | { | |
113 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
114 | mutex_lock(&adev->pm.mutex); | |
115 | fiji_smu_fini(adev); | |
116 | mutex_unlock(&adev->pm.mutex); | |
117 | return 0; | |
118 | } | |
119 | ||
120 | static int fiji_dpm_suspend(void *handle) | |
121 | { | |
122 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
123 | ||
124 | fiji_dpm_hw_fini(adev); | |
125 | ||
126 | return 0; | |
127 | } | |
128 | ||
129 | static int fiji_dpm_resume(void *handle) | |
130 | { | |
131 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | |
132 | ||
133 | fiji_dpm_hw_init(adev); | |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
138 | static int fiji_dpm_set_clockgating_state(void *handle, | |
139 | enum amd_clockgating_state state) | |
140 | { | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static int fiji_dpm_set_powergating_state(void *handle, | |
145 | enum amd_powergating_state state) | |
146 | { | |
147 | return 0; | |
148 | } | |
149 | ||
150 | const struct amd_ip_funcs fiji_dpm_ip_funcs = { | |
88a907d6 | 151 | .name = "fiji_dpm", |
8e711e1a DZ |
152 | .early_init = fiji_dpm_early_init, |
153 | .late_init = NULL, | |
154 | .sw_init = fiji_dpm_sw_init, | |
155 | .sw_fini = fiji_dpm_sw_fini, | |
156 | .hw_init = fiji_dpm_hw_init, | |
157 | .hw_fini = fiji_dpm_hw_fini, | |
158 | .suspend = fiji_dpm_suspend, | |
159 | .resume = fiji_dpm_resume, | |
160 | .is_idle = NULL, | |
161 | .wait_for_idle = NULL, | |
162 | .soft_reset = NULL, | |
8e711e1a DZ |
163 | .set_clockgating_state = fiji_dpm_set_clockgating_state, |
164 | .set_powergating_state = fiji_dpm_set_powergating_state, | |
165 | }; | |
166 | ||
167 | static const struct amdgpu_dpm_funcs fiji_dpm_funcs = { | |
168 | .get_temperature = NULL, | |
169 | .pre_set_power_state = NULL, | |
170 | .set_power_state = NULL, | |
171 | .post_set_power_state = NULL, | |
172 | .display_configuration_changed = NULL, | |
173 | .get_sclk = NULL, | |
174 | .get_mclk = NULL, | |
175 | .print_power_state = NULL, | |
176 | .debugfs_print_current_performance_level = NULL, | |
177 | .force_performance_level = NULL, | |
178 | .vblank_too_short = NULL, | |
179 | .powergate_uvd = NULL, | |
180 | }; | |
181 | ||
182 | static void fiji_dpm_set_funcs(struct amdgpu_device *adev) | |
183 | { | |
184 | if (NULL == adev->pm.funcs) | |
185 | adev->pm.funcs = &fiji_dpm_funcs; | |
186 | } |