[deliverable/linux.git] / drivers / gpu / drm / amd / amdgpu / smu8_fusion.h

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef SMU8_FUSION_H
#define SMU8_FUSION_H

#include "smu8.h"

#pragma pack(push, 1)

#define SMU8_MAX_CUS 2
#define SMU8_PSMS_PER_CU 4
#define SMU8_CACS_PER_CU 4

struct SMU8_GfxCuPgScoreboard {
    uint8_t Enabled;
    uint8_t spare[3];
};

struct SMU8_Port80MonitorTable {
	uint32_t MmioAddress;
	uint32_t MemoryBaseHi;
	uint32_t MemoryBaseLo;
	uint16_t MemoryBufferSize;
	uint16_t MemoryPosition;
	uint16_t PollingInterval;
	uint8_t  EnableCsrShadow;
	uint8_t  EnableDramShadow;
};

/* Clock Table Definitions */
#define NUM_SCLK_LEVELS     8
#define NUM_LCLK_LEVELS     8
#define NUM_UVD_LEVELS      8
#define NUM_ECLK_LEVELS     8
#define NUM_ACLK_LEVELS     8

struct SMU8_Fusion_ClkLevel {
	uint8_t		GnbVid;
	uint8_t		GfxVid;
	uint8_t		DfsDid;
	uint8_t		DeepSleepDid;
	uint32_t	DfsBypass;
	uint32_t	Frequency;
};

struct SMU8_Fusion_SclkBreakdownTable {
	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_SCLK_LEVELS];
	struct SMU8_Fusion_ClkLevel DpmOffLevel;
	/* SMU8_Fusion_ClkLevel PwrOffLevel; */
	uint32_t    SclkValidMask;
	uint32_t    MaxSclkIndex;
};

struct SMU8_Fusion_LclkBreakdownTable {
	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_LCLK_LEVELS];
	struct SMU8_Fusion_ClkLevel DpmOffLevel;
    /* SMU8_Fusion_ClkLevel PwrOffLevel; */
	uint32_t    LclkValidMask;
	uint32_t    MaxLclkIndex;
};

struct SMU8_Fusion_EclkBreakdownTable {
	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ECLK_LEVELS];
	struct SMU8_Fusion_ClkLevel DpmOffLevel;
	struct SMU8_Fusion_ClkLevel PwrOffLevel;
	uint32_t    EclkValidMask;
	uint32_t    MaxEclkIndex;
};

struct SMU8_Fusion_VclkBreakdownTable {
	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
	struct SMU8_Fusion_ClkLevel DpmOffLevel;
	struct SMU8_Fusion_ClkLevel PwrOffLevel;
	uint32_t    VclkValidMask;
	uint32_t    MaxVclkIndex;
};

struct SMU8_Fusion_DclkBreakdownTable {
	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
	struct SMU8_Fusion_ClkLevel DpmOffLevel;
	struct SMU8_Fusion_ClkLevel PwrOffLevel;
	uint32_t    DclkValidMask;
	uint32_t    MaxDclkIndex;
};

struct SMU8_Fusion_AclkBreakdownTable {
	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ACLK_LEVELS];
	struct SMU8_Fusion_ClkLevel DpmOffLevel;
	struct SMU8_Fusion_ClkLevel PwrOffLevel;
	uint32_t    AclkValidMask;
	uint32_t    MaxAclkIndex;
};


struct SMU8_Fusion_ClkTable {
	struct SMU8_Fusion_SclkBreakdownTable SclkBreakdownTable;
	struct SMU8_Fusion_LclkBreakdownTable LclkBreakdownTable;
	struct SMU8_Fusion_EclkBreakdownTable EclkBreakdownTable;
	struct SMU8_Fusion_VclkBreakdownTable VclkBreakdownTable;
	struct SMU8_Fusion_DclkBreakdownTable DclkBreakdownTable;
	struct SMU8_Fusion_AclkBreakdownTable AclkBreakdownTable;
};

#pragma pack(pop)

#endif
Commit	Line	Data
aaa36a97 AD	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	*/
	23
	24	#ifndef SMU8_FUSION_H
	25	#define SMU8_FUSION_H
	26
	27	#include "smu8.h"
	28
	29	#pragma pack(push, 1)
	30
	31	#define SMU8_MAX_CUS 2
	32	#define SMU8_PSMS_PER_CU 4
	33	#define SMU8_CACS_PER_CU 4
	34
	35	struct SMU8_GfxCuPgScoreboard {
	36	uint8_t Enabled;
	37	uint8_t spare[3];
	38	};
	39
	40	struct SMU8_Port80MonitorTable {
	41	uint32_t MmioAddress;
	42	uint32_t MemoryBaseHi;
	43	uint32_t MemoryBaseLo;
	44	uint16_t MemoryBufferSize;
	45	uint16_t MemoryPosition;
	46	uint16_t PollingInterval;
	47	uint8_t EnableCsrShadow;
	48	uint8_t EnableDramShadow;
	49	};
	50
	51	/* Clock Table Definitions */
	52	#define NUM_SCLK_LEVELS 8
	53	#define NUM_LCLK_LEVELS 8
	54	#define NUM_UVD_LEVELS 8
	55	#define NUM_ECLK_LEVELS 8
	56	#define NUM_ACLK_LEVELS 8
	57
	58	struct SMU8_Fusion_ClkLevel {
	59	uint8_t GnbVid;
	60	uint8_t GfxVid;
	61	uint8_t DfsDid;
	62	uint8_t DeepSleepDid;
	63	uint32_t DfsBypass;
	64	uint32_t Frequency;
65	};
66
67	struct SMU8_Fusion_SclkBreakdownTable {
68	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_SCLK_LEVELS];
69	struct SMU8_Fusion_ClkLevel DpmOffLevel;
70	/* SMU8_Fusion_ClkLevel PwrOffLevel; */
71	uint32_t SclkValidMask;
72	uint32_t MaxSclkIndex;
73	};
74
75	struct SMU8_Fusion_LclkBreakdownTable {
76	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_LCLK_LEVELS];
77	struct SMU8_Fusion_ClkLevel DpmOffLevel;
78	/* SMU8_Fusion_ClkLevel PwrOffLevel; */
79	uint32_t LclkValidMask;
80	uint32_t MaxLclkIndex;
81	};
82
83	struct SMU8_Fusion_EclkBreakdownTable {
84	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ECLK_LEVELS];
85	struct SMU8_Fusion_ClkLevel DpmOffLevel;
86	struct SMU8_Fusion_ClkLevel PwrOffLevel;
87	uint32_t EclkValidMask;
88	uint32_t MaxEclkIndex;
89	};
90
91	struct SMU8_Fusion_VclkBreakdownTable {
92	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
93	struct SMU8_Fusion_ClkLevel DpmOffLevel;
94	struct SMU8_Fusion_ClkLevel PwrOffLevel;
95	uint32_t VclkValidMask;
96	uint32_t MaxVclkIndex;
97	};
98
99	struct SMU8_Fusion_DclkBreakdownTable {
100	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_UVD_LEVELS];
101	struct SMU8_Fusion_ClkLevel DpmOffLevel;
102	struct SMU8_Fusion_ClkLevel PwrOffLevel;
103	uint32_t DclkValidMask;
104	uint32_t MaxDclkIndex;
105	};
106
107	struct SMU8_Fusion_AclkBreakdownTable {
108	struct SMU8_Fusion_ClkLevel ClkLevel[NUM_ACLK_LEVELS];
109	struct SMU8_Fusion_ClkLevel DpmOffLevel;
110	struct SMU8_Fusion_ClkLevel PwrOffLevel;
111	uint32_t AclkValidMask;
112	uint32_t MaxAclkIndex;
113	};
114
115
116	struct SMU8_Fusion_ClkTable {
117	struct SMU8_Fusion_SclkBreakdownTable SclkBreakdownTable;
118	struct SMU8_Fusion_LclkBreakdownTable LclkBreakdownTable;
119	struct SMU8_Fusion_EclkBreakdownTable EclkBreakdownTable;
120	struct SMU8_Fusion_VclkBreakdownTable VclkBreakdownTable;
121	struct SMU8_Fusion_DclkBreakdownTable DclkBreakdownTable;
122	struct SMU8_Fusion_AclkBreakdownTable AclkBreakdownTable;
123	};
124
125	#pragma pack(pop)
126
127	#endif