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aaa36a97 AD |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | */ | |
23 | ||
24 | #include <linux/firmware.h> | |
25 | #include "drmP.h" | |
26 | #include "amdgpu.h" | |
dbd29f0d | 27 | #include "tonga_smum.h" |
aaa36a97 | 28 | |
c65444fe | 29 | MODULE_FIRMWARE("amdgpu/tonga_smc.bin"); |
aaa36a97 AD |
30 | |
31 | static void tonga_dpm_set_funcs(struct amdgpu_device *adev); | |
32 | ||
5fc3aeeb | 33 | static int tonga_dpm_early_init(void *handle) |
aaa36a97 | 34 | { |
5fc3aeeb | 35 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
36 | ||
aaa36a97 AD |
37 | tonga_dpm_set_funcs(adev); |
38 | ||
39 | return 0; | |
40 | } | |
41 | ||
42 | static int tonga_dpm_init_microcode(struct amdgpu_device *adev) | |
43 | { | |
c65444fe | 44 | char fw_name[30] = "amdgpu/tonga_smc.bin"; |
aaa36a97 | 45 | int err; |
aaa36a97 AD |
46 | err = request_firmware(&adev->pm.fw, fw_name, adev->dev); |
47 | if (err) | |
48 | goto out; | |
49 | err = amdgpu_ucode_validate(adev->pm.fw); | |
50 | ||
51 | out: | |
52 | if (err) { | |
53 | DRM_ERROR("Failed to load firmware \"%s\"", fw_name); | |
54 | release_firmware(adev->pm.fw); | |
55 | adev->pm.fw = NULL; | |
56 | } | |
57 | return err; | |
58 | } | |
59 | ||
5fc3aeeb | 60 | static int tonga_dpm_sw_init(void *handle) |
aaa36a97 AD |
61 | { |
62 | int ret; | |
5fc3aeeb | 63 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
aaa36a97 AD |
64 | |
65 | ret = tonga_dpm_init_microcode(adev); | |
66 | if (ret) | |
67 | return ret; | |
68 | ||
69 | return 0; | |
70 | } | |
71 | ||
5fc3aeeb | 72 | static int tonga_dpm_sw_fini(void *handle) |
aaa36a97 | 73 | { |
768c95e7 AD |
74 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
75 | ||
76 | release_firmware(adev->pm.fw); | |
77 | adev->pm.fw = NULL; | |
78 | ||
aaa36a97 AD |
79 | return 0; |
80 | } | |
81 | ||
5fc3aeeb | 82 | static int tonga_dpm_hw_init(void *handle) |
aaa36a97 AD |
83 | { |
84 | int ret; | |
5fc3aeeb | 85 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
aaa36a97 AD |
86 | |
87 | mutex_lock(&adev->pm.mutex); | |
88 | ||
aaf4ee3c AD |
89 | /* smu init only needs to be called at startup, not resume. |
90 | * It should be in sw_init, but requires the fw info gathered | |
91 | * in sw_init from other IP modules. | |
92 | */ | |
aaa36a97 AD |
93 | ret = tonga_smu_init(adev); |
94 | if (ret) { | |
95 | DRM_ERROR("SMU initialization failed\n"); | |
96 | goto fail; | |
97 | } | |
98 | ||
99 | ret = tonga_smu_start(adev); | |
100 | if (ret) { | |
101 | DRM_ERROR("SMU start failed\n"); | |
102 | goto fail; | |
103 | } | |
104 | ||
105 | mutex_unlock(&adev->pm.mutex); | |
106 | return 0; | |
107 | ||
108 | fail: | |
109 | adev->firmware.smu_load = false; | |
110 | mutex_unlock(&adev->pm.mutex); | |
111 | return -EINVAL; | |
112 | } | |
113 | ||
5fc3aeeb | 114 | static int tonga_dpm_hw_fini(void *handle) |
aaa36a97 | 115 | { |
5fc3aeeb | 116 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
117 | ||
aaa36a97 | 118 | mutex_lock(&adev->pm.mutex); |
aaf4ee3c AD |
119 | /* smu fini only needs to be called at teardown, not suspend. |
120 | * It should be in sw_fini, but we put it here for symmetry | |
121 | * with smu init. | |
122 | */ | |
aaa36a97 AD |
123 | tonga_smu_fini(adev); |
124 | mutex_unlock(&adev->pm.mutex); | |
125 | return 0; | |
126 | } | |
127 | ||
5fc3aeeb | 128 | static int tonga_dpm_suspend(void *handle) |
aaa36a97 | 129 | { |
e160e4db | 130 | return tonga_dpm_hw_fini(handle); |
aaa36a97 AD |
131 | } |
132 | ||
5fc3aeeb | 133 | static int tonga_dpm_resume(void *handle) |
aaa36a97 | 134 | { |
e160e4db | 135 | return tonga_dpm_hw_init(handle); |
aaa36a97 AD |
136 | } |
137 | ||
5fc3aeeb | 138 | static int tonga_dpm_set_clockgating_state(void *handle, |
139 | enum amd_clockgating_state state) | |
aaa36a97 AD |
140 | { |
141 | return 0; | |
142 | } | |
143 | ||
5fc3aeeb | 144 | static int tonga_dpm_set_powergating_state(void *handle, |
145 | enum amd_powergating_state state) | |
aaa36a97 AD |
146 | { |
147 | return 0; | |
148 | } | |
149 | ||
5fc3aeeb | 150 | const struct amd_ip_funcs tonga_dpm_ip_funcs = { |
88a907d6 | 151 | .name = "tonga_dpm", |
aaa36a97 AD |
152 | .early_init = tonga_dpm_early_init, |
153 | .late_init = NULL, | |
154 | .sw_init = tonga_dpm_sw_init, | |
155 | .sw_fini = tonga_dpm_sw_fini, | |
156 | .hw_init = tonga_dpm_hw_init, | |
157 | .hw_fini = tonga_dpm_hw_fini, | |
158 | .suspend = tonga_dpm_suspend, | |
159 | .resume = tonga_dpm_resume, | |
160 | .is_idle = NULL, | |
161 | .wait_for_idle = NULL, | |
162 | .soft_reset = NULL, | |
aaa36a97 AD |
163 | .set_clockgating_state = tonga_dpm_set_clockgating_state, |
164 | .set_powergating_state = tonga_dpm_set_powergating_state, | |
165 | }; | |
166 | ||
167 | static const struct amdgpu_dpm_funcs tonga_dpm_funcs = { | |
168 | .get_temperature = NULL, | |
169 | .pre_set_power_state = NULL, | |
170 | .set_power_state = NULL, | |
171 | .post_set_power_state = NULL, | |
172 | .display_configuration_changed = NULL, | |
173 | .get_sclk = NULL, | |
174 | .get_mclk = NULL, | |
175 | .print_power_state = NULL, | |
176 | .debugfs_print_current_performance_level = NULL, | |
177 | .force_performance_level = NULL, | |
178 | .vblank_too_short = NULL, | |
179 | .powergate_uvd = NULL, | |
180 | }; | |
181 | ||
182 | static void tonga_dpm_set_funcs(struct amdgpu_device *adev) | |
183 | { | |
184 | if (NULL == adev->pm.funcs) | |
185 | adev->pm.funcs = &tonga_dpm_funcs; | |
186 | } |