[deliverable/linux.git] / drivers / gpu / drm / amd / amdkfd / kfd_device.c

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/amd-iommu.h>
#include <linux/bsearch.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "kfd_priv.h"
#include "kfd_device_queue_manager.h"
#include "kfd_pm4_headers.h"

#define MQD_SIZE_ALIGNED 768

static const struct kfd_device_info kaveri_device_info = {
	.asic_family = CHIP_KAVERI,
	.max_pasid_bits = 16,
	/* max num of queues for KV.TODO should be a dynamic value */
	.max_no_of_hqd	= 24,
	.ih_ring_entry_size = 4 * sizeof(uint32_t),
	.event_interrupt_class = &event_interrupt_class_cik,
	.mqd_size_aligned = MQD_SIZE_ALIGNED
};

static const struct kfd_device_info carrizo_device_info = {
	.asic_family = CHIP_CARRIZO,
	.max_pasid_bits = 16,
	.ih_ring_entry_size = 4 * sizeof(uint32_t),
	.num_of_watch_points = 4,
	.mqd_size_aligned = MQD_SIZE_ALIGNED
};

struct kfd_deviceid {
	unsigned short did;
	const struct kfd_device_info *device_info;
};

/* Please keep this sorted by increasing device id. */
static const struct kfd_deviceid supported_devices[] = {
	{ 0x1304, &kaveri_device_info },	/* Kaveri */
	{ 0x1305, &kaveri_device_info },	/* Kaveri */
	{ 0x1306, &kaveri_device_info },	/* Kaveri */
	{ 0x1307, &kaveri_device_info },	/* Kaveri */
	{ 0x1309, &kaveri_device_info },	/* Kaveri */
	{ 0x130A, &kaveri_device_info },	/* Kaveri */
	{ 0x130B, &kaveri_device_info },	/* Kaveri */
	{ 0x130C, &kaveri_device_info },	/* Kaveri */
	{ 0x130D, &kaveri_device_info },	/* Kaveri */
	{ 0x130E, &kaveri_device_info },	/* Kaveri */
	{ 0x130F, &kaveri_device_info },	/* Kaveri */
	{ 0x1310, &kaveri_device_info },	/* Kaveri */
	{ 0x1311, &kaveri_device_info },	/* Kaveri */
	{ 0x1312, &kaveri_device_info },	/* Kaveri */
	{ 0x1313, &kaveri_device_info },	/* Kaveri */
	{ 0x1315, &kaveri_device_info },	/* Kaveri */
	{ 0x1316, &kaveri_device_info },	/* Kaveri */
	{ 0x1317, &kaveri_device_info },	/* Kaveri */
	{ 0x1318, &kaveri_device_info },	/* Kaveri */
	{ 0x131B, &kaveri_device_info },	/* Kaveri */
	{ 0x131C, &kaveri_device_info },	/* Kaveri */
	{ 0x131D, &kaveri_device_info }		/* Kaveri */
};

static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
				unsigned int chunk_size);
static void kfd_gtt_sa_fini(struct kfd_dev *kfd);

static const struct kfd_device_info *lookup_device_info(unsigned short did)
{
	size_t i;

	for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
		if (supported_devices[i].did == did) {
			BUG_ON(supported_devices[i].device_info == NULL);
			return supported_devices[i].device_info;
		}
	}

	return NULL;
}

struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
	struct pci_dev *pdev, const struct kfd2kgd_calls *f2g)
{
	struct kfd_dev *kfd;

	const struct kfd_device_info *device_info =
					lookup_device_info(pdev->device);

	if (!device_info)
		return NULL;

	kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
	if (!kfd)
		return NULL;

	kfd->kgd = kgd;
	kfd->device_info = device_info;
	kfd->pdev = pdev;
	kfd->init_complete = false;
	kfd->kfd2kgd = f2g;

	mutex_init(&kfd->doorbell_mutex);
	memset(&kfd->doorbell_available_index, 0,
		sizeof(kfd->doorbell_available_index));

	return kfd;
}

static bool device_iommu_pasid_init(struct kfd_dev *kfd)
{
	const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP |
					AMD_IOMMU_DEVICE_FLAG_PRI_SUP |
					AMD_IOMMU_DEVICE_FLAG_PASID_SUP;

	struct amd_iommu_device_info iommu_info;
	unsigned int pasid_limit;
	int err;

	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
	if (err < 0) {
		dev_err(kfd_device,
			"error getting iommu info. is the iommu enabled?\n");
		return false;
	}

	if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
		dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
		return false;
	}

	pasid_limit = min_t(unsigned int,
			(unsigned int)1 << kfd->device_info->max_pasid_bits,
			iommu_info.max_pasids);
	/*
	 * last pasid is used for kernel queues doorbells
	 * in the future the last pasid might be used for a kernel thread.
	 */
	pasid_limit = min_t(unsigned int,
				pasid_limit,
				kfd->doorbell_process_limit - 1);

	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	if (err < 0) {
		dev_err(kfd_device, "error initializing iommu device\n");
		return false;
	}

	if (!kfd_set_pasid_limit(pasid_limit)) {
		dev_err(kfd_device, "error setting pasid limit\n");
		amd_iommu_free_device(kfd->pdev);
		return false;
	}

	return true;
}

static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
{
	struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);

	if (dev)
		kfd_unbind_process_from_device(dev, pasid);
}

/*
 * This function called by IOMMU driver on PPR failure
 */
static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
		unsigned long address, u16 flags)
{
	struct kfd_dev *dev;

	dev_warn(kfd_device,
			"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
			PCI_BUS_NUM(pdev->devfn),
			PCI_SLOT(pdev->devfn),
			PCI_FUNC(pdev->devfn),
			pasid,
			address,
			flags);

	dev = kfd_device_by_pci_dev(pdev);
	BUG_ON(dev == NULL);

	kfd_signal_iommu_event(dev, pasid, address,
			flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);

	return AMD_IOMMU_INV_PRI_RSP_INVALID;
}

bool kgd2kfd_device_init(struct kfd_dev *kfd,
			 const struct kgd2kfd_shared_resources *gpu_resources)
{
	unsigned int size;

	kfd->shared_resources = *gpu_resources;

	/* calculate max size of mqds needed for queues */
	size = max_num_of_queues_per_device *
			kfd->device_info->mqd_size_aligned;

	/*
	 * calculate max size of runlist packet.
	 * There can be only 2 packets at once
	 */
	size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
		max_num_of_queues_per_device *
		sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;

	/* Add size of HIQ & DIQ */
	size += KFD_KERNEL_QUEUE_SIZE * 2;

	/* add another 512KB for all other allocations on gart (HPD, fences) */
	size += 512 * 1024;

	if (kfd->kfd2kgd->init_gtt_mem_allocation(
			kfd->kgd, size, &kfd->gtt_mem,
			&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
		dev_err(kfd_device,
			"Could not allocate %d bytes for device (%x:%x)\n",
			size, kfd->pdev->vendor, kfd->pdev->device);
		goto out;
	}

	dev_info(kfd_device,
		"Allocated %d bytes on gart for device(%x:%x)\n",
		size, kfd->pdev->vendor, kfd->pdev->device);

	/* Initialize GTT sa with 512 byte chunk size */
	if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
		dev_err(kfd_device,
			"Error initializing gtt sub-allocator\n");
		goto kfd_gtt_sa_init_error;
	}

	kfd_doorbell_init(kfd);

	if (kfd_topology_add_device(kfd) != 0) {
		dev_err(kfd_device,
			"Error adding device (%x:%x) to topology\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto kfd_topology_add_device_error;
	}

	if (kfd_interrupt_init(kfd)) {
		dev_err(kfd_device,
			"Error initializing interrupts for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto kfd_interrupt_error;
	}

	if (!device_iommu_pasid_init(kfd)) {
		dev_err(kfd_device,
			"Error initializing iommuv2 for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto device_iommu_pasid_error;
	}
	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
						iommu_pasid_shutdown_callback);
	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);

	kfd->dqm = device_queue_manager_init(kfd);
	if (!kfd->dqm) {
		dev_err(kfd_device,
			"Error initializing queue manager for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto device_queue_manager_error;
	}

	if (kfd->dqm->ops.start(kfd->dqm) != 0) {
		dev_err(kfd_device,
			"Error starting queuen manager for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto dqm_start_error;
	}

	kfd->init_complete = true;
	dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
		 kfd->pdev->device);

	pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
		sched_policy);

	goto out;

dqm_start_error:
	device_queue_manager_uninit(kfd->dqm);
device_queue_manager_error:
	amd_iommu_free_device(kfd->pdev);
device_iommu_pasid_error:
	kfd_interrupt_exit(kfd);
kfd_interrupt_error:
	kfd_topology_remove_device(kfd);
kfd_topology_add_device_error:
	kfd_gtt_sa_fini(kfd);
kfd_gtt_sa_init_error:
	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
	dev_err(kfd_device,
		"device (%x:%x) NOT added due to errors\n",
		kfd->pdev->vendor, kfd->pdev->device);
out:
	return kfd->init_complete;
}

void kgd2kfd_device_exit(struct kfd_dev *kfd)
{
	if (kfd->init_complete) {
		device_queue_manager_uninit(kfd->dqm);
		amd_iommu_free_device(kfd->pdev);
		kfd_interrupt_exit(kfd);
		kfd_topology_remove_device(kfd);
		kfd_gtt_sa_fini(kfd);
		kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
	}

	kfree(kfd);
}

void kgd2kfd_suspend(struct kfd_dev *kfd)
{
	BUG_ON(kfd == NULL);

	if (kfd->init_complete) {
		kfd->dqm->ops.stop(kfd->dqm);
		amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
		amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
		amd_iommu_free_device(kfd->pdev);
	}
}

int kgd2kfd_resume(struct kfd_dev *kfd)
{
	unsigned int pasid_limit;
	int err;

	BUG_ON(kfd == NULL);

	pasid_limit = kfd_get_pasid_limit();

	if (kfd->init_complete) {
		err = amd_iommu_init_device(kfd->pdev, pasid_limit);
		if (err < 0)
			return -ENXIO;
		amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
						iommu_pasid_shutdown_callback);
		amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
		kfd->dqm->ops.start(kfd->dqm);
	}

	return 0;
}

/* This is called directly from KGD at ISR. */
void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
{
	if (!kfd->init_complete)
		return;

	spin_lock(&kfd->interrupt_lock);

	if (kfd->interrupts_active
	    && interrupt_is_wanted(kfd, ih_ring_entry)
	    && enqueue_ih_ring_entry(kfd, ih_ring_entry))
		schedule_work(&kfd->interrupt_work);

	spin_unlock(&kfd->interrupt_lock);
}

static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
				unsigned int chunk_size)
{
	unsigned int num_of_bits;

	BUG_ON(!kfd);
	BUG_ON(!kfd->gtt_mem);
	BUG_ON(buf_size < chunk_size);
	BUG_ON(buf_size == 0);
	BUG_ON(chunk_size == 0);

	kfd->gtt_sa_chunk_size = chunk_size;
	kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;

	num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
	BUG_ON(num_of_bits == 0);

	kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);

	if (!kfd->gtt_sa_bitmap)
		return -ENOMEM;

	pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
			kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);

	mutex_init(&kfd->gtt_sa_lock);

	return 0;

}

static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
{
	mutex_destroy(&kfd->gtt_sa_lock);
	kfree(kfd->gtt_sa_bitmap);
}

static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
						unsigned int bit_num,
						unsigned int chunk_size)
{
	return start_addr + bit_num * chunk_size;
}

static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr,
						unsigned int bit_num,
						unsigned int chunk_size)
{
	return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size);
}

int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
			struct kfd_mem_obj **mem_obj)
{
	unsigned int found, start_search, cur_size;

	BUG_ON(!kfd);

	if (size == 0)
		return -EINVAL;

	if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
		return -ENOMEM;

	*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
	if ((*mem_obj) == NULL)
		return -ENOMEM;

	pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);

	start_search = 0;

	mutex_lock(&kfd->gtt_sa_lock);

kfd_gtt_restart_search:
	/* Find the first chunk that is free */
	found = find_next_zero_bit(kfd->gtt_sa_bitmap,
					kfd->gtt_sa_num_of_chunks,
					start_search);

	pr_debug("kfd: found = %d\n", found);

	/* If there wasn't any free chunk, bail out */
	if (found == kfd->gtt_sa_num_of_chunks)
		goto kfd_gtt_no_free_chunk;

	/* Update fields of mem_obj */
	(*mem_obj)->range_start = found;
	(*mem_obj)->range_end = found;
	(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
					kfd->gtt_start_gpu_addr,
					found,
					kfd->gtt_sa_chunk_size);
	(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
					kfd->gtt_start_cpu_ptr,
					found,
					kfd->gtt_sa_chunk_size);

	pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
			(uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);

	/* If we need only one chunk, mark it as allocated and get out */
	if (size <= kfd->gtt_sa_chunk_size) {
		pr_debug("kfd: single bit\n");
		set_bit(found, kfd->gtt_sa_bitmap);
		goto kfd_gtt_out;
	}

	/* Otherwise, try to see if we have enough contiguous chunks */
	cur_size = size - kfd->gtt_sa_chunk_size;
	do {
		(*mem_obj)->range_end =
			find_next_zero_bit(kfd->gtt_sa_bitmap,
					kfd->gtt_sa_num_of_chunks, ++found);
		/*
		 * If next free chunk is not contiguous than we need to
		 * restart our search from the last free chunk we found (which
		 * wasn't contiguous to the previous ones
		 */
		if ((*mem_obj)->range_end != found) {
			start_search = found;
			goto kfd_gtt_restart_search;
		}

		/*
		 * If we reached end of buffer, bail out with error
		 */
		if (found == kfd->gtt_sa_num_of_chunks)
			goto kfd_gtt_no_free_chunk;

		/* Check if we don't need another chunk */
		if (cur_size <= kfd->gtt_sa_chunk_size)
			cur_size = 0;
		else
			cur_size -= kfd->gtt_sa_chunk_size;

	} while (cur_size > 0);

	pr_debug("kfd: range_start = %d, range_end = %d\n",
		(*mem_obj)->range_start, (*mem_obj)->range_end);

	/* Mark the chunks as allocated */
	for (found = (*mem_obj)->range_start;
		found <= (*mem_obj)->range_end;
		found++)
		set_bit(found, kfd->gtt_sa_bitmap);

kfd_gtt_out:
	mutex_unlock(&kfd->gtt_sa_lock);
	return 0;

kfd_gtt_no_free_chunk:
	pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
	mutex_unlock(&kfd->gtt_sa_lock);
	kfree(mem_obj);
	return -ENOMEM;
}

int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj)
{
	unsigned int bit;

	BUG_ON(!kfd);

	/* Act like kfree when trying to free a NULL object */
	if (!mem_obj)
		return 0;

	pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
			mem_obj, mem_obj->range_start, mem_obj->range_end);

	mutex_lock(&kfd->gtt_sa_lock);

	/* Mark the chunks as free */
	for (bit = mem_obj->range_start;
		bit <= mem_obj->range_end;
		bit++)
		clear_bit(bit, kfd->gtt_sa_bitmap);

	mutex_unlock(&kfd->gtt_sa_lock);

	kfree(mem_obj);
	return 0;
}
Commit	Line	Data
4a488a7a OG	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*/
	22
	23	#include <linux/amd-iommu.h>
	24	#include <linux/bsearch.h>
	25	#include <linux/pci.h>
	26	#include <linux/slab.h>
	27	#include "kfd_priv.h"
64c7f8cf	28	#include "kfd_device_queue_manager.h"
e18e794e	29	#include "kfd_pm4_headers.h"
4a488a7a	30
19f6d2a6 OG	31	#define MQD_SIZE_ALIGNED 768
19f6d2a6 OG	32
4a488a7a	33	static const struct kfd_device_info kaveri_device_info = {
0da7558c BG	34	.asic_family = CHIP_KAVERI,
0da7558c BG	35	.max_pasid_bits = 16,
992839ad YS	36	/* max num of queues for KV.TODO should be a dynamic value */
992839ad YS	37	.max_no_of_hqd = 24,
0da7558c	38	.ih_ring_entry_size = 4 * sizeof(uint32_t),
f3a39818	39	.event_interrupt_class = &event_interrupt_class_cik,
0da7558c BG	40	.mqd_size_aligned = MQD_SIZE_ALIGNED
	41	};
	42
	43	static const struct kfd_device_info carrizo_device_info = {
	44	.asic_family = CHIP_CARRIZO,
4a488a7a	45	.max_pasid_bits = 16,
b3f5e6b4	46	.ih_ring_entry_size = 4 * sizeof(uint32_t),
f7c826ad	47	.num_of_watch_points = 4,
19f6d2a6	48	.mqd_size_aligned = MQD_SIZE_ALIGNED
4a488a7a OG	49	};
	50
	51	struct kfd_deviceid {
	52	unsigned short did;
	53	const struct kfd_device_info *device_info;
	54	};
	55
	56	/* Please keep this sorted by increasing device id. */
	57	static const struct kfd_deviceid supported_devices[] = {
	58	{ 0x1304, &kaveri_device_info }, /* Kaveri */
	59	{ 0x1305, &kaveri_device_info }, /* Kaveri */
	60	{ 0x1306, &kaveri_device_info }, /* Kaveri */
	61	{ 0x1307, &kaveri_device_info }, /* Kaveri */
	62	{ 0x1309, &kaveri_device_info }, /* Kaveri */
	63	{ 0x130A, &kaveri_device_info }, /* Kaveri */
	64	{ 0x130B, &kaveri_device_info }, /* Kaveri */
	65	{ 0x130C, &kaveri_device_info }, /* Kaveri */
	66	{ 0x130D, &kaveri_device_info }, /* Kaveri */
	67	{ 0x130E, &kaveri_device_info }, /* Kaveri */
	68	{ 0x130F, &kaveri_device_info }, /* Kaveri */
	69	{ 0x1310, &kaveri_device_info }, /* Kaveri */
	70	{ 0x1311, &kaveri_device_info }, /* Kaveri */
	71	{ 0x1312, &kaveri_device_info }, /* Kaveri */
	72	{ 0x1313, &kaveri_device_info }, /* Kaveri */
	73	{ 0x1315, &kaveri_device_info }, /* Kaveri */
	74	{ 0x1316, &kaveri_device_info }, /* Kaveri */
	75	{ 0x1317, &kaveri_device_info }, /* Kaveri */
	76	{ 0x1318, &kaveri_device_info }, /* Kaveri */
	77	{ 0x131B, &kaveri_device_info }, /* Kaveri */
	78	{ 0x131C, &kaveri_device_info }, /* Kaveri */
0da7558c	79	{ 0x131D, &kaveri_device_info } /* Kaveri */
4a488a7a OG	80	};
4a488a7a OG	81
6e81090b OG	82	static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
	83	unsigned int chunk_size);
	84	static void kfd_gtt_sa_fini(struct kfd_dev *kfd);
	85
4a488a7a OG	86	static const struct kfd_device_info *lookup_device_info(unsigned short did)
	87	{
	88	size_t i;
	89
	90	for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
	91	if (supported_devices[i].did == did) {
	92	BUG_ON(supported_devices[i].device_info == NULL);
	93	return supported_devices[i].device_info;
	94	}
	95	}
	96
	97	return NULL;
	98	}
	99
cea405b1 XZ	100	struct kfd_dev kgd2kfd_probe(struct kgd_dev kgd,
cea405b1 XZ	101	struct pci_dev pdev, const struct kfd2kgd_calls f2g)
4a488a7a OG	102	{
	103	struct kfd_dev *kfd;
	104
	105	const struct kfd_device_info *device_info =
	106	lookup_device_info(pdev->device);
	107
	108	if (!device_info)
	109	return NULL;
	110
	111	kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
	112	if (!kfd)
	113	return NULL;
	114
	115	kfd->kgd = kgd;
	116	kfd->device_info = device_info;
	117	kfd->pdev = pdev;
19f6d2a6	118	kfd->init_complete = false;
cea405b1 XZ	119	kfd->kfd2kgd = f2g;
	120
	121	mutex_init(&kfd->doorbell_mutex);
	122	memset(&kfd->doorbell_available_index, 0,
	123	sizeof(kfd->doorbell_available_index));
4a488a7a OG	124
	125	return kfd;
	126	}
	127
b17f068a OG	128	static bool device_iommu_pasid_init(struct kfd_dev *kfd)
	129	{
	130	const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP \|
	131	AMD_IOMMU_DEVICE_FLAG_PRI_SUP \|
	132	AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
	133
	134	struct amd_iommu_device_info iommu_info;
	135	unsigned int pasid_limit;
	136	int err;
	137
	138	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
	139	if (err < 0) {
	140	dev_err(kfd_device,
	141	"error getting iommu info. is the iommu enabled?\n");
	142	return false;
	143	}
	144
	145	if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
	146	dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
	147	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
	148	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
	149	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
	150	return false;
	151	}
	152
	153	pasid_limit = min_t(unsigned int,
	154	(unsigned int)1 << kfd->device_info->max_pasid_bits,
	155	iommu_info.max_pasids);
	156	/*
	157	* last pasid is used for kernel queues doorbells
	158	* in the future the last pasid might be used for a kernel thread.
	159	*/
	160	pasid_limit = min_t(unsigned int,
	161	pasid_limit,
	162	kfd->doorbell_process_limit - 1);
	163
	164	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	165	if (err < 0) {
	166	dev_err(kfd_device, "error initializing iommu device\n");
	167	return false;
	168	}
	169
	170	if (!kfd_set_pasid_limit(pasid_limit)) {
	171	dev_err(kfd_device, "error setting pasid limit\n");
	172	amd_iommu_free_device(kfd->pdev);
	173	return false;
	174	}
	175
	176	return true;
	177	}
	178
	179	static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
	180	{
	181	struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);
	182
	183	if (dev)
	184	kfd_unbind_process_from_device(dev, pasid);
	185	}
	186
59d3e8be AS	187	/*
	188	* This function called by IOMMU driver on PPR failure
	189	*/
	190	static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
	191	unsigned long address, u16 flags)
	192	{
	193	struct kfd_dev *dev;
	194
	195	dev_warn(kfd_device,
	196	"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
	197	PCI_BUS_NUM(pdev->devfn),
	198	PCI_SLOT(pdev->devfn),
	199	PCI_FUNC(pdev->devfn),
	200	pasid,
	201	address,
	202	flags);
	203
	204	dev = kfd_device_by_pci_dev(pdev);
	205	BUG_ON(dev == NULL);
	206
	207	kfd_signal_iommu_event(dev, pasid, address,
	208	flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);
	209
	210	return AMD_IOMMU_INV_PRI_RSP_INVALID;
	211	}
	212
4a488a7a OG	213	bool kgd2kfd_device_init(struct kfd_dev *kfd,
	214	const struct kgd2kfd_shared_resources *gpu_resources)
	215	{
19f6d2a6 OG	216	unsigned int size;
19f6d2a6 OG	217
4a488a7a OG	218	kfd->shared_resources = *gpu_resources;
4a488a7a OG	219
19f6d2a6	220	/* calculate max size of mqds needed for queues */
b8cbab04 OG	221	size = max_num_of_queues_per_device *
b8cbab04 OG	222	kfd->device_info->mqd_size_aligned;
19f6d2a6	223
e18e794e OG	224	/*
	225	* calculate max size of runlist packet.
	226	* There can be only 2 packets at once
	227	*/
b3869b17 DA	228	size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
b3869b17 DA	229	max_num_of_queues_per_device *
e18e794e OG	230	sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;
	231
	232	/* Add size of HIQ & DIQ */
	233	size += KFD_KERNEL_QUEUE_SIZE * 2;
	234
	235	/* add another 512KB for all other allocations on gart (HPD, fences) */
19f6d2a6 OG	236	size += 512 * 1024;
19f6d2a6 OG	237
cea405b1 XZ	238	if (kfd->kfd2kgd->init_gtt_mem_allocation(
	239	kfd->kgd, size, &kfd->gtt_mem,
	240	&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
19f6d2a6	241	dev_err(kfd_device,
e18e794e OG	242	"Could not allocate %d bytes for device (%x:%x)\n",
e18e794e OG	243	size, kfd->pdev->vendor, kfd->pdev->device);
19f6d2a6 OG	244	goto out;
	245	}
	246
e18e794e OG	247	dev_info(kfd_device,
	248	"Allocated %d bytes on gart for device(%x:%x)\n",
	249	size, kfd->pdev->vendor, kfd->pdev->device);
	250
73a1da0b OG	251	/* Initialize GTT sa with 512 byte chunk size */
	252	if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
	253	dev_err(kfd_device,
	254	"Error initializing gtt sub-allocator\n");
	255	goto kfd_gtt_sa_init_error;
	256	}
	257
19f6d2a6 OG	258	kfd_doorbell_init(kfd);
	259
	260	if (kfd_topology_add_device(kfd) != 0) {
	261	dev_err(kfd_device,
	262	"Error adding device (%x:%x) to topology\n",
	263	kfd->pdev->vendor, kfd->pdev->device);
	264	goto kfd_topology_add_device_error;
	265	}
	266
2249d558 AL	267	if (kfd_interrupt_init(kfd)) {
	268	dev_err(kfd_device,
	269	"Error initializing interrupts for device (%x:%x)\n",
	270	kfd->pdev->vendor, kfd->pdev->device);
	271	goto kfd_interrupt_error;
	272	}
	273
b17f068a OG	274	if (!device_iommu_pasid_init(kfd)) {
	275	dev_err(kfd_device,
	276	"Error initializing iommuv2 for device (%x:%x)\n",
	277	kfd->pdev->vendor, kfd->pdev->device);
	278	goto device_iommu_pasid_error;
	279	}
	280	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
	281	iommu_pasid_shutdown_callback);
59d3e8be	282	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
5b5c4e40	283
64c7f8cf BG	284	kfd->dqm = device_queue_manager_init(kfd);
	285	if (!kfd->dqm) {
	286	dev_err(kfd_device,
	287	"Error initializing queue manager for device (%x:%x)\n",
	288	kfd->pdev->vendor, kfd->pdev->device);
	289	goto device_queue_manager_error;
	290	}
	291
45c9a5e4	292	if (kfd->dqm->ops.start(kfd->dqm) != 0) {
64c7f8cf BG	293	dev_err(kfd_device,
	294	"Error starting queuen manager for device (%x:%x)\n",
	295	kfd->pdev->vendor, kfd->pdev->device);
	296	goto dqm_start_error;
	297	}
	298
4a488a7a OG	299	kfd->init_complete = true;
	300	dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
	301	kfd->pdev->device);
	302
64c7f8cf BG	303	pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
	304	sched_policy);
	305
19f6d2a6 OG	306	goto out;
19f6d2a6 OG	307
64c7f8cf BG	308	dqm_start_error:
	309	device_queue_manager_uninit(kfd->dqm);
	310	device_queue_manager_error:
	311	amd_iommu_free_device(kfd->pdev);
b17f068a	312	device_iommu_pasid_error:
2249d558 AL	313	kfd_interrupt_exit(kfd);
2249d558 AL	314	kfd_interrupt_error:
b17f068a	315	kfd_topology_remove_device(kfd);
19f6d2a6	316	kfd_topology_add_device_error:
73a1da0b OG	317	kfd_gtt_sa_fini(kfd);
73a1da0b OG	318	kfd_gtt_sa_init_error:
cea405b1	319	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
19f6d2a6 OG	320	dev_err(kfd_device,
	321	"device (%x:%x) NOT added due to errors\n",
	322	kfd->pdev->vendor, kfd->pdev->device);
	323	out:
	324	return kfd->init_complete;
4a488a7a OG	325	}
	326
	327	void kgd2kfd_device_exit(struct kfd_dev *kfd)
	328	{
b17f068a	329	if (kfd->init_complete) {
64c7f8cf	330	device_queue_manager_uninit(kfd->dqm);
b17f068a	331	amd_iommu_free_device(kfd->pdev);
2249d558	332	kfd_interrupt_exit(kfd);
b17f068a	333	kfd_topology_remove_device(kfd);
73a1da0b	334	kfd_gtt_sa_fini(kfd);
cea405b1	335	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
b17f068a	336	}
5b5c4e40	337
4a488a7a OG	338	kfree(kfd);
	339	}
	340
	341	void kgd2kfd_suspend(struct kfd_dev *kfd)
	342	{
	343	BUG_ON(kfd == NULL);
b17f068a	344
64c7f8cf	345	if (kfd->init_complete) {
45c9a5e4	346	kfd->dqm->ops.stop(kfd->dqm);
abc9d3e3	347	amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
59d3e8be	348	amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
b17f068a	349	amd_iommu_free_device(kfd->pdev);
64c7f8cf	350	}
4a488a7a OG	351	}
	352
	353	int kgd2kfd_resume(struct kfd_dev *kfd)
	354	{
b17f068a OG	355	unsigned int pasid_limit;
	356	int err;
	357
4a488a7a OG	358	BUG_ON(kfd == NULL);
4a488a7a OG	359
b17f068a OG	360	pasid_limit = kfd_get_pasid_limit();
	361
	362	if (kfd->init_complete) {
	363	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	364	if (err < 0)
	365	return -ENXIO;
	366	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
	367	iommu_pasid_shutdown_callback);
59d3e8be	368	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
45c9a5e4	369	kfd->dqm->ops.start(kfd->dqm);
b17f068a OG	370	}
b17f068a OG	371
4a488a7a OG	372	return 0;
	373	}
	374
b3f5e6b4 AL	375	/* This is called directly from KGD at ISR. */
b3f5e6b4 AL	376	void kgd2kfd_interrupt(struct kfd_dev kfd, const void ih_ring_entry)
4a488a7a	377	{
2249d558 AL	378	if (!kfd->init_complete)
	379	return;
	380
	381	spin_lock(&kfd->interrupt_lock);
	382
	383	if (kfd->interrupts_active
	384	&& interrupt_is_wanted(kfd, ih_ring_entry)
	385	&& enqueue_ih_ring_entry(kfd, ih_ring_entry))
	386	schedule_work(&kfd->interrupt_work);
	387
	388	spin_unlock(&kfd->interrupt_lock);
4a488a7a	389	}
6e81090b OG	390
	391	static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
	392	unsigned int chunk_size)
	393	{
	394	unsigned int num_of_bits;
	395
	396	BUG_ON(!kfd);
	397	BUG_ON(!kfd->gtt_mem);
	398	BUG_ON(buf_size < chunk_size);
	399	BUG_ON(buf_size == 0);
	400	BUG_ON(chunk_size == 0);
	401
	402	kfd->gtt_sa_chunk_size = chunk_size;
	403	kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;
	404
	405	num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
	406	BUG_ON(num_of_bits == 0);
	407
	408	kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);
	409
	410	if (!kfd->gtt_sa_bitmap)
	411	return -ENOMEM;
	412
	413	pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
	414	kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);
	415
	416	mutex_init(&kfd->gtt_sa_lock);
	417
	418	return 0;
	419
	420	}
	421
	422	static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
	423	{
	424	mutex_destroy(&kfd->gtt_sa_lock);
	425	kfree(kfd->gtt_sa_bitmap);
	426	}
	427
	428	static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
	429	unsigned int bit_num,
	430	unsigned int chunk_size)
	431	{
	432	return start_addr + bit_num * chunk_size;
	433	}
	434
	435	static inline uint32_t kfd_gtt_sa_calc_cpu_addr(void start_addr,
	436	unsigned int bit_num,
	437	unsigned int chunk_size)
	438	{
	439	return (uint32_t ) ((uint64_t) start_addr + bit_num chunk_size);
	440	}
	441
	442	int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
	443	struct kfd_mem_obj **mem_obj)
	444	{
	445	unsigned int found, start_search, cur_size;
	446
	447	BUG_ON(!kfd);
	448
	449	if (size == 0)
	450	return -EINVAL;
	451
	452	if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
	453	return -ENOMEM;
454
455	*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
456	if ((*mem_obj) == NULL)
457	return -ENOMEM;
458
459	pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);
460
461	start_search = 0;
462
463	mutex_lock(&kfd->gtt_sa_lock);
464
465	kfd_gtt_restart_search:
466	/* Find the first chunk that is free */
467	found = find_next_zero_bit(kfd->gtt_sa_bitmap,
468	kfd->gtt_sa_num_of_chunks,
469	start_search);
470
471	pr_debug("kfd: found = %d\n", found);
472
473	/* If there wasn't any free chunk, bail out */
474	if (found == kfd->gtt_sa_num_of_chunks)
475	goto kfd_gtt_no_free_chunk;
476
477	/* Update fields of mem_obj */
478	(*mem_obj)->range_start = found;
479	(*mem_obj)->range_end = found;
480	(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
481	kfd->gtt_start_gpu_addr,
482	found,
483	kfd->gtt_sa_chunk_size);
484	(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
485	kfd->gtt_start_cpu_ptr,
486	found,
487	kfd->gtt_sa_chunk_size);
488
489	pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
490	(uint64_t ) (mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);
491
492	/* If we need only one chunk, mark it as allocated and get out */
493	if (size <= kfd->gtt_sa_chunk_size) {
494	pr_debug("kfd: single bit\n");
495	set_bit(found, kfd->gtt_sa_bitmap);
496	goto kfd_gtt_out;
497	}
498
499	/* Otherwise, try to see if we have enough contiguous chunks */
500	cur_size = size - kfd->gtt_sa_chunk_size;
501	do {
502	(*mem_obj)->range_end =
503	find_next_zero_bit(kfd->gtt_sa_bitmap,
504	kfd->gtt_sa_num_of_chunks, ++found);
505	/*
506	* If next free chunk is not contiguous than we need to
507	* restart our search from the last free chunk we found (which
508	* wasn't contiguous to the previous ones
509	*/
510	if ((*mem_obj)->range_end != found) {
511	start_search = found;
512	goto kfd_gtt_restart_search;
513	}
514
515	/*
516	* If we reached end of buffer, bail out with error
517	*/
518	if (found == kfd->gtt_sa_num_of_chunks)
519	goto kfd_gtt_no_free_chunk;
520
521	/* Check if we don't need another chunk */
522	if (cur_size <= kfd->gtt_sa_chunk_size)
523	cur_size = 0;
524	else
525	cur_size -= kfd->gtt_sa_chunk_size;
526
527	} while (cur_size > 0);
528
529	pr_debug("kfd: range_start = %d, range_end = %d\n",
530	(mem_obj)->range_start, (mem_obj)->range_end);
531
532	/* Mark the chunks as allocated */
533	for (found = (*mem_obj)->range_start;
534	found <= (*mem_obj)->range_end;
535	found++)
536	set_bit(found, kfd->gtt_sa_bitmap);
537
538	kfd_gtt_out:
539	mutex_unlock(&kfd->gtt_sa_lock);
540	return 0;
541
542	kfd_gtt_no_free_chunk:
543	pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
544	mutex_unlock(&kfd->gtt_sa_lock);
545	kfree(mem_obj);
546	return -ENOMEM;
547	}
548
549	int kfd_gtt_sa_free(struct kfd_dev kfd, struct kfd_mem_obj mem_obj)
550	{
551	unsigned int bit;
552
553	BUG_ON(!kfd);
9216ed29 OG	554
	555	/* Act like kfree when trying to free a NULL object */
	556	if (!mem_obj)
	557	return 0;
6e81090b OG	558
	559	pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
	560	mem_obj, mem_obj->range_start, mem_obj->range_end);
	561
	562	mutex_lock(&kfd->gtt_sa_lock);
	563
	564	/* Mark the chunks as free */
	565	for (bit = mem_obj->range_start;
	566	bit <= mem_obj->range_end;
	567	bit++)
	568	clear_bit(bit, kfd->gtt_sa_bitmap);
	569
	570	mutex_unlock(&kfd->gtt_sa_lock);
	571
	572	kfree(mem_obj);
	573	return 0;
	574	}