[deliverable/linux.git] / drivers / gpu / drm / amd / amdkfd / kfd_device.c

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/amd-iommu.h>
#include <linux/bsearch.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "kfd_priv.h"
#include "kfd_device_queue_manager.h"
#include "kfd_pm4_headers.h"

#define MQD_SIZE_ALIGNED 768

static const struct kfd_device_info kaveri_device_info = {
	.asic_family = CHIP_KAVERI,
	.max_pasid_bits = 16,
	/* max num of queues for KV.TODO should be a dynamic value */
	.max_no_of_hqd	= 24,
	.ih_ring_entry_size = 4 * sizeof(uint32_t),
	.event_interrupt_class = &event_interrupt_class_cik,
	.num_of_watch_points = 4,
	.mqd_size_aligned = MQD_SIZE_ALIGNED
};

static const struct kfd_device_info carrizo_device_info = {
	.asic_family = CHIP_CARRIZO,
	.max_pasid_bits = 16,
	.ih_ring_entry_size = 4 * sizeof(uint32_t),
	.num_of_watch_points = 4,
	.mqd_size_aligned = MQD_SIZE_ALIGNED
};

struct kfd_deviceid {
	unsigned short did;
	const struct kfd_device_info *device_info;
};

/* Please keep this sorted by increasing device id. */
static const struct kfd_deviceid supported_devices[] = {
	{ 0x1304, &kaveri_device_info },	/* Kaveri */
	{ 0x1305, &kaveri_device_info },	/* Kaveri */
	{ 0x1306, &kaveri_device_info },	/* Kaveri */
	{ 0x1307, &kaveri_device_info },	/* Kaveri */
	{ 0x1309, &kaveri_device_info },	/* Kaveri */
	{ 0x130A, &kaveri_device_info },	/* Kaveri */
	{ 0x130B, &kaveri_device_info },	/* Kaveri */
	{ 0x130C, &kaveri_device_info },	/* Kaveri */
	{ 0x130D, &kaveri_device_info },	/* Kaveri */
	{ 0x130E, &kaveri_device_info },	/* Kaveri */
	{ 0x130F, &kaveri_device_info },	/* Kaveri */
	{ 0x1310, &kaveri_device_info },	/* Kaveri */
	{ 0x1311, &kaveri_device_info },	/* Kaveri */
	{ 0x1312, &kaveri_device_info },	/* Kaveri */
	{ 0x1313, &kaveri_device_info },	/* Kaveri */
	{ 0x1315, &kaveri_device_info },	/* Kaveri */
	{ 0x1316, &kaveri_device_info },	/* Kaveri */
	{ 0x1317, &kaveri_device_info },	/* Kaveri */
	{ 0x1318, &kaveri_device_info },	/* Kaveri */
	{ 0x131B, &kaveri_device_info },	/* Kaveri */
	{ 0x131C, &kaveri_device_info },	/* Kaveri */
	{ 0x131D, &kaveri_device_info }		/* Kaveri */
};

static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
				unsigned int chunk_size);
static void kfd_gtt_sa_fini(struct kfd_dev *kfd);

static const struct kfd_device_info *lookup_device_info(unsigned short did)
{
	size_t i;

	for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
		if (supported_devices[i].did == did) {
			BUG_ON(supported_devices[i].device_info == NULL);
			return supported_devices[i].device_info;
		}
	}

	return NULL;
}

struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
	struct pci_dev *pdev, const struct kfd2kgd_calls *f2g)
{
	struct kfd_dev *kfd;

	const struct kfd_device_info *device_info =
					lookup_device_info(pdev->device);

	if (!device_info)
		return NULL;

	kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
	if (!kfd)
		return NULL;

	kfd->kgd = kgd;
	kfd->device_info = device_info;
	kfd->pdev = pdev;
	kfd->init_complete = false;
	kfd->kfd2kgd = f2g;

	mutex_init(&kfd->doorbell_mutex);
	memset(&kfd->doorbell_available_index, 0,
		sizeof(kfd->doorbell_available_index));

	return kfd;
}

static bool device_iommu_pasid_init(struct kfd_dev *kfd)
{
	const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP |
					AMD_IOMMU_DEVICE_FLAG_PRI_SUP |
					AMD_IOMMU_DEVICE_FLAG_PASID_SUP;

	struct amd_iommu_device_info iommu_info;
	unsigned int pasid_limit;
	int err;

	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
	if (err < 0) {
		dev_err(kfd_device,
			"error getting iommu info. is the iommu enabled?\n");
		return false;
	}

	if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
		dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
		return false;
	}

	pasid_limit = min_t(unsigned int,
			(unsigned int)1 << kfd->device_info->max_pasid_bits,
			iommu_info.max_pasids);
	/*
	 * last pasid is used for kernel queues doorbells
	 * in the future the last pasid might be used for a kernel thread.
	 */
	pasid_limit = min_t(unsigned int,
				pasid_limit,
				kfd->doorbell_process_limit - 1);

	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	if (err < 0) {
		dev_err(kfd_device, "error initializing iommu device\n");
		return false;
	}

	if (!kfd_set_pasid_limit(pasid_limit)) {
		dev_err(kfd_device, "error setting pasid limit\n");
		amd_iommu_free_device(kfd->pdev);
		return false;
	}

	return true;
}

static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
{
	struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);

	if (dev)
		kfd_unbind_process_from_device(dev, pasid);
}

/*
 * This function called by IOMMU driver on PPR failure
 */
static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
		unsigned long address, u16 flags)
{
	struct kfd_dev *dev;

	dev_warn(kfd_device,
			"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
			PCI_BUS_NUM(pdev->devfn),
			PCI_SLOT(pdev->devfn),
			PCI_FUNC(pdev->devfn),
			pasid,
			address,
			flags);

	dev = kfd_device_by_pci_dev(pdev);
	BUG_ON(dev == NULL);

	kfd_signal_iommu_event(dev, pasid, address,
			flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);

	return AMD_IOMMU_INV_PRI_RSP_INVALID;
}

bool kgd2kfd_device_init(struct kfd_dev *kfd,
			 const struct kgd2kfd_shared_resources *gpu_resources)
{
	unsigned int size;

	kfd->shared_resources = *gpu_resources;

	/* calculate max size of mqds needed for queues */
	size = max_num_of_queues_per_device *
			kfd->device_info->mqd_size_aligned;

	/*
	 * calculate max size of runlist packet.
	 * There can be only 2 packets at once
	 */
	size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
		max_num_of_queues_per_device *
		sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;

	/* Add size of HIQ & DIQ */
	size += KFD_KERNEL_QUEUE_SIZE * 2;

	/* add another 512KB for all other allocations on gart (HPD, fences) */
	size += 512 * 1024;

	if (kfd->kfd2kgd->init_gtt_mem_allocation(
			kfd->kgd, size, &kfd->gtt_mem,
			&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
		dev_err(kfd_device,
			"Could not allocate %d bytes for device (%x:%x)\n",
			size, kfd->pdev->vendor, kfd->pdev->device);
		goto out;
	}

	dev_info(kfd_device,
		"Allocated %d bytes on gart for device(%x:%x)\n",
		size, kfd->pdev->vendor, kfd->pdev->device);

	/* Initialize GTT sa with 512 byte chunk size */
	if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
		dev_err(kfd_device,
			"Error initializing gtt sub-allocator\n");
		goto kfd_gtt_sa_init_error;
	}

	kfd_doorbell_init(kfd);

	if (kfd_topology_add_device(kfd) != 0) {
		dev_err(kfd_device,
			"Error adding device (%x:%x) to topology\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto kfd_topology_add_device_error;
	}

	if (kfd_interrupt_init(kfd)) {
		dev_err(kfd_device,
			"Error initializing interrupts for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto kfd_interrupt_error;
	}

	if (!device_iommu_pasid_init(kfd)) {
		dev_err(kfd_device,
			"Error initializing iommuv2 for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto device_iommu_pasid_error;
	}
	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
						iommu_pasid_shutdown_callback);
	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);

	kfd->dqm = device_queue_manager_init(kfd);
	if (!kfd->dqm) {
		dev_err(kfd_device,
			"Error initializing queue manager for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto device_queue_manager_error;
	}

	if (kfd->dqm->ops.start(kfd->dqm) != 0) {
		dev_err(kfd_device,
			"Error starting queuen manager for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto dqm_start_error;
	}

	kfd->dbgmgr = NULL;

	kfd->init_complete = true;
	dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
		 kfd->pdev->device);

	pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
		sched_policy);

	goto out;

dqm_start_error:
	device_queue_manager_uninit(kfd->dqm);
device_queue_manager_error:
	amd_iommu_free_device(kfd->pdev);
device_iommu_pasid_error:
	kfd_interrupt_exit(kfd);
kfd_interrupt_error:
	kfd_topology_remove_device(kfd);
kfd_topology_add_device_error:
	kfd_gtt_sa_fini(kfd);
kfd_gtt_sa_init_error:
	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
	dev_err(kfd_device,
		"device (%x:%x) NOT added due to errors\n",
		kfd->pdev->vendor, kfd->pdev->device);
out:
	return kfd->init_complete;
}

void kgd2kfd_device_exit(struct kfd_dev *kfd)
{
	if (kfd->init_complete) {
		device_queue_manager_uninit(kfd->dqm);
		amd_iommu_free_device(kfd->pdev);
		kfd_interrupt_exit(kfd);
		kfd_topology_remove_device(kfd);
		kfd_gtt_sa_fini(kfd);
		kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
	}

	kfree(kfd);
}

void kgd2kfd_suspend(struct kfd_dev *kfd)
{
	BUG_ON(kfd == NULL);

	if (kfd->init_complete) {
		kfd->dqm->ops.stop(kfd->dqm);
		amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
		amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
		amd_iommu_free_device(kfd->pdev);
	}
}

int kgd2kfd_resume(struct kfd_dev *kfd)
{
	unsigned int pasid_limit;
	int err;

	BUG_ON(kfd == NULL);

	pasid_limit = kfd_get_pasid_limit();

	if (kfd->init_complete) {
		err = amd_iommu_init_device(kfd->pdev, pasid_limit);
		if (err < 0)
			return -ENXIO;
		amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
						iommu_pasid_shutdown_callback);
		amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
		kfd->dqm->ops.start(kfd->dqm);
	}

	return 0;
}

/* This is called directly from KGD at ISR. */
void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
{
	if (!kfd->init_complete)
		return;

	spin_lock(&kfd->interrupt_lock);

	if (kfd->interrupts_active
	    && interrupt_is_wanted(kfd, ih_ring_entry)
	    && enqueue_ih_ring_entry(kfd, ih_ring_entry))
		schedule_work(&kfd->interrupt_work);

	spin_unlock(&kfd->interrupt_lock);
}

static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
				unsigned int chunk_size)
{
	unsigned int num_of_bits;

	BUG_ON(!kfd);
	BUG_ON(!kfd->gtt_mem);
	BUG_ON(buf_size < chunk_size);
	BUG_ON(buf_size == 0);
	BUG_ON(chunk_size == 0);

	kfd->gtt_sa_chunk_size = chunk_size;
	kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;

	num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
	BUG_ON(num_of_bits == 0);

	kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);

	if (!kfd->gtt_sa_bitmap)
		return -ENOMEM;

	pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
			kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);

	mutex_init(&kfd->gtt_sa_lock);

	return 0;

}

static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
{
	mutex_destroy(&kfd->gtt_sa_lock);
	kfree(kfd->gtt_sa_bitmap);
}

static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
						unsigned int bit_num,
						unsigned int chunk_size)
{
	return start_addr + bit_num * chunk_size;
}

static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr,
						unsigned int bit_num,
						unsigned int chunk_size)
{
	return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size);
}

int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
			struct kfd_mem_obj **mem_obj)
{
	unsigned int found, start_search, cur_size;

	BUG_ON(!kfd);

	if (size == 0)
		return -EINVAL;

	if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
		return -ENOMEM;

	*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
	if ((*mem_obj) == NULL)
		return -ENOMEM;

	pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);

	start_search = 0;

	mutex_lock(&kfd->gtt_sa_lock);

kfd_gtt_restart_search:
	/* Find the first chunk that is free */
	found = find_next_zero_bit(kfd->gtt_sa_bitmap,
					kfd->gtt_sa_num_of_chunks,
					start_search);

	pr_debug("kfd: found = %d\n", found);

	/* If there wasn't any free chunk, bail out */
	if (found == kfd->gtt_sa_num_of_chunks)
		goto kfd_gtt_no_free_chunk;

	/* Update fields of mem_obj */
	(*mem_obj)->range_start = found;
	(*mem_obj)->range_end = found;
	(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
					kfd->gtt_start_gpu_addr,
					found,
					kfd->gtt_sa_chunk_size);
	(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
					kfd->gtt_start_cpu_ptr,
					found,
					kfd->gtt_sa_chunk_size);

	pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
			(uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);

	/* If we need only one chunk, mark it as allocated and get out */
	if (size <= kfd->gtt_sa_chunk_size) {
		pr_debug("kfd: single bit\n");
		set_bit(found, kfd->gtt_sa_bitmap);
		goto kfd_gtt_out;
	}

	/* Otherwise, try to see if we have enough contiguous chunks */
	cur_size = size - kfd->gtt_sa_chunk_size;
	do {
		(*mem_obj)->range_end =
			find_next_zero_bit(kfd->gtt_sa_bitmap,
					kfd->gtt_sa_num_of_chunks, ++found);
		/*
		 * If next free chunk is not contiguous than we need to
		 * restart our search from the last free chunk we found (which
		 * wasn't contiguous to the previous ones
		 */
		if ((*mem_obj)->range_end != found) {
			start_search = found;
			goto kfd_gtt_restart_search;
		}

		/*
		 * If we reached end of buffer, bail out with error
		 */
		if (found == kfd->gtt_sa_num_of_chunks)
			goto kfd_gtt_no_free_chunk;

		/* Check if we don't need another chunk */
		if (cur_size <= kfd->gtt_sa_chunk_size)
			cur_size = 0;
		else
			cur_size -= kfd->gtt_sa_chunk_size;

	} while (cur_size > 0);

	pr_debug("kfd: range_start = %d, range_end = %d\n",
		(*mem_obj)->range_start, (*mem_obj)->range_end);

	/* Mark the chunks as allocated */
	for (found = (*mem_obj)->range_start;
		found <= (*mem_obj)->range_end;
		found++)
		set_bit(found, kfd->gtt_sa_bitmap);

kfd_gtt_out:
	mutex_unlock(&kfd->gtt_sa_lock);
	return 0;

kfd_gtt_no_free_chunk:
	pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
	mutex_unlock(&kfd->gtt_sa_lock);
	kfree(mem_obj);
	return -ENOMEM;
}

int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj)
{
	unsigned int bit;

	BUG_ON(!kfd);

	/* Act like kfree when trying to free a NULL object */
	if (!mem_obj)
		return 0;

	pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
			mem_obj, mem_obj->range_start, mem_obj->range_end);

	mutex_lock(&kfd->gtt_sa_lock);

	/* Mark the chunks as free */
	for (bit = mem_obj->range_start;
		bit <= mem_obj->range_end;
		bit++)
		clear_bit(bit, kfd->gtt_sa_bitmap);

	mutex_unlock(&kfd->gtt_sa_lock);

	kfree(mem_obj);
	return 0;
}
Commit	Line	Data
4a488a7a OG	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*/
	22
	23	#include <linux/amd-iommu.h>
	24	#include <linux/bsearch.h>
	25	#include <linux/pci.h>
	26	#include <linux/slab.h>
	27	#include "kfd_priv.h"
64c7f8cf	28	#include "kfd_device_queue_manager.h"
e18e794e	29	#include "kfd_pm4_headers.h"
4a488a7a	30
19f6d2a6 OG	31	#define MQD_SIZE_ALIGNED 768
19f6d2a6 OG	32
4a488a7a	33	static const struct kfd_device_info kaveri_device_info = {
0da7558c BG	34	.asic_family = CHIP_KAVERI,
0da7558c BG	35	.max_pasid_bits = 16,
992839ad YS	36	/* max num of queues for KV.TODO should be a dynamic value */
992839ad YS	37	.max_no_of_hqd = 24,
0da7558c	38	.ih_ring_entry_size = 4 * sizeof(uint32_t),
f3a39818	39	.event_interrupt_class = &event_interrupt_class_cik,
fbeb661b	40	.num_of_watch_points = 4,
0da7558c BG	41	.mqd_size_aligned = MQD_SIZE_ALIGNED
	42	};
	43
	44	static const struct kfd_device_info carrizo_device_info = {
	45	.asic_family = CHIP_CARRIZO,
4a488a7a	46	.max_pasid_bits = 16,
b3f5e6b4	47	.ih_ring_entry_size = 4 * sizeof(uint32_t),
f7c826ad	48	.num_of_watch_points = 4,
19f6d2a6	49	.mqd_size_aligned = MQD_SIZE_ALIGNED
4a488a7a OG	50	};
	51
	52	struct kfd_deviceid {
	53	unsigned short did;
	54	const struct kfd_device_info *device_info;
	55	};
	56
	57	/* Please keep this sorted by increasing device id. */
	58	static const struct kfd_deviceid supported_devices[] = {
	59	{ 0x1304, &kaveri_device_info }, /* Kaveri */
	60	{ 0x1305, &kaveri_device_info }, /* Kaveri */
	61	{ 0x1306, &kaveri_device_info }, /* Kaveri */
	62	{ 0x1307, &kaveri_device_info }, /* Kaveri */
	63	{ 0x1309, &kaveri_device_info }, /* Kaveri */
	64	{ 0x130A, &kaveri_device_info }, /* Kaveri */
	65	{ 0x130B, &kaveri_device_info }, /* Kaveri */
	66	{ 0x130C, &kaveri_device_info }, /* Kaveri */
	67	{ 0x130D, &kaveri_device_info }, /* Kaveri */
	68	{ 0x130E, &kaveri_device_info }, /* Kaveri */
	69	{ 0x130F, &kaveri_device_info }, /* Kaveri */
	70	{ 0x1310, &kaveri_device_info }, /* Kaveri */
	71	{ 0x1311, &kaveri_device_info }, /* Kaveri */
	72	{ 0x1312, &kaveri_device_info }, /* Kaveri */
	73	{ 0x1313, &kaveri_device_info }, /* Kaveri */
	74	{ 0x1315, &kaveri_device_info }, /* Kaveri */
	75	{ 0x1316, &kaveri_device_info }, /* Kaveri */
	76	{ 0x1317, &kaveri_device_info }, /* Kaveri */
	77	{ 0x1318, &kaveri_device_info }, /* Kaveri */
	78	{ 0x131B, &kaveri_device_info }, /* Kaveri */
	79	{ 0x131C, &kaveri_device_info }, /* Kaveri */
0da7558c	80	{ 0x131D, &kaveri_device_info } /* Kaveri */
4a488a7a OG	81	};
4a488a7a OG	82
6e81090b OG	83	static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
	84	unsigned int chunk_size);
	85	static void kfd_gtt_sa_fini(struct kfd_dev *kfd);
	86
4a488a7a OG	87	static const struct kfd_device_info *lookup_device_info(unsigned short did)
	88	{
	89	size_t i;
	90
	91	for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
	92	if (supported_devices[i].did == did) {
	93	BUG_ON(supported_devices[i].device_info == NULL);
	94	return supported_devices[i].device_info;
	95	}
	96	}
	97
	98	return NULL;
	99	}
	100
cea405b1 XZ	101	struct kfd_dev kgd2kfd_probe(struct kgd_dev kgd,
cea405b1 XZ	102	struct pci_dev pdev, const struct kfd2kgd_calls f2g)
4a488a7a OG	103	{
	104	struct kfd_dev *kfd;
	105
	106	const struct kfd_device_info *device_info =
	107	lookup_device_info(pdev->device);
	108
	109	if (!device_info)
	110	return NULL;
	111
	112	kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
	113	if (!kfd)
	114	return NULL;
	115
	116	kfd->kgd = kgd;
	117	kfd->device_info = device_info;
	118	kfd->pdev = pdev;
19f6d2a6	119	kfd->init_complete = false;
cea405b1 XZ	120	kfd->kfd2kgd = f2g;
	121
	122	mutex_init(&kfd->doorbell_mutex);
	123	memset(&kfd->doorbell_available_index, 0,
	124	sizeof(kfd->doorbell_available_index));
4a488a7a OG	125
	126	return kfd;
	127	}
	128
b17f068a OG	129	static bool device_iommu_pasid_init(struct kfd_dev *kfd)
	130	{
	131	const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP \|
	132	AMD_IOMMU_DEVICE_FLAG_PRI_SUP \|
	133	AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
	134
	135	struct amd_iommu_device_info iommu_info;
	136	unsigned int pasid_limit;
	137	int err;
	138
	139	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
	140	if (err < 0) {
	141	dev_err(kfd_device,
	142	"error getting iommu info. is the iommu enabled?\n");
	143	return false;
	144	}
	145
	146	if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
	147	dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
	148	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
	149	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
	150	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
	151	return false;
	152	}
	153
	154	pasid_limit = min_t(unsigned int,
	155	(unsigned int)1 << kfd->device_info->max_pasid_bits,
	156	iommu_info.max_pasids);
	157	/*
	158	* last pasid is used for kernel queues doorbells
	159	* in the future the last pasid might be used for a kernel thread.
	160	*/
	161	pasid_limit = min_t(unsigned int,
	162	pasid_limit,
	163	kfd->doorbell_process_limit - 1);
	164
	165	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	166	if (err < 0) {
	167	dev_err(kfd_device, "error initializing iommu device\n");
	168	return false;
	169	}
	170
	171	if (!kfd_set_pasid_limit(pasid_limit)) {
	172	dev_err(kfd_device, "error setting pasid limit\n");
	173	amd_iommu_free_device(kfd->pdev);
	174	return false;
	175	}
	176
	177	return true;
	178	}
	179
	180	static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
	181	{
	182	struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);
	183
	184	if (dev)
	185	kfd_unbind_process_from_device(dev, pasid);
	186	}
	187
59d3e8be AS	188	/*
	189	* This function called by IOMMU driver on PPR failure
	190	*/
	191	static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
	192	unsigned long address, u16 flags)
	193	{
	194	struct kfd_dev *dev;
	195
	196	dev_warn(kfd_device,
	197	"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
	198	PCI_BUS_NUM(pdev->devfn),
	199	PCI_SLOT(pdev->devfn),
	200	PCI_FUNC(pdev->devfn),
	201	pasid,
	202	address,
	203	flags);
	204
	205	dev = kfd_device_by_pci_dev(pdev);
	206	BUG_ON(dev == NULL);
	207
	208	kfd_signal_iommu_event(dev, pasid, address,
	209	flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);
	210
	211	return AMD_IOMMU_INV_PRI_RSP_INVALID;
	212	}
	213
4a488a7a OG	214	bool kgd2kfd_device_init(struct kfd_dev *kfd,
	215	const struct kgd2kfd_shared_resources *gpu_resources)
	216	{
19f6d2a6 OG	217	unsigned int size;
19f6d2a6 OG	218
4a488a7a OG	219	kfd->shared_resources = *gpu_resources;
4a488a7a OG	220
19f6d2a6	221	/* calculate max size of mqds needed for queues */
b8cbab04 OG	222	size = max_num_of_queues_per_device *
b8cbab04 OG	223	kfd->device_info->mqd_size_aligned;
19f6d2a6	224
e18e794e OG	225	/*
	226	* calculate max size of runlist packet.
	227	* There can be only 2 packets at once
	228	*/
b3869b17 DA	229	size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
b3869b17 DA	230	max_num_of_queues_per_device *
e18e794e OG	231	sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;
	232
	233	/* Add size of HIQ & DIQ */
	234	size += KFD_KERNEL_QUEUE_SIZE * 2;
	235
	236	/* add another 512KB for all other allocations on gart (HPD, fences) */
19f6d2a6 OG	237	size += 512 * 1024;
19f6d2a6 OG	238
cea405b1 XZ	239	if (kfd->kfd2kgd->init_gtt_mem_allocation(
	240	kfd->kgd, size, &kfd->gtt_mem,
	241	&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
19f6d2a6	242	dev_err(kfd_device,
e18e794e OG	243	"Could not allocate %d bytes for device (%x:%x)\n",
e18e794e OG	244	size, kfd->pdev->vendor, kfd->pdev->device);
19f6d2a6 OG	245	goto out;
	246	}
	247
e18e794e OG	248	dev_info(kfd_device,
	249	"Allocated %d bytes on gart for device(%x:%x)\n",
	250	size, kfd->pdev->vendor, kfd->pdev->device);
	251
73a1da0b OG	252	/* Initialize GTT sa with 512 byte chunk size */
	253	if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
	254	dev_err(kfd_device,
	255	"Error initializing gtt sub-allocator\n");
	256	goto kfd_gtt_sa_init_error;
	257	}
	258
19f6d2a6 OG	259	kfd_doorbell_init(kfd);
	260
	261	if (kfd_topology_add_device(kfd) != 0) {
	262	dev_err(kfd_device,
	263	"Error adding device (%x:%x) to topology\n",
	264	kfd->pdev->vendor, kfd->pdev->device);
	265	goto kfd_topology_add_device_error;
	266	}
	267
2249d558 AL	268	if (kfd_interrupt_init(kfd)) {
	269	dev_err(kfd_device,
	270	"Error initializing interrupts for device (%x:%x)\n",
	271	kfd->pdev->vendor, kfd->pdev->device);
	272	goto kfd_interrupt_error;
	273	}
	274
b17f068a OG	275	if (!device_iommu_pasid_init(kfd)) {
	276	dev_err(kfd_device,
	277	"Error initializing iommuv2 for device (%x:%x)\n",
	278	kfd->pdev->vendor, kfd->pdev->device);
	279	goto device_iommu_pasid_error;
	280	}
	281	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
	282	iommu_pasid_shutdown_callback);
59d3e8be	283	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
5b5c4e40	284
64c7f8cf BG	285	kfd->dqm = device_queue_manager_init(kfd);
	286	if (!kfd->dqm) {
	287	dev_err(kfd_device,
	288	"Error initializing queue manager for device (%x:%x)\n",
	289	kfd->pdev->vendor, kfd->pdev->device);
	290	goto device_queue_manager_error;
	291	}
	292
45c9a5e4	293	if (kfd->dqm->ops.start(kfd->dqm) != 0) {
64c7f8cf BG	294	dev_err(kfd_device,
	295	"Error starting queuen manager for device (%x:%x)\n",
	296	kfd->pdev->vendor, kfd->pdev->device);
	297	goto dqm_start_error;
	298	}
	299
fbeb661b YS	300	kfd->dbgmgr = NULL;
fbeb661b YS	301
4a488a7a OG	302	kfd->init_complete = true;
	303	dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
	304	kfd->pdev->device);
	305
64c7f8cf BG	306	pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
	307	sched_policy);
	308
19f6d2a6 OG	309	goto out;
19f6d2a6 OG	310
64c7f8cf BG	311	dqm_start_error:
	312	device_queue_manager_uninit(kfd->dqm);
	313	device_queue_manager_error:
	314	amd_iommu_free_device(kfd->pdev);
b17f068a	315	device_iommu_pasid_error:
2249d558 AL	316	kfd_interrupt_exit(kfd);
2249d558 AL	317	kfd_interrupt_error:
b17f068a	318	kfd_topology_remove_device(kfd);
19f6d2a6	319	kfd_topology_add_device_error:
73a1da0b OG	320	kfd_gtt_sa_fini(kfd);
73a1da0b OG	321	kfd_gtt_sa_init_error:
cea405b1	322	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
19f6d2a6 OG	323	dev_err(kfd_device,
	324	"device (%x:%x) NOT added due to errors\n",
	325	kfd->pdev->vendor, kfd->pdev->device);
	326	out:
	327	return kfd->init_complete;
4a488a7a OG	328	}
	329
	330	void kgd2kfd_device_exit(struct kfd_dev *kfd)
	331	{
b17f068a	332	if (kfd->init_complete) {
64c7f8cf	333	device_queue_manager_uninit(kfd->dqm);
b17f068a	334	amd_iommu_free_device(kfd->pdev);
2249d558	335	kfd_interrupt_exit(kfd);
b17f068a	336	kfd_topology_remove_device(kfd);
73a1da0b	337	kfd_gtt_sa_fini(kfd);
cea405b1	338	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
b17f068a	339	}
5b5c4e40	340
4a488a7a OG	341	kfree(kfd);
	342	}
	343
	344	void kgd2kfd_suspend(struct kfd_dev *kfd)
	345	{
	346	BUG_ON(kfd == NULL);
b17f068a	347
64c7f8cf	348	if (kfd->init_complete) {
45c9a5e4	349	kfd->dqm->ops.stop(kfd->dqm);
abc9d3e3	350	amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
59d3e8be	351	amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
b17f068a	352	amd_iommu_free_device(kfd->pdev);
64c7f8cf	353	}
4a488a7a OG	354	}
	355
	356	int kgd2kfd_resume(struct kfd_dev *kfd)
	357	{
b17f068a OG	358	unsigned int pasid_limit;
	359	int err;
	360
4a488a7a OG	361	BUG_ON(kfd == NULL);
4a488a7a OG	362
b17f068a OG	363	pasid_limit = kfd_get_pasid_limit();
	364
	365	if (kfd->init_complete) {
	366	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	367	if (err < 0)
	368	return -ENXIO;
	369	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
	370	iommu_pasid_shutdown_callback);
59d3e8be	371	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
45c9a5e4	372	kfd->dqm->ops.start(kfd->dqm);
b17f068a OG	373	}
b17f068a OG	374
4a488a7a OG	375	return 0;
	376	}
	377
b3f5e6b4 AL	378	/* This is called directly from KGD at ISR. */
b3f5e6b4 AL	379	void kgd2kfd_interrupt(struct kfd_dev kfd, const void ih_ring_entry)
4a488a7a	380	{
2249d558 AL	381	if (!kfd->init_complete)
	382	return;
	383
	384	spin_lock(&kfd->interrupt_lock);
	385
	386	if (kfd->interrupts_active
	387	&& interrupt_is_wanted(kfd, ih_ring_entry)
	388	&& enqueue_ih_ring_entry(kfd, ih_ring_entry))
	389	schedule_work(&kfd->interrupt_work);
	390
	391	spin_unlock(&kfd->interrupt_lock);
4a488a7a	392	}
6e81090b OG	393
	394	static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
	395	unsigned int chunk_size)
	396	{
	397	unsigned int num_of_bits;
	398
	399	BUG_ON(!kfd);
	400	BUG_ON(!kfd->gtt_mem);
	401	BUG_ON(buf_size < chunk_size);
	402	BUG_ON(buf_size == 0);
	403	BUG_ON(chunk_size == 0);
	404
	405	kfd->gtt_sa_chunk_size = chunk_size;
	406	kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;
	407
	408	num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
	409	BUG_ON(num_of_bits == 0);
	410
	411	kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);
	412
	413	if (!kfd->gtt_sa_bitmap)
	414	return -ENOMEM;
	415
	416	pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
	417	kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);
	418
	419	mutex_init(&kfd->gtt_sa_lock);
	420
	421	return 0;
	422
	423	}
	424
	425	static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
	426	{
	427	mutex_destroy(&kfd->gtt_sa_lock);
	428	kfree(kfd->gtt_sa_bitmap);
	429	}
	430
	431	static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
	432	unsigned int bit_num,
	433	unsigned int chunk_size)
	434	{
	435	return start_addr + bit_num * chunk_size;
	436	}
	437
	438	static inline uint32_t kfd_gtt_sa_calc_cpu_addr(void start_addr,
	439	unsigned int bit_num,
	440	unsigned int chunk_size)
	441	{
	442	return (uint32_t ) ((uint64_t) start_addr + bit_num chunk_size);
	443	}
	444
	445	int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
	446	struct kfd_mem_obj **mem_obj)
	447	{
	448	unsigned int found, start_search, cur_size;
	449
	450	BUG_ON(!kfd);
	451
	452	if (size == 0)
	453	return -EINVAL;
	454
	455	if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
	456	return -ENOMEM;
457
458	*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
459	if ((*mem_obj) == NULL)
460	return -ENOMEM;
461
462	pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);
463
464	start_search = 0;
465
466	mutex_lock(&kfd->gtt_sa_lock);
467
468	kfd_gtt_restart_search:
469	/* Find the first chunk that is free */
470	found = find_next_zero_bit(kfd->gtt_sa_bitmap,
471	kfd->gtt_sa_num_of_chunks,
472	start_search);
473
474	pr_debug("kfd: found = %d\n", found);
475
476	/* If there wasn't any free chunk, bail out */
477	if (found == kfd->gtt_sa_num_of_chunks)
478	goto kfd_gtt_no_free_chunk;
479
480	/* Update fields of mem_obj */
481	(*mem_obj)->range_start = found;
482	(*mem_obj)->range_end = found;
483	(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
484	kfd->gtt_start_gpu_addr,
485	found,
486	kfd->gtt_sa_chunk_size);
487	(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
488	kfd->gtt_start_cpu_ptr,
489	found,
490	kfd->gtt_sa_chunk_size);
491
492	pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
493	(uint64_t ) (mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);
494
495	/* If we need only one chunk, mark it as allocated and get out */
496	if (size <= kfd->gtt_sa_chunk_size) {
497	pr_debug("kfd: single bit\n");
498	set_bit(found, kfd->gtt_sa_bitmap);
499	goto kfd_gtt_out;
500	}
501
502	/* Otherwise, try to see if we have enough contiguous chunks */
503	cur_size = size - kfd->gtt_sa_chunk_size;
504	do {
505	(*mem_obj)->range_end =
506	find_next_zero_bit(kfd->gtt_sa_bitmap,
507	kfd->gtt_sa_num_of_chunks, ++found);
508	/*
509	* If next free chunk is not contiguous than we need to
510	* restart our search from the last free chunk we found (which
511	* wasn't contiguous to the previous ones
512	*/
513	if ((*mem_obj)->range_end != found) {
514	start_search = found;
515	goto kfd_gtt_restart_search;
516	}
517
518	/*
519	* If we reached end of buffer, bail out with error
520	*/
521	if (found == kfd->gtt_sa_num_of_chunks)
522	goto kfd_gtt_no_free_chunk;
523
524	/* Check if we don't need another chunk */
525	if (cur_size <= kfd->gtt_sa_chunk_size)
526	cur_size = 0;
527	else
528	cur_size -= kfd->gtt_sa_chunk_size;
529
530	} while (cur_size > 0);
531
532	pr_debug("kfd: range_start = %d, range_end = %d\n",
533	(mem_obj)->range_start, (mem_obj)->range_end);
534
535	/* Mark the chunks as allocated */
536	for (found = (*mem_obj)->range_start;
537	found <= (*mem_obj)->range_end;
538	found++)
539	set_bit(found, kfd->gtt_sa_bitmap);
540
541	kfd_gtt_out:
542	mutex_unlock(&kfd->gtt_sa_lock);
543	return 0;
544
545	kfd_gtt_no_free_chunk:
546	pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
547	mutex_unlock(&kfd->gtt_sa_lock);
548	kfree(mem_obj);
549	return -ENOMEM;
550	}
551
552	int kfd_gtt_sa_free(struct kfd_dev kfd, struct kfd_mem_obj mem_obj)
553	{
554	unsigned int bit;
555
556	BUG_ON(!kfd);
9216ed29 OG	557
	558	/* Act like kfree when trying to free a NULL object */
	559	if (!mem_obj)
	560	return 0;
6e81090b OG	561
	562	pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
	563	mem_obj, mem_obj->range_start, mem_obj->range_end);
	564
	565	mutex_lock(&kfd->gtt_sa_lock);
	566
	567	/* Mark the chunks as free */
	568	for (bit = mem_obj->range_start;
	569	bit <= mem_obj->range_end;
	570	bit++)
	571	clear_bit(bit, kfd->gtt_sa_bitmap);
	572
	573	mutex_unlock(&kfd->gtt_sa_lock);
	574
	575	kfree(mem_obj);
	576	return 0;
	577	}