[deliverable/linux.git] / drivers / gpu / drm / amd / amdkfd / kfd_device.c

/*
 * Copyright 2014 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/amd-iommu.h>
#include <linux/bsearch.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include "kfd_priv.h"
#include "kfd_device_queue_manager.h"
#include "kfd_pm4_headers.h"

#define MQD_SIZE_ALIGNED 768

static const struct kfd_device_info kaveri_device_info = {
	.asic_family = CHIP_KAVERI,
	.max_pasid_bits = 16,
	.ih_ring_entry_size = 4 * sizeof(uint32_t),
	.event_interrupt_class = &event_interrupt_class_cik,
	.mqd_size_aligned = MQD_SIZE_ALIGNED
};

static const struct kfd_device_info carrizo_device_info = {
	.asic_family = CHIP_CARRIZO,
	.max_pasid_bits = 16,
	.ih_ring_entry_size = 4 * sizeof(uint32_t),
	.num_of_watch_points = 4,
	.mqd_size_aligned = MQD_SIZE_ALIGNED
};

struct kfd_deviceid {
	unsigned short did;
	const struct kfd_device_info *device_info;
};

/* Please keep this sorted by increasing device id. */
static const struct kfd_deviceid supported_devices[] = {
	{ 0x1304, &kaveri_device_info },	/* Kaveri */
	{ 0x1305, &kaveri_device_info },	/* Kaveri */
	{ 0x1306, &kaveri_device_info },	/* Kaveri */
	{ 0x1307, &kaveri_device_info },	/* Kaveri */
	{ 0x1309, &kaveri_device_info },	/* Kaveri */
	{ 0x130A, &kaveri_device_info },	/* Kaveri */
	{ 0x130B, &kaveri_device_info },	/* Kaveri */
	{ 0x130C, &kaveri_device_info },	/* Kaveri */
	{ 0x130D, &kaveri_device_info },	/* Kaveri */
	{ 0x130E, &kaveri_device_info },	/* Kaveri */
	{ 0x130F, &kaveri_device_info },	/* Kaveri */
	{ 0x1310, &kaveri_device_info },	/* Kaveri */
	{ 0x1311, &kaveri_device_info },	/* Kaveri */
	{ 0x1312, &kaveri_device_info },	/* Kaveri */
	{ 0x1313, &kaveri_device_info },	/* Kaveri */
	{ 0x1315, &kaveri_device_info },	/* Kaveri */
	{ 0x1316, &kaveri_device_info },	/* Kaveri */
	{ 0x1317, &kaveri_device_info },	/* Kaveri */
	{ 0x1318, &kaveri_device_info },	/* Kaveri */
	{ 0x131B, &kaveri_device_info },	/* Kaveri */
	{ 0x131C, &kaveri_device_info },	/* Kaveri */
	{ 0x131D, &kaveri_device_info }		/* Kaveri */
};

static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
				unsigned int chunk_size);
static void kfd_gtt_sa_fini(struct kfd_dev *kfd);

static const struct kfd_device_info *lookup_device_info(unsigned short did)
{
	size_t i;

	for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
		if (supported_devices[i].did == did) {
			BUG_ON(supported_devices[i].device_info == NULL);
			return supported_devices[i].device_info;
		}
	}

	return NULL;
}

struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd,
	struct pci_dev *pdev, const struct kfd2kgd_calls *f2g)
{
	struct kfd_dev *kfd;

	const struct kfd_device_info *device_info =
					lookup_device_info(pdev->device);

	if (!device_info)
		return NULL;

	kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
	if (!kfd)
		return NULL;

	kfd->kgd = kgd;
	kfd->device_info = device_info;
	kfd->pdev = pdev;
	kfd->init_complete = false;
	kfd->kfd2kgd = f2g;

	mutex_init(&kfd->doorbell_mutex);
	memset(&kfd->doorbell_available_index, 0,
		sizeof(kfd->doorbell_available_index));

	return kfd;
}

static bool device_iommu_pasid_init(struct kfd_dev *kfd)
{
	const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP |
					AMD_IOMMU_DEVICE_FLAG_PRI_SUP |
					AMD_IOMMU_DEVICE_FLAG_PASID_SUP;

	struct amd_iommu_device_info iommu_info;
	unsigned int pasid_limit;
	int err;

	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
	if (err < 0) {
		dev_err(kfd_device,
			"error getting iommu info. is the iommu enabled?\n");
		return false;
	}

	if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
		dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
		       (iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
		return false;
	}

	pasid_limit = min_t(unsigned int,
			(unsigned int)1 << kfd->device_info->max_pasid_bits,
			iommu_info.max_pasids);
	/*
	 * last pasid is used for kernel queues doorbells
	 * in the future the last pasid might be used for a kernel thread.
	 */
	pasid_limit = min_t(unsigned int,
				pasid_limit,
				kfd->doorbell_process_limit - 1);

	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	if (err < 0) {
		dev_err(kfd_device, "error initializing iommu device\n");
		return false;
	}

	if (!kfd_set_pasid_limit(pasid_limit)) {
		dev_err(kfd_device, "error setting pasid limit\n");
		amd_iommu_free_device(kfd->pdev);
		return false;
	}

	return true;
}

static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
{
	struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);

	if (dev)
		kfd_unbind_process_from_device(dev, pasid);
}

/*
 * This function called by IOMMU driver on PPR failure
 */
static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
		unsigned long address, u16 flags)
{
	struct kfd_dev *dev;

	dev_warn(kfd_device,
			"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
			PCI_BUS_NUM(pdev->devfn),
			PCI_SLOT(pdev->devfn),
			PCI_FUNC(pdev->devfn),
			pasid,
			address,
			flags);

	dev = kfd_device_by_pci_dev(pdev);
	BUG_ON(dev == NULL);

	kfd_signal_iommu_event(dev, pasid, address,
			flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);

	return AMD_IOMMU_INV_PRI_RSP_INVALID;
}

bool kgd2kfd_device_init(struct kfd_dev *kfd,
			 const struct kgd2kfd_shared_resources *gpu_resources)
{
	unsigned int size;

	kfd->shared_resources = *gpu_resources;

	/* calculate max size of mqds needed for queues */
	size = max_num_of_queues_per_device *
			kfd->device_info->mqd_size_aligned;

	/*
	 * calculate max size of runlist packet.
	 * There can be only 2 packets at once
	 */
	size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
		max_num_of_queues_per_device *
		sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;

	/* Add size of HIQ & DIQ */
	size += KFD_KERNEL_QUEUE_SIZE * 2;

	/* add another 512KB for all other allocations on gart (HPD, fences) */
	size += 512 * 1024;

	if (kfd->kfd2kgd->init_gtt_mem_allocation(
			kfd->kgd, size, &kfd->gtt_mem,
			&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
		dev_err(kfd_device,
			"Could not allocate %d bytes for device (%x:%x)\n",
			size, kfd->pdev->vendor, kfd->pdev->device);
		goto out;
	}

	dev_info(kfd_device,
		"Allocated %d bytes on gart for device(%x:%x)\n",
		size, kfd->pdev->vendor, kfd->pdev->device);

	/* Initialize GTT sa with 512 byte chunk size */
	if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
		dev_err(kfd_device,
			"Error initializing gtt sub-allocator\n");
		goto kfd_gtt_sa_init_error;
	}

	kfd_doorbell_init(kfd);

	if (kfd_topology_add_device(kfd) != 0) {
		dev_err(kfd_device,
			"Error adding device (%x:%x) to topology\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto kfd_topology_add_device_error;
	}

	if (kfd_interrupt_init(kfd)) {
		dev_err(kfd_device,
			"Error initializing interrupts for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto kfd_interrupt_error;
	}

	if (!device_iommu_pasid_init(kfd)) {
		dev_err(kfd_device,
			"Error initializing iommuv2 for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto device_iommu_pasid_error;
	}
	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
						iommu_pasid_shutdown_callback);
	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);

	kfd->dqm = device_queue_manager_init(kfd);
	if (!kfd->dqm) {
		dev_err(kfd_device,
			"Error initializing queue manager for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto device_queue_manager_error;
	}

	if (kfd->dqm->ops.start(kfd->dqm) != 0) {
		dev_err(kfd_device,
			"Error starting queuen manager for device (%x:%x)\n",
			kfd->pdev->vendor, kfd->pdev->device);
		goto dqm_start_error;
	}

	kfd->init_complete = true;
	dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
		 kfd->pdev->device);

	pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
		sched_policy);

	goto out;

dqm_start_error:
	device_queue_manager_uninit(kfd->dqm);
device_queue_manager_error:
	amd_iommu_free_device(kfd->pdev);
device_iommu_pasid_error:
	kfd_interrupt_exit(kfd);
kfd_interrupt_error:
	kfd_topology_remove_device(kfd);
kfd_topology_add_device_error:
	kfd_gtt_sa_fini(kfd);
kfd_gtt_sa_init_error:
	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
	dev_err(kfd_device,
		"device (%x:%x) NOT added due to errors\n",
		kfd->pdev->vendor, kfd->pdev->device);
out:
	return kfd->init_complete;
}

void kgd2kfd_device_exit(struct kfd_dev *kfd)
{
	if (kfd->init_complete) {
		device_queue_manager_uninit(kfd->dqm);
		amd_iommu_free_device(kfd->pdev);
		kfd_interrupt_exit(kfd);
		kfd_topology_remove_device(kfd);
		kfd_gtt_sa_fini(kfd);
		kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
	}

	kfree(kfd);
}

void kgd2kfd_suspend(struct kfd_dev *kfd)
{
	BUG_ON(kfd == NULL);

	if (kfd->init_complete) {
		kfd->dqm->ops.stop(kfd->dqm);
		amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
		amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
		amd_iommu_free_device(kfd->pdev);
	}
}

int kgd2kfd_resume(struct kfd_dev *kfd)
{
	unsigned int pasid_limit;
	int err;

	BUG_ON(kfd == NULL);

	pasid_limit = kfd_get_pasid_limit();

	if (kfd->init_complete) {
		err = amd_iommu_init_device(kfd->pdev, pasid_limit);
		if (err < 0)
			return -ENXIO;
		amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
						iommu_pasid_shutdown_callback);
		amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
		kfd->dqm->ops.start(kfd->dqm);
	}

	return 0;
}

/* This is called directly from KGD at ISR. */
void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry)
{
	if (!kfd->init_complete)
		return;

	spin_lock(&kfd->interrupt_lock);

	if (kfd->interrupts_active
	    && interrupt_is_wanted(kfd, ih_ring_entry)
	    && enqueue_ih_ring_entry(kfd, ih_ring_entry))
		schedule_work(&kfd->interrupt_work);

	spin_unlock(&kfd->interrupt_lock);
}

static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
				unsigned int chunk_size)
{
	unsigned int num_of_bits;

	BUG_ON(!kfd);
	BUG_ON(!kfd->gtt_mem);
	BUG_ON(buf_size < chunk_size);
	BUG_ON(buf_size == 0);
	BUG_ON(chunk_size == 0);

	kfd->gtt_sa_chunk_size = chunk_size;
	kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;

	num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
	BUG_ON(num_of_bits == 0);

	kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);

	if (!kfd->gtt_sa_bitmap)
		return -ENOMEM;

	pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
			kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);

	mutex_init(&kfd->gtt_sa_lock);

	return 0;

}

static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
{
	mutex_destroy(&kfd->gtt_sa_lock);
	kfree(kfd->gtt_sa_bitmap);
}

static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
						unsigned int bit_num,
						unsigned int chunk_size)
{
	return start_addr + bit_num * chunk_size;
}

static inline uint32_t *kfd_gtt_sa_calc_cpu_addr(void *start_addr,
						unsigned int bit_num,
						unsigned int chunk_size)
{
	return (uint32_t *) ((uint64_t) start_addr + bit_num * chunk_size);
}

int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
			struct kfd_mem_obj **mem_obj)
{
	unsigned int found, start_search, cur_size;

	BUG_ON(!kfd);

	if (size == 0)
		return -EINVAL;

	if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
		return -ENOMEM;

	*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
	if ((*mem_obj) == NULL)
		return -ENOMEM;

	pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);

	start_search = 0;

	mutex_lock(&kfd->gtt_sa_lock);

kfd_gtt_restart_search:
	/* Find the first chunk that is free */
	found = find_next_zero_bit(kfd->gtt_sa_bitmap,
					kfd->gtt_sa_num_of_chunks,
					start_search);

	pr_debug("kfd: found = %d\n", found);

	/* If there wasn't any free chunk, bail out */
	if (found == kfd->gtt_sa_num_of_chunks)
		goto kfd_gtt_no_free_chunk;

	/* Update fields of mem_obj */
	(*mem_obj)->range_start = found;
	(*mem_obj)->range_end = found;
	(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
					kfd->gtt_start_gpu_addr,
					found,
					kfd->gtt_sa_chunk_size);
	(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
					kfd->gtt_start_cpu_ptr,
					found,
					kfd->gtt_sa_chunk_size);

	pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
			(uint64_t *) (*mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);

	/* If we need only one chunk, mark it as allocated and get out */
	if (size <= kfd->gtt_sa_chunk_size) {
		pr_debug("kfd: single bit\n");
		set_bit(found, kfd->gtt_sa_bitmap);
		goto kfd_gtt_out;
	}

	/* Otherwise, try to see if we have enough contiguous chunks */
	cur_size = size - kfd->gtt_sa_chunk_size;
	do {
		(*mem_obj)->range_end =
			find_next_zero_bit(kfd->gtt_sa_bitmap,
					kfd->gtt_sa_num_of_chunks, ++found);
		/*
		 * If next free chunk is not contiguous than we need to
		 * restart our search from the last free chunk we found (which
		 * wasn't contiguous to the previous ones
		 */
		if ((*mem_obj)->range_end != found) {
			start_search = found;
			goto kfd_gtt_restart_search;
		}

		/*
		 * If we reached end of buffer, bail out with error
		 */
		if (found == kfd->gtt_sa_num_of_chunks)
			goto kfd_gtt_no_free_chunk;

		/* Check if we don't need another chunk */
		if (cur_size <= kfd->gtt_sa_chunk_size)
			cur_size = 0;
		else
			cur_size -= kfd->gtt_sa_chunk_size;

	} while (cur_size > 0);

	pr_debug("kfd: range_start = %d, range_end = %d\n",
		(*mem_obj)->range_start, (*mem_obj)->range_end);

	/* Mark the chunks as allocated */
	for (found = (*mem_obj)->range_start;
		found <= (*mem_obj)->range_end;
		found++)
		set_bit(found, kfd->gtt_sa_bitmap);

kfd_gtt_out:
	mutex_unlock(&kfd->gtt_sa_lock);
	return 0;

kfd_gtt_no_free_chunk:
	pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
	mutex_unlock(&kfd->gtt_sa_lock);
	kfree(mem_obj);
	return -ENOMEM;
}

int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj)
{
	unsigned int bit;

	BUG_ON(!kfd);

	/* Act like kfree when trying to free a NULL object */
	if (!mem_obj)
		return 0;

	pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
			mem_obj, mem_obj->range_start, mem_obj->range_end);

	mutex_lock(&kfd->gtt_sa_lock);

	/* Mark the chunks as free */
	for (bit = mem_obj->range_start;
		bit <= mem_obj->range_end;
		bit++)
		clear_bit(bit, kfd->gtt_sa_bitmap);

	mutex_unlock(&kfd->gtt_sa_lock);

	kfree(mem_obj);
	return 0;
}
Commit	Line	Data
4a488a7a OG	1	/*
	2	* Copyright 2014 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*/
	22
	23	#include <linux/amd-iommu.h>
	24	#include <linux/bsearch.h>
	25	#include <linux/pci.h>
	26	#include <linux/slab.h>
	27	#include "kfd_priv.h"
64c7f8cf	28	#include "kfd_device_queue_manager.h"
e18e794e	29	#include "kfd_pm4_headers.h"
4a488a7a	30
19f6d2a6 OG	31	#define MQD_SIZE_ALIGNED 768
19f6d2a6 OG	32
4a488a7a	33	static const struct kfd_device_info kaveri_device_info = {
0da7558c BG	34	.asic_family = CHIP_KAVERI,
	35	.max_pasid_bits = 16,
	36	.ih_ring_entry_size = 4 * sizeof(uint32_t),
f3a39818	37	.event_interrupt_class = &event_interrupt_class_cik,
0da7558c BG	38	.mqd_size_aligned = MQD_SIZE_ALIGNED
	39	};
	40
	41	static const struct kfd_device_info carrizo_device_info = {
	42	.asic_family = CHIP_CARRIZO,
4a488a7a	43	.max_pasid_bits = 16,
b3f5e6b4	44	.ih_ring_entry_size = 4 * sizeof(uint32_t),
f7c826ad	45	.num_of_watch_points = 4,
19f6d2a6	46	.mqd_size_aligned = MQD_SIZE_ALIGNED
4a488a7a OG	47	};
	48
	49	struct kfd_deviceid {
	50	unsigned short did;
	51	const struct kfd_device_info *device_info;
	52	};
	53
	54	/* Please keep this sorted by increasing device id. */
	55	static const struct kfd_deviceid supported_devices[] = {
	56	{ 0x1304, &kaveri_device_info }, /* Kaveri */
	57	{ 0x1305, &kaveri_device_info }, /* Kaveri */
	58	{ 0x1306, &kaveri_device_info }, /* Kaveri */
	59	{ 0x1307, &kaveri_device_info }, /* Kaveri */
	60	{ 0x1309, &kaveri_device_info }, /* Kaveri */
	61	{ 0x130A, &kaveri_device_info }, /* Kaveri */
	62	{ 0x130B, &kaveri_device_info }, /* Kaveri */
	63	{ 0x130C, &kaveri_device_info }, /* Kaveri */
	64	{ 0x130D, &kaveri_device_info }, /* Kaveri */
	65	{ 0x130E, &kaveri_device_info }, /* Kaveri */
	66	{ 0x130F, &kaveri_device_info }, /* Kaveri */
	67	{ 0x1310, &kaveri_device_info }, /* Kaveri */
	68	{ 0x1311, &kaveri_device_info }, /* Kaveri */
	69	{ 0x1312, &kaveri_device_info }, /* Kaveri */
	70	{ 0x1313, &kaveri_device_info }, /* Kaveri */
	71	{ 0x1315, &kaveri_device_info }, /* Kaveri */
	72	{ 0x1316, &kaveri_device_info }, /* Kaveri */
	73	{ 0x1317, &kaveri_device_info }, /* Kaveri */
	74	{ 0x1318, &kaveri_device_info }, /* Kaveri */
	75	{ 0x131B, &kaveri_device_info }, /* Kaveri */
	76	{ 0x131C, &kaveri_device_info }, /* Kaveri */
0da7558c	77	{ 0x131D, &kaveri_device_info } /* Kaveri */
4a488a7a OG	78	};
4a488a7a OG	79
6e81090b OG	80	static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
	81	unsigned int chunk_size);
	82	static void kfd_gtt_sa_fini(struct kfd_dev *kfd);
	83
4a488a7a OG	84	static const struct kfd_device_info *lookup_device_info(unsigned short did)
	85	{
	86	size_t i;
	87
	88	for (i = 0; i < ARRAY_SIZE(supported_devices); i++) {
	89	if (supported_devices[i].did == did) {
	90	BUG_ON(supported_devices[i].device_info == NULL);
	91	return supported_devices[i].device_info;
	92	}
	93	}
	94
	95	return NULL;
	96	}
	97
cea405b1 XZ	98	struct kfd_dev kgd2kfd_probe(struct kgd_dev kgd,
cea405b1 XZ	99	struct pci_dev pdev, const struct kfd2kgd_calls f2g)
4a488a7a OG	100	{
	101	struct kfd_dev *kfd;
	102
	103	const struct kfd_device_info *device_info =
	104	lookup_device_info(pdev->device);
	105
	106	if (!device_info)
	107	return NULL;
	108
	109	kfd = kzalloc(sizeof(*kfd), GFP_KERNEL);
	110	if (!kfd)
	111	return NULL;
	112
	113	kfd->kgd = kgd;
	114	kfd->device_info = device_info;
	115	kfd->pdev = pdev;
19f6d2a6	116	kfd->init_complete = false;
cea405b1 XZ	117	kfd->kfd2kgd = f2g;
	118
	119	mutex_init(&kfd->doorbell_mutex);
	120	memset(&kfd->doorbell_available_index, 0,
	121	sizeof(kfd->doorbell_available_index));
4a488a7a OG	122
	123	return kfd;
	124	}
	125
b17f068a OG	126	static bool device_iommu_pasid_init(struct kfd_dev *kfd)
	127	{
	128	const u32 required_iommu_flags = AMD_IOMMU_DEVICE_FLAG_ATS_SUP \|
	129	AMD_IOMMU_DEVICE_FLAG_PRI_SUP \|
	130	AMD_IOMMU_DEVICE_FLAG_PASID_SUP;
	131
	132	struct amd_iommu_device_info iommu_info;
	133	unsigned int pasid_limit;
	134	int err;
	135
	136	err = amd_iommu_device_info(kfd->pdev, &iommu_info);
	137	if (err < 0) {
	138	dev_err(kfd_device,
	139	"error getting iommu info. is the iommu enabled?\n");
	140	return false;
	141	}
	142
	143	if ((iommu_info.flags & required_iommu_flags) != required_iommu_flags) {
	144	dev_err(kfd_device, "error required iommu flags ats(%i), pri(%i), pasid(%i)\n",
	145	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_ATS_SUP) != 0,
	146	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PRI_SUP) != 0,
	147	(iommu_info.flags & AMD_IOMMU_DEVICE_FLAG_PASID_SUP) != 0);
	148	return false;
	149	}
	150
	151	pasid_limit = min_t(unsigned int,
	152	(unsigned int)1 << kfd->device_info->max_pasid_bits,
	153	iommu_info.max_pasids);
	154	/*
	155	* last pasid is used for kernel queues doorbells
	156	* in the future the last pasid might be used for a kernel thread.
	157	*/
	158	pasid_limit = min_t(unsigned int,
	159	pasid_limit,
	160	kfd->doorbell_process_limit - 1);
	161
	162	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	163	if (err < 0) {
	164	dev_err(kfd_device, "error initializing iommu device\n");
	165	return false;
	166	}
	167
	168	if (!kfd_set_pasid_limit(pasid_limit)) {
	169	dev_err(kfd_device, "error setting pasid limit\n");
	170	amd_iommu_free_device(kfd->pdev);
	171	return false;
	172	}
	173
	174	return true;
	175	}
	176
	177	static void iommu_pasid_shutdown_callback(struct pci_dev *pdev, int pasid)
	178	{
	179	struct kfd_dev *dev = kfd_device_by_pci_dev(pdev);
	180
	181	if (dev)
	182	kfd_unbind_process_from_device(dev, pasid);
	183	}
	184
59d3e8be AS	185	/*
	186	* This function called by IOMMU driver on PPR failure
	187	*/
	188	static int iommu_invalid_ppr_cb(struct pci_dev *pdev, int pasid,
	189	unsigned long address, u16 flags)
	190	{
	191	struct kfd_dev *dev;
	192
	193	dev_warn(kfd_device,
	194	"Invalid PPR device %x:%x.%x pasid %d address 0x%lX flags 0x%X",
	195	PCI_BUS_NUM(pdev->devfn),
	196	PCI_SLOT(pdev->devfn),
	197	PCI_FUNC(pdev->devfn),
	198	pasid,
	199	address,
	200	flags);
	201
	202	dev = kfd_device_by_pci_dev(pdev);
	203	BUG_ON(dev == NULL);
	204
	205	kfd_signal_iommu_event(dev, pasid, address,
	206	flags & PPR_FAULT_WRITE, flags & PPR_FAULT_EXEC);
	207
	208	return AMD_IOMMU_INV_PRI_RSP_INVALID;
	209	}
	210
4a488a7a OG	211	bool kgd2kfd_device_init(struct kfd_dev *kfd,
	212	const struct kgd2kfd_shared_resources *gpu_resources)
	213	{
19f6d2a6 OG	214	unsigned int size;
19f6d2a6 OG	215
4a488a7a OG	216	kfd->shared_resources = *gpu_resources;
4a488a7a OG	217
19f6d2a6	218	/* calculate max size of mqds needed for queues */
b8cbab04 OG	219	size = max_num_of_queues_per_device *
b8cbab04 OG	220	kfd->device_info->mqd_size_aligned;
19f6d2a6	221
e18e794e OG	222	/*
	223	* calculate max size of runlist packet.
	224	* There can be only 2 packets at once
	225	*/
b3869b17 DA	226	size += (KFD_MAX_NUM_OF_PROCESSES * sizeof(struct pm4_map_process) +
b3869b17 DA	227	max_num_of_queues_per_device *
e18e794e OG	228	sizeof(struct pm4_map_queues) + sizeof(struct pm4_runlist)) * 2;
	229
	230	/* Add size of HIQ & DIQ */
	231	size += KFD_KERNEL_QUEUE_SIZE * 2;
	232
	233	/* add another 512KB for all other allocations on gart (HPD, fences) */
19f6d2a6 OG	234	size += 512 * 1024;
19f6d2a6 OG	235
cea405b1 XZ	236	if (kfd->kfd2kgd->init_gtt_mem_allocation(
	237	kfd->kgd, size, &kfd->gtt_mem,
	238	&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){
19f6d2a6	239	dev_err(kfd_device,
e18e794e OG	240	"Could not allocate %d bytes for device (%x:%x)\n",
e18e794e OG	241	size, kfd->pdev->vendor, kfd->pdev->device);
19f6d2a6 OG	242	goto out;
	243	}
	244
e18e794e OG	245	dev_info(kfd_device,
	246	"Allocated %d bytes on gart for device(%x:%x)\n",
	247	size, kfd->pdev->vendor, kfd->pdev->device);
	248
73a1da0b OG	249	/* Initialize GTT sa with 512 byte chunk size */
	250	if (kfd_gtt_sa_init(kfd, size, 512) != 0) {
	251	dev_err(kfd_device,
	252	"Error initializing gtt sub-allocator\n");
	253	goto kfd_gtt_sa_init_error;
	254	}
	255
19f6d2a6 OG	256	kfd_doorbell_init(kfd);
	257
	258	if (kfd_topology_add_device(kfd) != 0) {
	259	dev_err(kfd_device,
	260	"Error adding device (%x:%x) to topology\n",
	261	kfd->pdev->vendor, kfd->pdev->device);
	262	goto kfd_topology_add_device_error;
	263	}
	264
2249d558 AL	265	if (kfd_interrupt_init(kfd)) {
	266	dev_err(kfd_device,
	267	"Error initializing interrupts for device (%x:%x)\n",
	268	kfd->pdev->vendor, kfd->pdev->device);
	269	goto kfd_interrupt_error;
	270	}
	271
b17f068a OG	272	if (!device_iommu_pasid_init(kfd)) {
	273	dev_err(kfd_device,
	274	"Error initializing iommuv2 for device (%x:%x)\n",
	275	kfd->pdev->vendor, kfd->pdev->device);
	276	goto device_iommu_pasid_error;
	277	}
	278	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
	279	iommu_pasid_shutdown_callback);
59d3e8be	280	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
5b5c4e40	281
64c7f8cf BG	282	kfd->dqm = device_queue_manager_init(kfd);
	283	if (!kfd->dqm) {
	284	dev_err(kfd_device,
	285	"Error initializing queue manager for device (%x:%x)\n",
	286	kfd->pdev->vendor, kfd->pdev->device);
	287	goto device_queue_manager_error;
	288	}
	289
45c9a5e4	290	if (kfd->dqm->ops.start(kfd->dqm) != 0) {
64c7f8cf BG	291	dev_err(kfd_device,
	292	"Error starting queuen manager for device (%x:%x)\n",
	293	kfd->pdev->vendor, kfd->pdev->device);
	294	goto dqm_start_error;
	295	}
	296
4a488a7a OG	297	kfd->init_complete = true;
	298	dev_info(kfd_device, "added device (%x:%x)\n", kfd->pdev->vendor,
	299	kfd->pdev->device);
	300
64c7f8cf BG	301	pr_debug("kfd: Starting kfd with the following scheduling policy %d\n",
	302	sched_policy);
	303
19f6d2a6 OG	304	goto out;
19f6d2a6 OG	305
64c7f8cf BG	306	dqm_start_error:
	307	device_queue_manager_uninit(kfd->dqm);
	308	device_queue_manager_error:
	309	amd_iommu_free_device(kfd->pdev);
b17f068a	310	device_iommu_pasid_error:
2249d558 AL	311	kfd_interrupt_exit(kfd);
2249d558 AL	312	kfd_interrupt_error:
b17f068a	313	kfd_topology_remove_device(kfd);
19f6d2a6	314	kfd_topology_add_device_error:
73a1da0b OG	315	kfd_gtt_sa_fini(kfd);
73a1da0b OG	316	kfd_gtt_sa_init_error:
cea405b1	317	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
19f6d2a6 OG	318	dev_err(kfd_device,
	319	"device (%x:%x) NOT added due to errors\n",
	320	kfd->pdev->vendor, kfd->pdev->device);
	321	out:
	322	return kfd->init_complete;
4a488a7a OG	323	}
	324
	325	void kgd2kfd_device_exit(struct kfd_dev *kfd)
	326	{
b17f068a	327	if (kfd->init_complete) {
64c7f8cf	328	device_queue_manager_uninit(kfd->dqm);
b17f068a	329	amd_iommu_free_device(kfd->pdev);
2249d558	330	kfd_interrupt_exit(kfd);
b17f068a	331	kfd_topology_remove_device(kfd);
73a1da0b	332	kfd_gtt_sa_fini(kfd);
cea405b1	333	kfd->kfd2kgd->free_gtt_mem(kfd->kgd, kfd->gtt_mem);
b17f068a	334	}
5b5c4e40	335
4a488a7a OG	336	kfree(kfd);
	337	}
	338
	339	void kgd2kfd_suspend(struct kfd_dev *kfd)
	340	{
	341	BUG_ON(kfd == NULL);
b17f068a	342
64c7f8cf	343	if (kfd->init_complete) {
45c9a5e4	344	kfd->dqm->ops.stop(kfd->dqm);
abc9d3e3	345	amd_iommu_set_invalidate_ctx_cb(kfd->pdev, NULL);
59d3e8be	346	amd_iommu_set_invalid_ppr_cb(kfd->pdev, NULL);
b17f068a	347	amd_iommu_free_device(kfd->pdev);
64c7f8cf	348	}
4a488a7a OG	349	}
	350
	351	int kgd2kfd_resume(struct kfd_dev *kfd)
	352	{
b17f068a OG	353	unsigned int pasid_limit;
	354	int err;
	355
4a488a7a OG	356	BUG_ON(kfd == NULL);
4a488a7a OG	357
b17f068a OG	358	pasid_limit = kfd_get_pasid_limit();
	359
	360	if (kfd->init_complete) {
	361	err = amd_iommu_init_device(kfd->pdev, pasid_limit);
	362	if (err < 0)
	363	return -ENXIO;
	364	amd_iommu_set_invalidate_ctx_cb(kfd->pdev,
	365	iommu_pasid_shutdown_callback);
59d3e8be	366	amd_iommu_set_invalid_ppr_cb(kfd->pdev, iommu_invalid_ppr_cb);
45c9a5e4	367	kfd->dqm->ops.start(kfd->dqm);
b17f068a OG	368	}
b17f068a OG	369
4a488a7a OG	370	return 0;
	371	}
	372
b3f5e6b4 AL	373	/* This is called directly from KGD at ISR. */
b3f5e6b4 AL	374	void kgd2kfd_interrupt(struct kfd_dev kfd, const void ih_ring_entry)
4a488a7a	375	{
2249d558 AL	376	if (!kfd->init_complete)
	377	return;
	378
	379	spin_lock(&kfd->interrupt_lock);
	380
	381	if (kfd->interrupts_active
	382	&& interrupt_is_wanted(kfd, ih_ring_entry)
	383	&& enqueue_ih_ring_entry(kfd, ih_ring_entry))
	384	schedule_work(&kfd->interrupt_work);
	385
	386	spin_unlock(&kfd->interrupt_lock);
4a488a7a	387	}
6e81090b OG	388
	389	static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,
	390	unsigned int chunk_size)
	391	{
	392	unsigned int num_of_bits;
	393
	394	BUG_ON(!kfd);
	395	BUG_ON(!kfd->gtt_mem);
	396	BUG_ON(buf_size < chunk_size);
	397	BUG_ON(buf_size == 0);
	398	BUG_ON(chunk_size == 0);
	399
	400	kfd->gtt_sa_chunk_size = chunk_size;
	401	kfd->gtt_sa_num_of_chunks = buf_size / chunk_size;
	402
	403	num_of_bits = kfd->gtt_sa_num_of_chunks / BITS_PER_BYTE;
	404	BUG_ON(num_of_bits == 0);
	405
	406	kfd->gtt_sa_bitmap = kzalloc(num_of_bits, GFP_KERNEL);
	407
	408	if (!kfd->gtt_sa_bitmap)
	409	return -ENOMEM;
	410
	411	pr_debug("kfd: gtt_sa_num_of_chunks = %d, gtt_sa_bitmap = %p\n",
	412	kfd->gtt_sa_num_of_chunks, kfd->gtt_sa_bitmap);
	413
	414	mutex_init(&kfd->gtt_sa_lock);
	415
	416	return 0;
	417
	418	}
	419
	420	static void kfd_gtt_sa_fini(struct kfd_dev *kfd)
	421	{
	422	mutex_destroy(&kfd->gtt_sa_lock);
	423	kfree(kfd->gtt_sa_bitmap);
	424	}
	425
	426	static inline uint64_t kfd_gtt_sa_calc_gpu_addr(uint64_t start_addr,
	427	unsigned int bit_num,
	428	unsigned int chunk_size)
	429	{
	430	return start_addr + bit_num * chunk_size;
	431	}
	432
	433	static inline uint32_t kfd_gtt_sa_calc_cpu_addr(void start_addr,
	434	unsigned int bit_num,
	435	unsigned int chunk_size)
	436	{
	437	return (uint32_t ) ((uint64_t) start_addr + bit_num chunk_size);
	438	}
	439
	440	int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
	441	struct kfd_mem_obj **mem_obj)
	442	{
	443	unsigned int found, start_search, cur_size;
	444
	445	BUG_ON(!kfd);
	446
	447	if (size == 0)
	448	return -EINVAL;
	449
	450	if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
	451	return -ENOMEM;
452
453	*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_KERNEL);
454	if ((*mem_obj) == NULL)
455	return -ENOMEM;
456
457	pr_debug("kfd: allocated mem_obj = %p for size = %d\n", *mem_obj, size);
458
459	start_search = 0;
460
461	mutex_lock(&kfd->gtt_sa_lock);
462
463	kfd_gtt_restart_search:
464	/* Find the first chunk that is free */
465	found = find_next_zero_bit(kfd->gtt_sa_bitmap,
466	kfd->gtt_sa_num_of_chunks,
467	start_search);
468
469	pr_debug("kfd: found = %d\n", found);
470
471	/* If there wasn't any free chunk, bail out */
472	if (found == kfd->gtt_sa_num_of_chunks)
473	goto kfd_gtt_no_free_chunk;
474
475	/* Update fields of mem_obj */
476	(*mem_obj)->range_start = found;
477	(*mem_obj)->range_end = found;
478	(*mem_obj)->gpu_addr = kfd_gtt_sa_calc_gpu_addr(
479	kfd->gtt_start_gpu_addr,
480	found,
481	kfd->gtt_sa_chunk_size);
482	(*mem_obj)->cpu_ptr = kfd_gtt_sa_calc_cpu_addr(
483	kfd->gtt_start_cpu_ptr,
484	found,
485	kfd->gtt_sa_chunk_size);
486
487	pr_debug("kfd: gpu_addr = %p, cpu_addr = %p\n",
488	(uint64_t ) (mem_obj)->gpu_addr, (*mem_obj)->cpu_ptr);
489
490	/* If we need only one chunk, mark it as allocated and get out */
491	if (size <= kfd->gtt_sa_chunk_size) {
492	pr_debug("kfd: single bit\n");
493	set_bit(found, kfd->gtt_sa_bitmap);
494	goto kfd_gtt_out;
495	}
496
497	/* Otherwise, try to see if we have enough contiguous chunks */
498	cur_size = size - kfd->gtt_sa_chunk_size;
499	do {
500	(*mem_obj)->range_end =
501	find_next_zero_bit(kfd->gtt_sa_bitmap,
502	kfd->gtt_sa_num_of_chunks, ++found);
503	/*
504	* If next free chunk is not contiguous than we need to
505	* restart our search from the last free chunk we found (which
506	* wasn't contiguous to the previous ones
507	*/
508	if ((*mem_obj)->range_end != found) {
509	start_search = found;
510	goto kfd_gtt_restart_search;
511	}
512
513	/*
514	* If we reached end of buffer, bail out with error
515	*/
516	if (found == kfd->gtt_sa_num_of_chunks)
517	goto kfd_gtt_no_free_chunk;
518
519	/* Check if we don't need another chunk */
520	if (cur_size <= kfd->gtt_sa_chunk_size)
521	cur_size = 0;
522	else
523	cur_size -= kfd->gtt_sa_chunk_size;
524
525	} while (cur_size > 0);
526
527	pr_debug("kfd: range_start = %d, range_end = %d\n",
528	(mem_obj)->range_start, (mem_obj)->range_end);
529
530	/* Mark the chunks as allocated */
531	for (found = (*mem_obj)->range_start;
532	found <= (*mem_obj)->range_end;
533	found++)
534	set_bit(found, kfd->gtt_sa_bitmap);
535
536	kfd_gtt_out:
537	mutex_unlock(&kfd->gtt_sa_lock);
538	return 0;
539
540	kfd_gtt_no_free_chunk:
541	pr_debug("kfd: allocation failed with mem_obj = %p\n", mem_obj);
542	mutex_unlock(&kfd->gtt_sa_lock);
543	kfree(mem_obj);
544	return -ENOMEM;
545	}
546
547	int kfd_gtt_sa_free(struct kfd_dev kfd, struct kfd_mem_obj mem_obj)
548	{
549	unsigned int bit;
550
551	BUG_ON(!kfd);
9216ed29 OG	552
	553	/* Act like kfree when trying to free a NULL object */
	554	if (!mem_obj)
	555	return 0;
6e81090b OG	556
	557	pr_debug("kfd: free mem_obj = %p, range_start = %d, range_end = %d\n",
	558	mem_obj, mem_obj->range_start, mem_obj->range_end);
	559
	560	mutex_lock(&kfd->gtt_sa_lock);
	561
	562	/* Mark the chunks as free */
	563	for (bit = mem_obj->range_start;
	564	bit <= mem_obj->range_end;
	565	bit++)
	566	clear_bit(bit, kfd->gtt_sa_bitmap);
	567
	568	mutex_unlock(&kfd->gtt_sa_lock);
	569
	570	kfree(mem_obj);
	571	return 0;
	572	}