Merge tag 'imx-drm-next-2015-01-09' of git://git.pengutronix.de/git/pza/linux into...
[deliverable/linux.git] / drivers / gpu / drm / amd / amdkfd / kfd_priv.h
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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef KFD_PRIV_H_INCLUDED
24#define KFD_PRIV_H_INCLUDED
25
26#include <linux/hashtable.h>
27#include <linux/mmu_notifier.h>
28#include <linux/mutex.h>
29#include <linux/types.h>
30#include <linux/atomic.h>
31#include <linux/workqueue.h>
32#include <linux/spinlock.h>
19f6d2a6 33#include <linux/kfd_ioctl.h>
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34#include <kgd_kfd_interface.h>
35
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36#define KFD_SYSFS_FILE_MODE 0444
37
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38/*
39 * When working with cp scheduler we should assign the HIQ manually or via
40 * the radeon driver to a fixed hqd slot, here are the fixed HIQ hqd slot
41 * definitions for Kaveri. In Kaveri only the first ME queues participates
42 * in the cp scheduling taking that in mind we set the HIQ slot in the
43 * second ME.
44 */
45#define KFD_CIK_HIQ_PIPE 4
46#define KFD_CIK_HIQ_QUEUE 0
47
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48/* GPU ID hash width in bits */
49#define KFD_GPU_ID_HASH_WIDTH 16
50
51/* Macro for allocating structures */
52#define kfd_alloc_struct(ptr_to_struct) \
53 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
54
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55/* Kernel module parameter to specify maximum number of supported processes */
56extern int max_num_of_processes;
57
58#define KFD_MAX_NUM_OF_PROCESSES_DEFAULT 32
59#define KFD_MAX_NUM_OF_PROCESSES 512
60
61/*
62 * Kernel module parameter to specify maximum number of supported queues
63 * per process
64 */
65extern int max_num_of_queues_per_process;
66
67#define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS_DEFAULT 128
68#define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
69
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70#define KFD_KERNEL_QUEUE_SIZE 2048
71
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72/* Kernel module parameter to specify the scheduling policy */
73extern int sched_policy;
74
75/**
76 * enum kfd_sched_policy
77 *
78 * @KFD_SCHED_POLICY_HWS: H/W scheduling policy known as command processor (cp)
79 * scheduling. In this scheduling mode we're using the firmware code to
80 * schedule the user mode queues and kernel queues such as HIQ and DIQ.
81 * the HIQ queue is used as a special queue that dispatches the configuration
82 * to the cp and the user mode queues list that are currently running.
83 * the DIQ queue is a debugging queue that dispatches debugging commands to the
84 * firmware.
85 * in this scheduling mode user mode queues over subscription feature is
86 * enabled.
87 *
88 * @KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION: The same as above but the over
89 * subscription feature disabled.
90 *
91 * @KFD_SCHED_POLICY_NO_HWS: no H/W scheduling policy is a mode which directly
92 * set the command processor registers and sets the queues "manually". This
93 * mode is used *ONLY* for debugging proposes.
94 *
95 */
96enum kfd_sched_policy {
97 KFD_SCHED_POLICY_HWS = 0,
98 KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION,
99 KFD_SCHED_POLICY_NO_HWS
100};
101
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102enum cache_policy {
103 cache_policy_coherent,
104 cache_policy_noncoherent
105};
106
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107struct kfd_device_info {
108 unsigned int max_pasid_bits;
109 size_t ih_ring_entry_size;
f7c826ad 110 uint8_t num_of_watch_points;
19f6d2a6 111 uint16_t mqd_size_aligned;
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112};
113
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114struct kfd_mem_obj {
115 uint32_t range_start;
116 uint32_t range_end;
117 uint64_t gpu_addr;
118 uint32_t *cpu_ptr;
119};
120
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121struct kfd_dev {
122 struct kgd_dev *kgd;
123
124 const struct kfd_device_info *device_info;
125 struct pci_dev *pdev;
126
127 unsigned int id; /* topology stub index */
128
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129 phys_addr_t doorbell_base; /* Start of actual doorbells used by
130 * KFD. It is aligned for mapping
131 * into user mode
132 */
133 size_t doorbell_id_offset; /* Doorbell offset (from KFD doorbell
134 * to HW doorbell, GFX reserved some
135 * at the start)
136 */
137 size_t doorbell_process_limit; /* Number of processes we have doorbell
138 * space for.
139 */
140 u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells
141 * page used by kernel queue
142 */
143
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144 struct kgd2kfd_shared_resources shared_resources;
145
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146 void *gtt_mem;
147 uint64_t gtt_start_gpu_addr;
148 void *gtt_start_cpu_ptr;
149 void *gtt_sa_bitmap;
150 struct mutex gtt_sa_lock;
151 unsigned int gtt_sa_chunk_size;
152 unsigned int gtt_sa_num_of_chunks;
153
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154 void *interrupt_ring;
155 size_t interrupt_ring_size;
156 atomic_t interrupt_ring_rptr;
157 atomic_t interrupt_ring_wptr;
158 struct work_struct interrupt_work;
159 spinlock_t interrupt_lock;
160
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161 /* QCM Device instance */
162 struct device_queue_manager *dqm;
4a488a7a 163
ed6e6a34 164 bool init_complete;
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165 /*
166 * Interrupts of interest to KFD are copied
167 * from the HW ring into a SW ring.
168 */
169 bool interrupts_active;
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170};
171
172/* KGD2KFD callbacks */
173void kgd2kfd_exit(void);
174struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, struct pci_dev *pdev);
175bool kgd2kfd_device_init(struct kfd_dev *kfd,
176 const struct kgd2kfd_shared_resources *gpu_resources);
177void kgd2kfd_device_exit(struct kfd_dev *kfd);
178
179extern const struct kfd2kgd_calls *kfd2kgd;
180
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181enum kfd_mempool {
182 KFD_MEMPOOL_SYSTEM_CACHEABLE = 1,
183 KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2,
184 KFD_MEMPOOL_FRAMEBUFFER = 3,
185};
186
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187/* Character device interface */
188int kfd_chardev_init(void);
189void kfd_chardev_exit(void);
190struct device *kfd_chardev(void);
191
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192/**
193 * enum kfd_preempt_type_filter
194 *
195 * @KFD_PREEMPT_TYPE_FILTER_SINGLE_QUEUE: Preempts single queue.
196 *
197 * @KFD_PRERMPT_TYPE_FILTER_ALL_QUEUES: Preempts all queues in the
198 * running queues list.
199 *
200 * @KFD_PRERMPT_TYPE_FILTER_BY_PASID: Preempts queues that belongs to
201 * specific process.
202 *
203 */
204enum kfd_preempt_type_filter {
205 KFD_PREEMPT_TYPE_FILTER_SINGLE_QUEUE,
206 KFD_PREEMPT_TYPE_FILTER_ALL_QUEUES,
207 KFD_PREEMPT_TYPE_FILTER_BY_PASID
208};
19f6d2a6 209
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210enum kfd_preempt_type {
211 KFD_PREEMPT_TYPE_WAVEFRONT,
212 KFD_PREEMPT_TYPE_WAVEFRONT_RESET
213};
214
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215/**
216 * enum kfd_queue_type
217 *
218 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
219 *
220 * @KFD_QUEUE_TYPE_SDMA: Sdma user mode queue type.
221 *
222 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
223 *
224 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
225 */
226enum kfd_queue_type {
227 KFD_QUEUE_TYPE_COMPUTE,
228 KFD_QUEUE_TYPE_SDMA,
229 KFD_QUEUE_TYPE_HIQ,
230 KFD_QUEUE_TYPE_DIQ
231};
232
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233enum kfd_queue_format {
234 KFD_QUEUE_FORMAT_PM4,
235 KFD_QUEUE_FORMAT_AQL
236};
237
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238/**
239 * struct queue_properties
240 *
241 * @type: The queue type.
242 *
243 * @queue_id: Queue identifier.
244 *
245 * @queue_address: Queue ring buffer address.
246 *
247 * @queue_size: Queue ring buffer size.
248 *
249 * @priority: Defines the queue priority relative to other queues in the
250 * process.
251 * This is just an indication and HW scheduling may override the priority as
252 * necessary while keeping the relative prioritization.
253 * the priority granularity is from 0 to f which f is the highest priority.
254 * currently all queues are initialized with the highest priority.
255 *
256 * @queue_percent: This field is partially implemented and currently a zero in
257 * this field defines that the queue is non active.
258 *
259 * @read_ptr: User space address which points to the number of dwords the
260 * cp read from the ring buffer. This field updates automatically by the H/W.
261 *
262 * @write_ptr: Defines the number of dwords written to the ring buffer.
263 *
264 * @doorbell_ptr: This field aim is to notify the H/W of new packet written to
265 * the queue ring buffer. This field should be similar to write_ptr and the user
266 * should update this field after he updated the write_ptr.
267 *
268 * @doorbell_off: The doorbell offset in the doorbell pci-bar.
269 *
270 * @is_interop: Defines if this is a interop queue. Interop queue means that the
271 * queue can access both graphics and compute resources.
272 *
273 * @is_active: Defines if the queue is active or not.
274 *
275 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
276 * of the queue.
277 *
278 * This structure represents the queue properties for each queue no matter if
279 * it's user mode or kernel mode queue.
280 *
281 */
282struct queue_properties {
283 enum kfd_queue_type type;
6e99df57 284 enum kfd_queue_format format;
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285 unsigned int queue_id;
286 uint64_t queue_address;
287 uint64_t queue_size;
288 uint32_t priority;
289 uint32_t queue_percent;
290 uint32_t *read_ptr;
291 uint32_t *write_ptr;
5cd78de5 292 uint32_t __iomem *doorbell_ptr;
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293 uint32_t doorbell_off;
294 bool is_interop;
295 bool is_active;
296 /* Not relevant for user mode queues in cp scheduling */
297 unsigned int vmid;
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298 /* Relevant only for sdma queues*/
299 uint32_t sdma_engine_id;
300 uint32_t sdma_queue_id;
301 uint32_t sdma_vm_addr;
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302};
303
304/**
305 * struct queue
306 *
307 * @list: Queue linked list.
308 *
309 * @mqd: The queue MQD.
310 *
311 * @mqd_mem_obj: The MQD local gpu memory object.
312 *
313 * @gart_mqd_addr: The MQD gart mc address.
314 *
315 * @properties: The queue properties.
316 *
317 * @mec: Used only in no cp scheduling mode and identifies to micro engine id
318 * that the queue should be execute on.
319 *
320 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe id.
321 *
322 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
323 *
324 * @process: The kfd process that created this queue.
325 *
326 * @device: The kfd device that created this queue.
327 *
328 * This structure represents user mode compute queues.
329 * It contains all the necessary data to handle such queues.
330 *
331 */
332
333struct queue {
334 struct list_head list;
335 void *mqd;
336 struct kfd_mem_obj *mqd_mem_obj;
337 uint64_t gart_mqd_addr;
338 struct queue_properties properties;
339
340 uint32_t mec;
341 uint32_t pipe;
342 uint32_t queue;
343
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344 unsigned int sdma_id;
345
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346 struct kfd_process *process;
347 struct kfd_dev *device;
348};
349
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350/*
351 * Please read the kfd_mqd_manager.h description.
352 */
353enum KFD_MQD_TYPE {
354 KFD_MQD_TYPE_CIK_COMPUTE = 0, /* for no cp scheduling */
355 KFD_MQD_TYPE_CIK_HIQ, /* for hiq */
356 KFD_MQD_TYPE_CIK_CP, /* for cp queues and diq */
357 KFD_MQD_TYPE_CIK_SDMA, /* for sdma queues */
358 KFD_MQD_TYPE_MAX
359};
360
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361struct scheduling_resources {
362 unsigned int vmid_mask;
363 enum kfd_queue_type type;
364 uint64_t queue_mask;
365 uint64_t gws_mask;
366 uint32_t oac_mask;
367 uint32_t gds_heap_base;
368 uint32_t gds_heap_size;
369};
370
371struct process_queue_manager {
372 /* data */
373 struct kfd_process *process;
374 unsigned int num_concurrent_processes;
375 struct list_head queues;
376 unsigned long *queue_slot_bitmap;
377};
378
379struct qcm_process_device {
380 /* The Device Queue Manager that owns this data */
381 struct device_queue_manager *dqm;
382 struct process_queue_manager *pqm;
383 /* Device Queue Manager lock */
384 struct mutex *lock;
385 /* Queues list */
386 struct list_head queues_list;
387 struct list_head priv_queue_list;
388
389 unsigned int queue_count;
390 unsigned int vmid;
391 bool is_debug;
392 /*
393 * All the memory management data should be here too
394 */
395 uint64_t gds_context_area;
396 uint32_t sh_mem_config;
397 uint32_t sh_mem_bases;
398 uint32_t sh_mem_ape1_base;
399 uint32_t sh_mem_ape1_limit;
400 uint32_t page_table_base;
401 uint32_t gds_size;
402 uint32_t num_gws;
403 uint32_t num_oac;
404};
405
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406/* Data that is per-process-per device. */
407struct kfd_process_device {
408 /*
409 * List of all per-device data for a process.
410 * Starts from kfd_process.per_device_data.
411 */
412 struct list_head per_device_list;
413
414 /* The device that owns this data. */
415 struct kfd_dev *dev;
416
417
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418 /* per-process-per device QCM data structure */
419 struct qcm_process_device qpd;
420
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421 /*Apertures*/
422 uint64_t lds_base;
423 uint64_t lds_limit;
424 uint64_t gpuvm_base;
425 uint64_t gpuvm_limit;
426 uint64_t scratch_base;
427 uint64_t scratch_limit;
428
429 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
430 bool bound;
431};
432
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433#define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
434
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435/* Process data */
436struct kfd_process {
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437 /*
438 * kfd_process are stored in an mm_struct*->kfd_process*
439 * hash table (kfd_processes in kfd_process.c)
440 */
441 struct hlist_node kfd_processes;
442
443 struct mm_struct *mm;
444
445 struct mutex mutex;
446
447 /*
448 * In any process, the thread that started main() is the lead
449 * thread and outlives the rest.
450 * It is here because amd_iommu_bind_pasid wants a task_struct.
451 */
452 struct task_struct *lead_thread;
453
454 /* We want to receive a notification when the mm_struct is destroyed */
455 struct mmu_notifier mmu_notifier;
456
457 /* Use for delayed freeing of kfd_process structure */
458 struct rcu_head rcu;
459
460 unsigned int pasid;
461
462 /*
463 * List of kfd_process_device structures,
464 * one for each device the process is using.
465 */
466 struct list_head per_device_data;
467
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468 struct process_queue_manager pqm;
469
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470 /* The process's queues. */
471 size_t queue_array_size;
472
473 /* Size is queue_array_size, up to MAX_PROCESS_QUEUES. */
474 struct kfd_queue **queues;
475
476 unsigned long allocated_queue_bitmap[DIV_ROUND_UP(KFD_MAX_NUM_OF_QUEUES_PER_PROCESS, BITS_PER_LONG)];
477
478 /*Is the user space process 32 bit?*/
479 bool is_32bit_user_mode;
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480};
481
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482void kfd_process_create_wq(void);
483void kfd_process_destroy_wq(void);
484struct kfd_process *kfd_create_process(const struct task_struct *);
485struct kfd_process *kfd_get_process(const struct task_struct *);
486
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487struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev,
488 struct kfd_process *p);
b17f068a 489void kfd_unbind_process_from_device(struct kfd_dev *dev, unsigned int pasid);
19f6d2a6 490struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev,
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491 struct kfd_process *p);
492struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev,
493 struct kfd_process *p);
19f6d2a6 494
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495/* Process device data iterator */
496struct kfd_process_device *kfd_get_first_process_device_data(struct kfd_process *p);
497struct kfd_process_device *kfd_get_next_process_device_data(struct kfd_process *p,
498 struct kfd_process_device *pdd);
499bool kfd_has_process_device_data(struct kfd_process *p);
500
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501/* PASIDs */
502int kfd_pasid_init(void);
503void kfd_pasid_exit(void);
504bool kfd_set_pasid_limit(unsigned int new_limit);
505unsigned int kfd_get_pasid_limit(void);
506unsigned int kfd_pasid_alloc(void);
507void kfd_pasid_free(unsigned int pasid);
508
509/* Doorbells */
510void kfd_doorbell_init(struct kfd_dev *kfd);
511int kfd_doorbell_mmap(struct kfd_process *process, struct vm_area_struct *vma);
512u32 __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd,
513 unsigned int *doorbell_off);
514void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr);
515u32 read_kernel_doorbell(u32 __iomem *db);
516void write_kernel_doorbell(u32 __iomem *db, u32 value);
517unsigned int kfd_queue_id_to_doorbell(struct kfd_dev *kfd,
518 struct kfd_process *process,
519 unsigned int queue_id);
520
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521/* GTT Sub-Allocator */
522
523int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
524 struct kfd_mem_obj **mem_obj);
525
526int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj);
527
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528extern struct device *kfd_device;
529
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530/* Topology */
531int kfd_topology_init(void);
532void kfd_topology_shutdown(void);
533int kfd_topology_add_device(struct kfd_dev *gpu);
534int kfd_topology_remove_device(struct kfd_dev *gpu);
535struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
536struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev);
537struct kfd_dev *kfd_topology_enum_kfd_devices(uint8_t idx);
538
4a488a7a 539/* Interrupts */
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540int kfd_interrupt_init(struct kfd_dev *dev);
541void kfd_interrupt_exit(struct kfd_dev *dev);
542void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry);
543bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry);
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544
545/* Power Management */
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546void kgd2kfd_suspend(struct kfd_dev *kfd);
547int kgd2kfd_resume(struct kfd_dev *kfd);
4a488a7a 548
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549/* amdkfd Apertures */
550int kfd_init_apertures(struct kfd_process *process);
551
ed6e6a34 552/* Queue Context Management */
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553inline uint32_t lower_32(uint64_t x);
554inline uint32_t upper_32(uint64_t x);
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555struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd);
556inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m);
241f24f8 557
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558int init_queue(struct queue **q, struct queue_properties properties);
559void uninit_queue(struct queue *q);
45102048 560void print_queue_properties(struct queue_properties *q);
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561void print_queue(struct queue *q);
562
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563struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type,
564 struct kfd_dev *dev);
565struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
566void device_queue_manager_uninit(struct device_queue_manager *dqm);
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567struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
568 enum kfd_queue_type type);
569void kernel_queue_uninit(struct kernel_queue *kq);
570
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571/* Process Queue Manager */
572struct process_queue_node {
573 struct queue *q;
574 struct kernel_queue *kq;
575 struct list_head process_queue_list;
576};
577
578int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p);
579void pqm_uninit(struct process_queue_manager *pqm);
580int pqm_create_queue(struct process_queue_manager *pqm,
581 struct kfd_dev *dev,
582 struct file *f,
583 struct queue_properties *properties,
584 unsigned int flags,
585 enum kfd_queue_type type,
586 unsigned int *qid);
587int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid);
588int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid,
589 struct queue_properties *p);
590
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591/* Packet Manager */
592
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593#define KFD_HIQ_TIMEOUT (500)
594
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595#define KFD_FENCE_COMPLETED (100)
596#define KFD_FENCE_INIT (10)
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597#define KFD_UNMAP_LATENCY (150)
598
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599struct packet_manager {
600 struct device_queue_manager *dqm;
601 struct kernel_queue *priv_queue;
602 struct mutex lock;
603 bool allocated;
604 struct kfd_mem_obj *ib_buffer_obj;
605};
606
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607int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
608void pm_uninit(struct packet_manager *pm);
609int pm_send_set_resources(struct packet_manager *pm,
610 struct scheduling_resources *res);
611int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues);
612int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
613 uint32_t fence_value);
614
615int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
616 enum kfd_preempt_type_filter mode,
617 uint32_t filter_param, bool reset,
618 unsigned int sdma_engine);
619
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620void pm_release_ib(struct packet_manager *pm);
621
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622uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
623phys_addr_t kfd_get_process_doorbells(struct kfd_dev *dev,
624 struct kfd_process *process);
625
4a488a7a 626#endif
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