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4a488a7a OG |
1 | /* |
2 | * Copyright 2014 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | ||
23 | #ifndef KFD_PRIV_H_INCLUDED | |
24 | #define KFD_PRIV_H_INCLUDED | |
25 | ||
26 | #include <linux/hashtable.h> | |
27 | #include <linux/mmu_notifier.h> | |
28 | #include <linux/mutex.h> | |
29 | #include <linux/types.h> | |
30 | #include <linux/atomic.h> | |
31 | #include <linux/workqueue.h> | |
32 | #include <linux/spinlock.h> | |
19f6d2a6 | 33 | #include <linux/kfd_ioctl.h> |
4a488a7a OG |
34 | #include <kgd_kfd_interface.h> |
35 | ||
5b5c4e40 EP |
36 | #define KFD_SYSFS_FILE_MODE 0444 |
37 | ||
f3a39818 AL |
38 | #define KFD_MMAP_DOORBELL_MASK 0x8000000000000 |
39 | #define KFD_MMAP_EVENTS_MASK 0x4000000000000 | |
40 | ||
ed6e6a34 BG |
41 | /* |
42 | * When working with cp scheduler we should assign the HIQ manually or via | |
43 | * the radeon driver to a fixed hqd slot, here are the fixed HIQ hqd slot | |
44 | * definitions for Kaveri. In Kaveri only the first ME queues participates | |
45 | * in the cp scheduling taking that in mind we set the HIQ slot in the | |
46 | * second ME. | |
47 | */ | |
48 | #define KFD_CIK_HIQ_PIPE 4 | |
49 | #define KFD_CIK_HIQ_QUEUE 0 | |
50 | ||
5b5c4e40 EP |
51 | /* GPU ID hash width in bits */ |
52 | #define KFD_GPU_ID_HASH_WIDTH 16 | |
53 | ||
54 | /* Macro for allocating structures */ | |
55 | #define kfd_alloc_struct(ptr_to_struct) \ | |
56 | ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL)) | |
57 | ||
19f6d2a6 | 58 | #define KFD_MAX_NUM_OF_PROCESSES 512 |
b8cbab04 | 59 | #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024 |
19f6d2a6 OG |
60 | |
61 | /* | |
b8cbab04 OG |
62 | * Kernel module parameter to specify maximum number of supported queues per |
63 | * device | |
19f6d2a6 | 64 | */ |
b8cbab04 | 65 | extern int max_num_of_queues_per_device; |
19f6d2a6 | 66 | |
b8cbab04 OG |
67 | #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE_DEFAULT 4096 |
68 | #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \ | |
69 | (KFD_MAX_NUM_OF_PROCESSES * \ | |
70 | KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) | |
19f6d2a6 | 71 | |
ed6e6a34 BG |
72 | #define KFD_KERNEL_QUEUE_SIZE 2048 |
73 | ||
31c21fec BG |
74 | /* Kernel module parameter to specify the scheduling policy */ |
75 | extern int sched_policy; | |
76 | ||
81663016 OG |
77 | /* |
78 | * Kernel module parameter to specify whether to send sigterm to HSA process on | |
79 | * unhandled exception | |
80 | */ | |
81 | extern int send_sigterm; | |
82 | ||
31c21fec BG |
83 | /** |
84 | * enum kfd_sched_policy | |
85 | * | |
86 | * @KFD_SCHED_POLICY_HWS: H/W scheduling policy known as command processor (cp) | |
87 | * scheduling. In this scheduling mode we're using the firmware code to | |
88 | * schedule the user mode queues and kernel queues such as HIQ and DIQ. | |
89 | * the HIQ queue is used as a special queue that dispatches the configuration | |
90 | * to the cp and the user mode queues list that are currently running. | |
91 | * the DIQ queue is a debugging queue that dispatches debugging commands to the | |
92 | * firmware. | |
93 | * in this scheduling mode user mode queues over subscription feature is | |
94 | * enabled. | |
95 | * | |
96 | * @KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION: The same as above but the over | |
97 | * subscription feature disabled. | |
98 | * | |
99 | * @KFD_SCHED_POLICY_NO_HWS: no H/W scheduling policy is a mode which directly | |
100 | * set the command processor registers and sets the queues "manually". This | |
101 | * mode is used *ONLY* for debugging proposes. | |
102 | * | |
103 | */ | |
104 | enum kfd_sched_policy { | |
105 | KFD_SCHED_POLICY_HWS = 0, | |
106 | KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION, | |
107 | KFD_SCHED_POLICY_NO_HWS | |
108 | }; | |
109 | ||
ed6e6a34 BG |
110 | enum cache_policy { |
111 | cache_policy_coherent, | |
112 | cache_policy_noncoherent | |
113 | }; | |
114 | ||
0da7558c BG |
115 | enum asic_family_type { |
116 | CHIP_KAVERI = 0, | |
117 | CHIP_CARRIZO | |
118 | }; | |
119 | ||
f3a39818 AL |
120 | struct kfd_event_interrupt_class { |
121 | bool (*interrupt_isr)(struct kfd_dev *dev, | |
122 | const uint32_t *ih_ring_entry); | |
123 | void (*interrupt_wq)(struct kfd_dev *dev, | |
124 | const uint32_t *ih_ring_entry); | |
125 | }; | |
126 | ||
4a488a7a | 127 | struct kfd_device_info { |
0da7558c | 128 | unsigned int asic_family; |
f3a39818 | 129 | const struct kfd_event_interrupt_class *event_interrupt_class; |
4a488a7a | 130 | unsigned int max_pasid_bits; |
992839ad | 131 | unsigned int max_no_of_hqd; |
4a488a7a | 132 | size_t ih_ring_entry_size; |
f7c826ad | 133 | uint8_t num_of_watch_points; |
19f6d2a6 | 134 | uint16_t mqd_size_aligned; |
4a488a7a OG |
135 | }; |
136 | ||
36b5c08f OG |
137 | struct kfd_mem_obj { |
138 | uint32_t range_start; | |
139 | uint32_t range_end; | |
140 | uint64_t gpu_addr; | |
141 | uint32_t *cpu_ptr; | |
142 | }; | |
143 | ||
4a488a7a OG |
144 | struct kfd_dev { |
145 | struct kgd_dev *kgd; | |
146 | ||
147 | const struct kfd_device_info *device_info; | |
148 | struct pci_dev *pdev; | |
149 | ||
150 | unsigned int id; /* topology stub index */ | |
151 | ||
19f6d2a6 OG |
152 | phys_addr_t doorbell_base; /* Start of actual doorbells used by |
153 | * KFD. It is aligned for mapping | |
154 | * into user mode | |
155 | */ | |
156 | size_t doorbell_id_offset; /* Doorbell offset (from KFD doorbell | |
157 | * to HW doorbell, GFX reserved some | |
158 | * at the start) | |
159 | */ | |
160 | size_t doorbell_process_limit; /* Number of processes we have doorbell | |
161 | * space for. | |
162 | */ | |
163 | u32 __iomem *doorbell_kernel_ptr; /* This is a pointer for a doorbells | |
164 | * page used by kernel queue | |
165 | */ | |
166 | ||
4a488a7a OG |
167 | struct kgd2kfd_shared_resources shared_resources; |
168 | ||
cea405b1 XZ |
169 | const struct kfd2kgd_calls *kfd2kgd; |
170 | struct mutex doorbell_mutex; | |
f761d8bd JP |
171 | DECLARE_BITMAP(doorbell_available_index, |
172 | KFD_MAX_NUM_OF_QUEUES_PER_PROCESS); | |
cea405b1 | 173 | |
36b5c08f OG |
174 | void *gtt_mem; |
175 | uint64_t gtt_start_gpu_addr; | |
176 | void *gtt_start_cpu_ptr; | |
177 | void *gtt_sa_bitmap; | |
178 | struct mutex gtt_sa_lock; | |
179 | unsigned int gtt_sa_chunk_size; | |
180 | unsigned int gtt_sa_num_of_chunks; | |
181 | ||
2249d558 AL |
182 | /* Interrupts */ |
183 | void *interrupt_ring; | |
184 | size_t interrupt_ring_size; | |
185 | atomic_t interrupt_ring_rptr; | |
186 | atomic_t interrupt_ring_wptr; | |
187 | struct work_struct interrupt_work; | |
188 | spinlock_t interrupt_lock; | |
189 | ||
ed6e6a34 BG |
190 | /* QCM Device instance */ |
191 | struct device_queue_manager *dqm; | |
4a488a7a | 192 | |
ed6e6a34 | 193 | bool init_complete; |
2249d558 AL |
194 | /* |
195 | * Interrupts of interest to KFD are copied | |
196 | * from the HW ring into a SW ring. | |
197 | */ | |
198 | bool interrupts_active; | |
fbeb661b YS |
199 | |
200 | /* Debug manager */ | |
201 | struct kfd_dbgmgr *dbgmgr; | |
4a488a7a OG |
202 | }; |
203 | ||
204 | /* KGD2KFD callbacks */ | |
205 | void kgd2kfd_exit(void); | |
cea405b1 XZ |
206 | struct kfd_dev *kgd2kfd_probe(struct kgd_dev *kgd, |
207 | struct pci_dev *pdev, const struct kfd2kgd_calls *f2g); | |
4a488a7a | 208 | bool kgd2kfd_device_init(struct kfd_dev *kfd, |
cea405b1 | 209 | const struct kgd2kfd_shared_resources *gpu_resources); |
4a488a7a OG |
210 | void kgd2kfd_device_exit(struct kfd_dev *kfd); |
211 | ||
19f6d2a6 OG |
212 | enum kfd_mempool { |
213 | KFD_MEMPOOL_SYSTEM_CACHEABLE = 1, | |
214 | KFD_MEMPOOL_SYSTEM_WRITECOMBINE = 2, | |
215 | KFD_MEMPOOL_FRAMEBUFFER = 3, | |
216 | }; | |
217 | ||
4a488a7a OG |
218 | /* Character device interface */ |
219 | int kfd_chardev_init(void); | |
220 | void kfd_chardev_exit(void); | |
221 | struct device *kfd_chardev(void); | |
222 | ||
241f24f8 BG |
223 | /** |
224 | * enum kfd_preempt_type_filter | |
225 | * | |
226 | * @KFD_PREEMPT_TYPE_FILTER_SINGLE_QUEUE: Preempts single queue. | |
227 | * | |
228 | * @KFD_PRERMPT_TYPE_FILTER_ALL_QUEUES: Preempts all queues in the | |
229 | * running queues list. | |
230 | * | |
231 | * @KFD_PRERMPT_TYPE_FILTER_BY_PASID: Preempts queues that belongs to | |
232 | * specific process. | |
233 | * | |
234 | */ | |
235 | enum kfd_preempt_type_filter { | |
236 | KFD_PREEMPT_TYPE_FILTER_SINGLE_QUEUE, | |
237 | KFD_PREEMPT_TYPE_FILTER_ALL_QUEUES, | |
992839ad | 238 | KFD_PREEMPT_TYPE_FILTER_DYNAMIC_QUEUES, |
241f24f8 BG |
239 | KFD_PREEMPT_TYPE_FILTER_BY_PASID |
240 | }; | |
19f6d2a6 | 241 | |
6e99df57 BG |
242 | enum kfd_preempt_type { |
243 | KFD_PREEMPT_TYPE_WAVEFRONT, | |
244 | KFD_PREEMPT_TYPE_WAVEFRONT_RESET | |
245 | }; | |
246 | ||
ed8aab45 BG |
247 | /** |
248 | * enum kfd_queue_type | |
249 | * | |
250 | * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type. | |
251 | * | |
252 | * @KFD_QUEUE_TYPE_SDMA: Sdma user mode queue type. | |
253 | * | |
254 | * @KFD_QUEUE_TYPE_HIQ: HIQ queue type. | |
255 | * | |
256 | * @KFD_QUEUE_TYPE_DIQ: DIQ queue type. | |
257 | */ | |
258 | enum kfd_queue_type { | |
259 | KFD_QUEUE_TYPE_COMPUTE, | |
260 | KFD_QUEUE_TYPE_SDMA, | |
261 | KFD_QUEUE_TYPE_HIQ, | |
262 | KFD_QUEUE_TYPE_DIQ | |
263 | }; | |
264 | ||
6e99df57 BG |
265 | enum kfd_queue_format { |
266 | KFD_QUEUE_FORMAT_PM4, | |
267 | KFD_QUEUE_FORMAT_AQL | |
268 | }; | |
269 | ||
ed8aab45 BG |
270 | /** |
271 | * struct queue_properties | |
272 | * | |
273 | * @type: The queue type. | |
274 | * | |
275 | * @queue_id: Queue identifier. | |
276 | * | |
277 | * @queue_address: Queue ring buffer address. | |
278 | * | |
279 | * @queue_size: Queue ring buffer size. | |
280 | * | |
281 | * @priority: Defines the queue priority relative to other queues in the | |
282 | * process. | |
283 | * This is just an indication and HW scheduling may override the priority as | |
284 | * necessary while keeping the relative prioritization. | |
285 | * the priority granularity is from 0 to f which f is the highest priority. | |
286 | * currently all queues are initialized with the highest priority. | |
287 | * | |
288 | * @queue_percent: This field is partially implemented and currently a zero in | |
289 | * this field defines that the queue is non active. | |
290 | * | |
291 | * @read_ptr: User space address which points to the number of dwords the | |
292 | * cp read from the ring buffer. This field updates automatically by the H/W. | |
293 | * | |
294 | * @write_ptr: Defines the number of dwords written to the ring buffer. | |
295 | * | |
296 | * @doorbell_ptr: This field aim is to notify the H/W of new packet written to | |
297 | * the queue ring buffer. This field should be similar to write_ptr and the user | |
298 | * should update this field after he updated the write_ptr. | |
299 | * | |
300 | * @doorbell_off: The doorbell offset in the doorbell pci-bar. | |
301 | * | |
302 | * @is_interop: Defines if this is a interop queue. Interop queue means that the | |
303 | * queue can access both graphics and compute resources. | |
304 | * | |
305 | * @is_active: Defines if the queue is active or not. | |
306 | * | |
307 | * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid | |
308 | * of the queue. | |
309 | * | |
310 | * This structure represents the queue properties for each queue no matter if | |
311 | * it's user mode or kernel mode queue. | |
312 | * | |
313 | */ | |
314 | struct queue_properties { | |
315 | enum kfd_queue_type type; | |
6e99df57 | 316 | enum kfd_queue_format format; |
ed8aab45 BG |
317 | unsigned int queue_id; |
318 | uint64_t queue_address; | |
319 | uint64_t queue_size; | |
320 | uint32_t priority; | |
321 | uint32_t queue_percent; | |
322 | uint32_t *read_ptr; | |
323 | uint32_t *write_ptr; | |
5cd78de5 | 324 | uint32_t __iomem *doorbell_ptr; |
ed8aab45 BG |
325 | uint32_t doorbell_off; |
326 | bool is_interop; | |
327 | bool is_active; | |
328 | /* Not relevant for user mode queues in cp scheduling */ | |
329 | unsigned int vmid; | |
77669eb8 BG |
330 | /* Relevant only for sdma queues*/ |
331 | uint32_t sdma_engine_id; | |
332 | uint32_t sdma_queue_id; | |
333 | uint32_t sdma_vm_addr; | |
ff3d04a1 BG |
334 | /* Relevant only for VI */ |
335 | uint64_t eop_ring_buffer_address; | |
336 | uint32_t eop_ring_buffer_size; | |
337 | uint64_t ctx_save_restore_area_address; | |
338 | uint32_t ctx_save_restore_area_size; | |
ed8aab45 BG |
339 | }; |
340 | ||
341 | /** | |
342 | * struct queue | |
343 | * | |
344 | * @list: Queue linked list. | |
345 | * | |
346 | * @mqd: The queue MQD. | |
347 | * | |
348 | * @mqd_mem_obj: The MQD local gpu memory object. | |
349 | * | |
350 | * @gart_mqd_addr: The MQD gart mc address. | |
351 | * | |
352 | * @properties: The queue properties. | |
353 | * | |
354 | * @mec: Used only in no cp scheduling mode and identifies to micro engine id | |
355 | * that the queue should be execute on. | |
356 | * | |
357 | * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe id. | |
358 | * | |
359 | * @queue: Used only in no cp scheduliong mode and identifies the queue's slot. | |
360 | * | |
361 | * @process: The kfd process that created this queue. | |
362 | * | |
363 | * @device: The kfd device that created this queue. | |
364 | * | |
365 | * This structure represents user mode compute queues. | |
366 | * It contains all the necessary data to handle such queues. | |
367 | * | |
368 | */ | |
369 | ||
370 | struct queue { | |
371 | struct list_head list; | |
372 | void *mqd; | |
373 | struct kfd_mem_obj *mqd_mem_obj; | |
374 | uint64_t gart_mqd_addr; | |
375 | struct queue_properties properties; | |
376 | ||
377 | uint32_t mec; | |
378 | uint32_t pipe; | |
379 | uint32_t queue; | |
380 | ||
77669eb8 BG |
381 | unsigned int sdma_id; |
382 | ||
ed8aab45 BG |
383 | struct kfd_process *process; |
384 | struct kfd_dev *device; | |
385 | }; | |
386 | ||
6e99df57 BG |
387 | /* |
388 | * Please read the kfd_mqd_manager.h description. | |
389 | */ | |
390 | enum KFD_MQD_TYPE { | |
85d258f9 BG |
391 | KFD_MQD_TYPE_COMPUTE = 0, /* for no cp scheduling */ |
392 | KFD_MQD_TYPE_HIQ, /* for hiq */ | |
393 | KFD_MQD_TYPE_CP, /* for cp queues and diq */ | |
394 | KFD_MQD_TYPE_SDMA, /* for sdma queues */ | |
6e99df57 BG |
395 | KFD_MQD_TYPE_MAX |
396 | }; | |
397 | ||
241f24f8 BG |
398 | struct scheduling_resources { |
399 | unsigned int vmid_mask; | |
400 | enum kfd_queue_type type; | |
401 | uint64_t queue_mask; | |
402 | uint64_t gws_mask; | |
403 | uint32_t oac_mask; | |
404 | uint32_t gds_heap_base; | |
405 | uint32_t gds_heap_size; | |
406 | }; | |
407 | ||
408 | struct process_queue_manager { | |
409 | /* data */ | |
410 | struct kfd_process *process; | |
411 | unsigned int num_concurrent_processes; | |
412 | struct list_head queues; | |
413 | unsigned long *queue_slot_bitmap; | |
414 | }; | |
415 | ||
416 | struct qcm_process_device { | |
417 | /* The Device Queue Manager that owns this data */ | |
418 | struct device_queue_manager *dqm; | |
419 | struct process_queue_manager *pqm; | |
241f24f8 BG |
420 | /* Queues list */ |
421 | struct list_head queues_list; | |
422 | struct list_head priv_queue_list; | |
423 | ||
424 | unsigned int queue_count; | |
425 | unsigned int vmid; | |
426 | bool is_debug; | |
427 | /* | |
428 | * All the memory management data should be here too | |
429 | */ | |
430 | uint64_t gds_context_area; | |
431 | uint32_t sh_mem_config; | |
432 | uint32_t sh_mem_bases; | |
433 | uint32_t sh_mem_ape1_base; | |
434 | uint32_t sh_mem_ape1_limit; | |
435 | uint32_t page_table_base; | |
436 | uint32_t gds_size; | |
437 | uint32_t num_gws; | |
438 | uint32_t num_oac; | |
439 | }; | |
440 | ||
19f6d2a6 OG |
441 | /* Data that is per-process-per device. */ |
442 | struct kfd_process_device { | |
443 | /* | |
444 | * List of all per-device data for a process. | |
445 | * Starts from kfd_process.per_device_data. | |
446 | */ | |
447 | struct list_head per_device_list; | |
448 | ||
449 | /* The device that owns this data. */ | |
450 | struct kfd_dev *dev; | |
451 | ||
452 | ||
45102048 BG |
453 | /* per-process-per device QCM data structure */ |
454 | struct qcm_process_device qpd; | |
455 | ||
19f6d2a6 OG |
456 | /*Apertures*/ |
457 | uint64_t lds_base; | |
458 | uint64_t lds_limit; | |
459 | uint64_t gpuvm_base; | |
460 | uint64_t gpuvm_limit; | |
461 | uint64_t scratch_base; | |
462 | uint64_t scratch_limit; | |
463 | ||
464 | /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */ | |
465 | bool bound; | |
a82918f1 BG |
466 | |
467 | /* This flag tells if we should reset all | |
468 | * wavefronts on process termination | |
469 | */ | |
470 | bool reset_wavefronts; | |
19f6d2a6 OG |
471 | }; |
472 | ||
52a5fdce AS |
473 | #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd) |
474 | ||
4a488a7a OG |
475 | /* Process data */ |
476 | struct kfd_process { | |
19f6d2a6 OG |
477 | /* |
478 | * kfd_process are stored in an mm_struct*->kfd_process* | |
479 | * hash table (kfd_processes in kfd_process.c) | |
480 | */ | |
481 | struct hlist_node kfd_processes; | |
482 | ||
483 | struct mm_struct *mm; | |
484 | ||
485 | struct mutex mutex; | |
486 | ||
487 | /* | |
488 | * In any process, the thread that started main() is the lead | |
489 | * thread and outlives the rest. | |
490 | * It is here because amd_iommu_bind_pasid wants a task_struct. | |
491 | */ | |
492 | struct task_struct *lead_thread; | |
493 | ||
494 | /* We want to receive a notification when the mm_struct is destroyed */ | |
495 | struct mmu_notifier mmu_notifier; | |
496 | ||
497 | /* Use for delayed freeing of kfd_process structure */ | |
498 | struct rcu_head rcu; | |
499 | ||
500 | unsigned int pasid; | |
501 | ||
502 | /* | |
503 | * List of kfd_process_device structures, | |
504 | * one for each device the process is using. | |
505 | */ | |
506 | struct list_head per_device_data; | |
507 | ||
45102048 BG |
508 | struct process_queue_manager pqm; |
509 | ||
19f6d2a6 OG |
510 | /* The process's queues. */ |
511 | size_t queue_array_size; | |
512 | ||
513 | /* Size is queue_array_size, up to MAX_PROCESS_QUEUES. */ | |
514 | struct kfd_queue **queues; | |
515 | ||
19f6d2a6 OG |
516 | /*Is the user space process 32 bit?*/ |
517 | bool is_32bit_user_mode; | |
f3a39818 AL |
518 | |
519 | /* Event-related data */ | |
520 | struct mutex event_mutex; | |
521 | /* All events in process hashed by ID, linked on kfd_event.events. */ | |
522 | DECLARE_HASHTABLE(events, 4); | |
523 | struct list_head signal_event_pages; /* struct slot_page_header. | |
524 | event_pages */ | |
525 | u32 next_nonsignal_event_id; | |
526 | size_t signal_event_count; | |
4a488a7a OG |
527 | }; |
528 | ||
76baee6c OG |
529 | /** |
530 | * Ioctl function type. | |
531 | * | |
532 | * \param filep pointer to file structure. | |
533 | * \param p amdkfd process pointer. | |
534 | * \param data pointer to arg that was copied from user. | |
535 | */ | |
536 | typedef int amdkfd_ioctl_t(struct file *filep, struct kfd_process *p, | |
537 | void *data); | |
538 | ||
539 | struct amdkfd_ioctl_desc { | |
540 | unsigned int cmd; | |
541 | int flags; | |
542 | amdkfd_ioctl_t *func; | |
543 | unsigned int cmd_drv; | |
544 | const char *name; | |
545 | }; | |
546 | ||
19f6d2a6 OG |
547 | void kfd_process_create_wq(void); |
548 | void kfd_process_destroy_wq(void); | |
549 | struct kfd_process *kfd_create_process(const struct task_struct *); | |
550 | struct kfd_process *kfd_get_process(const struct task_struct *); | |
f3a39818 | 551 | struct kfd_process *kfd_lookup_process_by_pasid(unsigned int pasid); |
19f6d2a6 | 552 | |
64c7f8cf BG |
553 | struct kfd_process_device *kfd_bind_process_to_device(struct kfd_dev *dev, |
554 | struct kfd_process *p); | |
b17f068a | 555 | void kfd_unbind_process_from_device(struct kfd_dev *dev, unsigned int pasid); |
19f6d2a6 | 556 | struct kfd_process_device *kfd_get_process_device_data(struct kfd_dev *dev, |
093c7d8c AS |
557 | struct kfd_process *p); |
558 | struct kfd_process_device *kfd_create_process_device_data(struct kfd_dev *dev, | |
559 | struct kfd_process *p); | |
19f6d2a6 | 560 | |
775921ed AS |
561 | /* Process device data iterator */ |
562 | struct kfd_process_device *kfd_get_first_process_device_data(struct kfd_process *p); | |
563 | struct kfd_process_device *kfd_get_next_process_device_data(struct kfd_process *p, | |
564 | struct kfd_process_device *pdd); | |
565 | bool kfd_has_process_device_data(struct kfd_process *p); | |
566 | ||
19f6d2a6 OG |
567 | /* PASIDs */ |
568 | int kfd_pasid_init(void); | |
569 | void kfd_pasid_exit(void); | |
570 | bool kfd_set_pasid_limit(unsigned int new_limit); | |
571 | unsigned int kfd_get_pasid_limit(void); | |
572 | unsigned int kfd_pasid_alloc(void); | |
573 | void kfd_pasid_free(unsigned int pasid); | |
574 | ||
575 | /* Doorbells */ | |
576 | void kfd_doorbell_init(struct kfd_dev *kfd); | |
577 | int kfd_doorbell_mmap(struct kfd_process *process, struct vm_area_struct *vma); | |
578 | u32 __iomem *kfd_get_kernel_doorbell(struct kfd_dev *kfd, | |
579 | unsigned int *doorbell_off); | |
580 | void kfd_release_kernel_doorbell(struct kfd_dev *kfd, u32 __iomem *db_addr); | |
581 | u32 read_kernel_doorbell(u32 __iomem *db); | |
582 | void write_kernel_doorbell(u32 __iomem *db, u32 value); | |
583 | unsigned int kfd_queue_id_to_doorbell(struct kfd_dev *kfd, | |
584 | struct kfd_process *process, | |
585 | unsigned int queue_id); | |
586 | ||
6e81090b OG |
587 | /* GTT Sub-Allocator */ |
588 | ||
589 | int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size, | |
590 | struct kfd_mem_obj **mem_obj); | |
591 | ||
592 | int kfd_gtt_sa_free(struct kfd_dev *kfd, struct kfd_mem_obj *mem_obj); | |
593 | ||
4a488a7a OG |
594 | extern struct device *kfd_device; |
595 | ||
5b5c4e40 EP |
596 | /* Topology */ |
597 | int kfd_topology_init(void); | |
598 | void kfd_topology_shutdown(void); | |
599 | int kfd_topology_add_device(struct kfd_dev *gpu); | |
600 | int kfd_topology_remove_device(struct kfd_dev *gpu); | |
601 | struct kfd_dev *kfd_device_by_id(uint32_t gpu_id); | |
602 | struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev); | |
603 | struct kfd_dev *kfd_topology_enum_kfd_devices(uint8_t idx); | |
604 | ||
4a488a7a | 605 | /* Interrupts */ |
2249d558 AL |
606 | int kfd_interrupt_init(struct kfd_dev *dev); |
607 | void kfd_interrupt_exit(struct kfd_dev *dev); | |
b3f5e6b4 | 608 | void kgd2kfd_interrupt(struct kfd_dev *kfd, const void *ih_ring_entry); |
2249d558 AL |
609 | bool enqueue_ih_ring_entry(struct kfd_dev *kfd, const void *ih_ring_entry); |
610 | bool interrupt_is_wanted(struct kfd_dev *dev, const uint32_t *ih_ring_entry); | |
4a488a7a OG |
611 | |
612 | /* Power Management */ | |
b3f5e6b4 AL |
613 | void kgd2kfd_suspend(struct kfd_dev *kfd); |
614 | int kgd2kfd_resume(struct kfd_dev *kfd); | |
4a488a7a | 615 | |
19f6d2a6 OG |
616 | /* amdkfd Apertures */ |
617 | int kfd_init_apertures(struct kfd_process *process); | |
618 | ||
ed6e6a34 | 619 | /* Queue Context Management */ |
241f24f8 BG |
620 | inline uint32_t lower_32(uint64_t x); |
621 | inline uint32_t upper_32(uint64_t x); | |
77669eb8 BG |
622 | struct cik_sdma_rlc_registers *get_sdma_mqd(void *mqd); |
623 | inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m); | |
241f24f8 | 624 | |
ed6e6a34 BG |
625 | int init_queue(struct queue **q, struct queue_properties properties); |
626 | void uninit_queue(struct queue *q); | |
45102048 | 627 | void print_queue_properties(struct queue_properties *q); |
ed6e6a34 BG |
628 | void print_queue(struct queue *q); |
629 | ||
64c7f8cf BG |
630 | struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type, |
631 | struct kfd_dev *dev); | |
4b8f589b BG |
632 | struct mqd_manager *mqd_manager_init_cik(enum KFD_MQD_TYPE type, |
633 | struct kfd_dev *dev); | |
634 | struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type, | |
635 | struct kfd_dev *dev); | |
64c7f8cf BG |
636 | struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev); |
637 | void device_queue_manager_uninit(struct device_queue_manager *dqm); | |
241f24f8 BG |
638 | struct kernel_queue *kernel_queue_init(struct kfd_dev *dev, |
639 | enum kfd_queue_type type); | |
640 | void kernel_queue_uninit(struct kernel_queue *kq); | |
641 | ||
45102048 BG |
642 | /* Process Queue Manager */ |
643 | struct process_queue_node { | |
644 | struct queue *q; | |
645 | struct kernel_queue *kq; | |
646 | struct list_head process_queue_list; | |
647 | }; | |
648 | ||
649 | int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p); | |
650 | void pqm_uninit(struct process_queue_manager *pqm); | |
651 | int pqm_create_queue(struct process_queue_manager *pqm, | |
652 | struct kfd_dev *dev, | |
653 | struct file *f, | |
654 | struct queue_properties *properties, | |
655 | unsigned int flags, | |
656 | enum kfd_queue_type type, | |
657 | unsigned int *qid); | |
658 | int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid); | |
659 | int pqm_update_queue(struct process_queue_manager *pqm, unsigned int qid, | |
660 | struct queue_properties *p); | |
fbeb661b YS |
661 | struct kernel_queue *pqm_get_kernel_queue(struct process_queue_manager *pqm, |
662 | unsigned int qid); | |
45102048 | 663 | |
788bf83d YS |
664 | int amdkfd_fence_wait_timeout(unsigned int *fence_addr, |
665 | unsigned int fence_value, | |
666 | unsigned long timeout); | |
667 | ||
ed6e6a34 BG |
668 | /* Packet Manager */ |
669 | ||
241f24f8 BG |
670 | #define KFD_HIQ_TIMEOUT (500) |
671 | ||
64c7f8cf BG |
672 | #define KFD_FENCE_COMPLETED (100) |
673 | #define KFD_FENCE_INIT (10) | |
241f24f8 BG |
674 | #define KFD_UNMAP_LATENCY (150) |
675 | ||
ed6e6a34 BG |
676 | struct packet_manager { |
677 | struct device_queue_manager *dqm; | |
678 | struct kernel_queue *priv_queue; | |
679 | struct mutex lock; | |
680 | bool allocated; | |
681 | struct kfd_mem_obj *ib_buffer_obj; | |
682 | }; | |
683 | ||
64c7f8cf BG |
684 | int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm); |
685 | void pm_uninit(struct packet_manager *pm); | |
686 | int pm_send_set_resources(struct packet_manager *pm, | |
687 | struct scheduling_resources *res); | |
688 | int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues); | |
689 | int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address, | |
690 | uint32_t fence_value); | |
691 | ||
692 | int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type, | |
693 | enum kfd_preempt_type_filter mode, | |
694 | uint32_t filter_param, bool reset, | |
695 | unsigned int sdma_engine); | |
696 | ||
241f24f8 BG |
697 | void pm_release_ib(struct packet_manager *pm); |
698 | ||
19f6d2a6 OG |
699 | uint64_t kfd_get_number_elems(struct kfd_dev *kfd); |
700 | phys_addr_t kfd_get_process_doorbells(struct kfd_dev *dev, | |
701 | struct kfd_process *process); | |
702 | ||
f3a39818 AL |
703 | /* Events */ |
704 | extern const struct kfd_event_interrupt_class event_interrupt_class_cik; | |
930c5ff4 | 705 | extern const struct kfd_device_global_init_class device_global_init_class_cik; |
f3a39818 AL |
706 | |
707 | enum kfd_event_wait_result { | |
708 | KFD_WAIT_COMPLETE, | |
709 | KFD_WAIT_TIMEOUT, | |
710 | KFD_WAIT_ERROR | |
711 | }; | |
712 | ||
713 | void kfd_event_init_process(struct kfd_process *p); | |
714 | void kfd_event_free_process(struct kfd_process *p); | |
715 | int kfd_event_mmap(struct kfd_process *process, struct vm_area_struct *vma); | |
716 | int kfd_wait_on_events(struct kfd_process *p, | |
59d3e8be | 717 | uint32_t num_events, void __user *data, |
f3a39818 AL |
718 | bool all, uint32_t user_timeout_ms, |
719 | enum kfd_event_wait_result *wait_result); | |
720 | void kfd_signal_event_interrupt(unsigned int pasid, uint32_t partial_id, | |
721 | uint32_t valid_id_bits); | |
59d3e8be AS |
722 | void kfd_signal_iommu_event(struct kfd_dev *dev, |
723 | unsigned int pasid, unsigned long address, | |
724 | bool is_write_requested, bool is_execute_requested); | |
930c5ff4 | 725 | void kfd_signal_hw_exception_event(unsigned int pasid); |
f3a39818 AL |
726 | int kfd_set_event(struct kfd_process *p, uint32_t event_id); |
727 | int kfd_reset_event(struct kfd_process *p, uint32_t event_id); | |
728 | int kfd_event_create(struct file *devkfd, struct kfd_process *p, | |
729 | uint32_t event_type, bool auto_reset, uint32_t node_id, | |
730 | uint32_t *event_id, uint32_t *event_trigger_data, | |
731 | uint64_t *event_page_offset, uint32_t *event_slot_index); | |
732 | int kfd_event_destroy(struct kfd_process *p, uint32_t event_id); | |
733 | ||
c3447e81 BG |
734 | int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct kfd_process *p); |
735 | ||
4a488a7a | 736 | #endif |