Merge tag 'sound-4.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[deliverable/linux.git] / drivers / gpu / drm / amd / amdkfd / kfd_topology.h
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1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23#ifndef __KFD_TOPOLOGY_H__
24#define __KFD_TOPOLOGY_H__
25
26#include <linux/types.h>
27#include <linux/list.h>
28#include "kfd_priv.h"
29
30#define KFD_TOPOLOGY_PUBLIC_NAME_SIZE 128
31
32#define HSA_CAP_HOT_PLUGGABLE 0x00000001
33#define HSA_CAP_ATS_PRESENT 0x00000002
34#define HSA_CAP_SHARED_WITH_GRAPHICS 0x00000004
35#define HSA_CAP_QUEUE_SIZE_POW2 0x00000008
36#define HSA_CAP_QUEUE_SIZE_32BIT 0x00000010
37#define HSA_CAP_QUEUE_IDLE_EVENT 0x00000020
38#define HSA_CAP_VA_LIMIT 0x00000040
39#define HSA_CAP_WATCH_POINTS_SUPPORTED 0x00000080
40#define HSA_CAP_WATCH_POINTS_TOTALBITS_MASK 0x00000f00
41#define HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT 8
42#define HSA_CAP_RESERVED 0xfffff000
43
44struct kfd_node_properties {
45 uint32_t cpu_cores_count;
46 uint32_t simd_count;
47 uint32_t mem_banks_count;
48 uint32_t caches_count;
49 uint32_t io_links_count;
50 uint32_t cpu_core_id_base;
51 uint32_t simd_id_base;
52 uint32_t capability;
53 uint32_t max_waves_per_simd;
54 uint32_t lds_size_in_kb;
55 uint32_t gds_size_in_kb;
56 uint32_t wave_front_size;
57 uint32_t array_count;
58 uint32_t simd_arrays_per_engine;
59 uint32_t cu_per_simd_array;
60 uint32_t simd_per_cu;
61 uint32_t max_slots_scratch_cu;
62 uint32_t engine_id;
63 uint32_t vendor_id;
64 uint32_t device_id;
65 uint32_t location_id;
66 uint32_t max_engine_clk_fcompute;
67 uint32_t max_engine_clk_ccompute;
68 uint16_t marketing_name[KFD_TOPOLOGY_PUBLIC_NAME_SIZE];
69};
70
71#define HSA_MEM_HEAP_TYPE_SYSTEM 0
72#define HSA_MEM_HEAP_TYPE_FB_PUBLIC 1
73#define HSA_MEM_HEAP_TYPE_FB_PRIVATE 2
74#define HSA_MEM_HEAP_TYPE_GPU_GDS 3
75#define HSA_MEM_HEAP_TYPE_GPU_LDS 4
76#define HSA_MEM_HEAP_TYPE_GPU_SCRATCH 5
77
78#define HSA_MEM_FLAGS_HOT_PLUGGABLE 0x00000001
79#define HSA_MEM_FLAGS_NON_VOLATILE 0x00000002
80#define HSA_MEM_FLAGS_RESERVED 0xfffffffc
81
82struct kfd_mem_properties {
83 struct list_head list;
84 uint32_t heap_type;
85 uint64_t size_in_bytes;
86 uint32_t flags;
87 uint32_t width;
88 uint32_t mem_clk_max;
89 struct kobject *kobj;
90 struct attribute attr;
91};
92
93#define KFD_TOPOLOGY_CPU_SIBLINGS 256
94
95#define HSA_CACHE_TYPE_DATA 0x00000001
96#define HSA_CACHE_TYPE_INSTRUCTION 0x00000002
97#define HSA_CACHE_TYPE_CPU 0x00000004
98#define HSA_CACHE_TYPE_HSACU 0x00000008
99#define HSA_CACHE_TYPE_RESERVED 0xfffffff0
100
101struct kfd_cache_properties {
102 struct list_head list;
103 uint32_t processor_id_low;
104 uint32_t cache_level;
105 uint32_t cache_size;
106 uint32_t cacheline_size;
107 uint32_t cachelines_per_tag;
108 uint32_t cache_assoc;
109 uint32_t cache_latency;
110 uint32_t cache_type;
111 uint8_t sibling_map[KFD_TOPOLOGY_CPU_SIBLINGS];
112 struct kobject *kobj;
113 struct attribute attr;
114};
115
116struct kfd_iolink_properties {
117 struct list_head list;
118 uint32_t iolink_type;
119 uint32_t ver_maj;
120 uint32_t ver_min;
121 uint32_t node_from;
122 uint32_t node_to;
123 uint32_t weight;
124 uint32_t min_latency;
125 uint32_t max_latency;
126 uint32_t min_bandwidth;
127 uint32_t max_bandwidth;
128 uint32_t rec_transfer_size;
129 uint32_t flags;
130 struct kobject *kobj;
131 struct attribute attr;
132};
133
134struct kfd_topology_device {
135 struct list_head list;
136 uint32_t gpu_id;
137 struct kfd_node_properties node_props;
138 uint32_t mem_bank_count;
139 struct list_head mem_props;
140 uint32_t cache_count;
141 struct list_head cache_props;
142 uint32_t io_link_count;
143 struct list_head io_link_props;
144 struct kfd_dev *gpu;
145 struct kobject *kobj_node;
146 struct kobject *kobj_mem;
147 struct kobject *kobj_cache;
148 struct kobject *kobj_iolink;
149 struct attribute attr_gpuid;
150 struct attribute attr_name;
151 struct attribute attr_props;
152};
153
154struct kfd_system_properties {
155 uint32_t num_devices; /* Number of H-NUMA nodes */
156 uint32_t generation_count;
157 uint64_t platform_oem;
158 uint64_t platform_id;
159 uint64_t platform_rev;
160 struct kobject *kobj_topology;
161 struct kobject *kobj_nodes;
162 struct attribute attr_genid;
163 struct attribute attr_props;
164};
165
166
167
168#endif /* __KFD_TOPOLOGY_H__ */
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