projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 3bace359 JZ |
1 | /* |
| 2 | * Copyright 2015 Advanced Micro Devices, Inc. | |
| 3 | * | |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
| 5 | * copy of this software and associated documentation files (the "Software"), | |
| 6 | * to deal in the Software without restriction, including without limitation | |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | |
| 9 | * Software is furnished to do so, subject to the following conditions: | |
| 10 | * | |
| 11 | * The above copyright notice and this permission notice shall be included in | |
| 12 | * all copies or substantial portions of the Software. | |
| 13 | * | |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 21 | * | |
| 22 | */ | |
| 23 | #include <linux/errno.h> | |
| 24 | #include "hwmgr.h" | |
| 25 | #include "hardwaremanager.h" | |
| 26 | #include "pp_acpi.h" | |
| 27 | #include "amd_acpi.h" | |
| 28 | ||
| 29 | void phm_init_dynamic_caps(struct pp_hwmgr *hwmgr) | |
| 30 | { | |
| 31 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableVoltageTransition); | |
| 32 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableEngineTransition); | |
| 33 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableMemoryTransition); | |
| 34 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableMGClockGating); | |
| 35 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableMGCGTSSM); | |
| 36 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableLSClockGating); | |
| 37 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_Force3DClockSupport); | |
| 38 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableLightSleep); | |
| 39 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableMCLS); | |
| 40 | phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisablePowerGating); | |
| 41 | ||
| 42 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableDPM); | |
| 43 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DisableSMUUVDHandshake); | |
| 44 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ThermalAutoThrottling); | |
| 45 | ||
| 46 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PCIEPerformanceRequest); | |
| 47 | ||
| 48 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_NoOD5Support); | |
| 49 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_UserMaxClockForMultiDisplays); | |
| 50 | ||
| 51 | phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_VpuRecoveryInProgress); | |
| 52 | ||
| 53 | if (acpi_atcs_functions_supported(hwmgr->device, ATCS_FUNCTION_PCIE_PERFORMANCE_REQUEST) && | |
| 54 | acpi_atcs_functions_supported(hwmgr->device, ATCS_FUNCTION_PCIE_DEVICE_READY_NOTIFICATION)) | |
| 55 | phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PCIEPerformanceRequest); | |
| 56 | } | |
| 57 | ||
| 58 | int phm_setup_asic(struct pp_hwmgr *hwmgr) | |
| 59 | { | |
| 60 | if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, | |
| 61 | PHM_PlatformCaps_TablelessHardwareInterface)) { | |
| 62 | if (NULL != hwmgr->hwmgr_func->asic_setup) | |
| 63 | return hwmgr->hwmgr_func->asic_setup(hwmgr); | |
| 64 | } else { | |
| 65 | return phm_dispatch_table (hwmgr, &(hwmgr->setup_asic), | |
| 66 | NULL, NULL); | |
| 67 | } | |
| 68 | ||
| 69 | return 0; | |
| 70 | } | |
| 71 | ||
| 72 | int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr) | |
| 73 | { | |
| 74 | if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, | |
| 75 | PHM_PlatformCaps_TablelessHardwareInterface)) { | |
| 76 | if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable) | |
| 77 | return hwmgr->hwmgr_func->dynamic_state_management_enable(hwmgr); | |
| 78 | } else { | |
| 79 | return phm_dispatch_table (hwmgr, | |
| 80 | &(hwmgr->enable_dynamic_state_management), | |
| 81 | NULL, NULL); | |
| 82 | } | |
| 83 | return 0; | |
| 84 | } |