Merge tag 'staging-4.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[deliverable/linux.git] / drivers / gpu / drm / amd / powerplay / hwmgr / hwmgr_ppt.h
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c82baa28 1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef PP_HWMGR_PPT_H
25#define PP_HWMGR_PPT_H
26
27#include "hardwaremanager.h"
28#include "smumgr.h"
29#include "atom-types.h"
30
31struct phm_ppt_v1_clock_voltage_dependency_record {
32 uint32_t clk;
33 uint8_t vddInd;
34 uint16_t vdd_offset;
35 uint16_t vddc;
36 uint16_t vddgfx;
37 uint16_t vddci;
38 uint16_t mvdd;
39 uint8_t phases;
40 uint8_t cks_enable;
41 uint8_t cks_voffset;
42};
43
44typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;
45
46struct phm_ppt_v1_clock_voltage_dependency_table {
47 uint32_t count; /* Number of entries. */
48 phm_ppt_v1_clock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
49};
50
51typedef struct phm_ppt_v1_clock_voltage_dependency_table phm_ppt_v1_clock_voltage_dependency_table;
52
53
54/* Multimedia Clock Voltage Dependency records and table */
55struct phm_ppt_v1_mm_clock_voltage_dependency_record {
56 uint32_t dclk; /* UVD D-clock */
57 uint32_t vclk; /* UVD V-clock */
58 uint32_t eclk; /* VCE clock */
59 uint32_t aclk; /* ACP clock */
60 uint32_t samclock; /* SAMU clock */
61 uint8_t vddcInd;
62 uint16_t vddgfx_offset;
63 uint16_t vddc;
64 uint16_t vddgfx;
65 uint8_t phases;
66};
67typedef struct phm_ppt_v1_mm_clock_voltage_dependency_record phm_ppt_v1_mm_clock_voltage_dependency_record;
68
69struct phm_ppt_v1_mm_clock_voltage_dependency_table {
70 uint32_t count; /* Number of entries. */
71 phm_ppt_v1_mm_clock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
72};
73typedef struct phm_ppt_v1_mm_clock_voltage_dependency_table phm_ppt_v1_mm_clock_voltage_dependency_table;
74
75struct phm_ppt_v1_voltage_lookup_record {
76 uint16_t us_calculated;
77 uint16_t us_vdd; /* Base voltage */
78 uint16_t us_cac_low;
79 uint16_t us_cac_mid;
80 uint16_t us_cac_high;
81};
82typedef struct phm_ppt_v1_voltage_lookup_record phm_ppt_v1_voltage_lookup_record;
83
84struct phm_ppt_v1_voltage_lookup_table {
85 uint32_t count;
86 phm_ppt_v1_voltage_lookup_record entries[1]; /* Dynamically allocate count entries. */
87};
88typedef struct phm_ppt_v1_voltage_lookup_table phm_ppt_v1_voltage_lookup_table;
89
90/* PCIE records and Table */
91
92struct phm_ppt_v1_pcie_record {
93 uint8_t gen_speed;
94 uint8_t lane_width;
95};
96typedef struct phm_ppt_v1_pcie_record phm_ppt_v1_pcie_record;
97
98struct phm_ppt_v1_pcie_table {
99 uint32_t count; /* Number of entries. */
100 phm_ppt_v1_pcie_record entries[1]; /* Dynamically allocate count entries. */
101};
102typedef struct phm_ppt_v1_pcie_table phm_ppt_v1_pcie_table;
103
104#endif
105
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