[deliverable/linux.git] / drivers / gpu / drm / amd / scheduler / gpu_scheduler.h

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef _GPU_SCHEDULER_H_
#define _GPU_SCHEDULER_H_

#include <linux/kfifo.h>
#include <linux/fence.h>

struct amd_gpu_scheduler;
struct amd_sched_rq;

extern struct kmem_cache *sched_fence_slab;
extern atomic_t sched_fence_slab_ref;

/**
 * A scheduler entity is a wrapper around a job queue or a group
 * of other entities. Entities take turns emitting jobs from their
 * job queues to corresponding hardware ring based on scheduling
 * policy.
*/
struct amd_sched_entity {
	struct list_head		list;
	struct amd_sched_rq		*rq;
	struct amd_gpu_scheduler	*sched;

	spinlock_t			queue_lock;
	struct kfifo                    job_queue;

	atomic_t			fence_seq;
	uint64_t                        fence_context;

	struct fence			*dependency;
	struct fence_cb			cb;
};

/**
 * Run queue is a set of entities scheduling command submissions for
 * one specific ring. It implements the scheduling policy that selects
 * the next entity to emit commands from.
*/
struct amd_sched_rq {
	spinlock_t		lock;
	struct list_head	entities;
	struct amd_sched_entity	*current_entity;
};

struct amd_sched_fence {
	struct fence                    scheduled;
	struct fence                    finished;
	struct fence_cb                 cb;
	struct fence                    *parent;
	struct amd_gpu_scheduler	*sched;
	spinlock_t			lock;
	void                            *owner;
};

struct amd_sched_job {
	struct amd_gpu_scheduler        *sched;
	struct amd_sched_entity         *s_entity;
	struct amd_sched_fence          *s_fence;
	struct fence_cb			finish_cb;
	struct work_struct		finish_work;
	struct list_head		node;
	struct delayed_work		work_tdr;
};

extern const struct fence_ops amd_sched_fence_ops_scheduled;
extern const struct fence_ops amd_sched_fence_ops_finished;
static inline struct amd_sched_fence *to_amd_sched_fence(struct fence *f)
{
	if (f->ops == &amd_sched_fence_ops_scheduled)
		return container_of(f, struct amd_sched_fence, scheduled);

	if (f->ops == &amd_sched_fence_ops_finished)
		return container_of(f, struct amd_sched_fence, finished);

	return NULL;
}

/**
 * Define the backend operations called by the scheduler,
 * these functions should be implemented in driver side
*/
struct amd_sched_backend_ops {
	struct fence *(*dependency)(struct amd_sched_job *sched_job);
	struct fence *(*run_job)(struct amd_sched_job *sched_job);
	void (*timedout_job)(struct amd_sched_job *sched_job);
	void (*free_job)(struct amd_sched_job *sched_job);
};

enum amd_sched_priority {
	AMD_SCHED_PRIORITY_KERNEL = 0,
	AMD_SCHED_PRIORITY_NORMAL,
	AMD_SCHED_MAX_PRIORITY
};

/**
 * One scheduler is implemented for each hardware ring
*/
struct amd_gpu_scheduler {
	const struct amd_sched_backend_ops	*ops;
	uint32_t			hw_submission_limit;
	long				timeout;
	const char			*name;
	struct amd_sched_rq		sched_rq[AMD_SCHED_MAX_PRIORITY];
	wait_queue_head_t		wake_up_worker;
	wait_queue_head_t		job_scheduled;
	atomic_t			hw_rq_count;
	struct task_struct		*thread;
	struct list_head	ring_mirror_list;
	spinlock_t			job_list_lock;
};

int amd_sched_init(struct amd_gpu_scheduler *sched,
		   const struct amd_sched_backend_ops *ops,
		   uint32_t hw_submission, long timeout, const char *name);
void amd_sched_fini(struct amd_gpu_scheduler *sched);

int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
			  struct amd_sched_entity *entity,
			  struct amd_sched_rq *rq,
			  uint32_t jobs);
void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
			   struct amd_sched_entity *entity);
void amd_sched_entity_push_job(struct amd_sched_job *sched_job);

struct amd_sched_fence *amd_sched_fence_create(
	struct amd_sched_entity *s_entity, void *owner);
void amd_sched_fence_scheduled(struct amd_sched_fence *fence);
void amd_sched_fence_finished(struct amd_sched_fence *fence);
int amd_sched_job_init(struct amd_sched_job *job,
		       struct amd_gpu_scheduler *sched,
		       struct amd_sched_entity *entity,
		       void *owner);
void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched);
void amd_sched_job_recovery(struct amd_gpu_scheduler *sched);
#endif
Commit	Line	Data
a72ce6f8 JZ	1	/*
	2	* Copyright 2015 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	*/
	23
	24	#ifndef _GPU_SCHEDULER_H_
	25	#define _GPU_SCHEDULER_H_
	26
	27	#include <linux/kfifo.h>
4cef9267	28	#include <linux/fence.h>
a72ce6f8	29
a72ce6f8	30	struct amd_gpu_scheduler;
432a4ff8	31	struct amd_sched_rq;
a72ce6f8	32
f5617f9d CZ	33	extern struct kmem_cache *sched_fence_slab;
	34	extern atomic_t sched_fence_slab_ref;
	35
a72ce6f8 JZ	36	/**
a72ce6f8 JZ	37	* A scheduler entity is a wrapper around a job queue or a group
e472d258	38	* of other entities. Entities take turns emitting jobs from their
a72ce6f8 JZ	39	* job queues to corresponding hardware ring based on scheduling
	40	* policy.
	41	*/
	42	struct amd_sched_entity {
	43	struct list_head list;
0f75aee7 CK	44	struct amd_sched_rq *rq;
	45	struct amd_gpu_scheduler *sched;
	46
91404fb2	47	spinlock_t queue_lock;
0f75aee7 CK	48	struct kfifo job_queue;
	49
	50	atomic_t fence_seq;
f556cb0c	51	uint64_t fence_context;
0f75aee7	52
e61235db CK	53	struct fence *dependency;
e61235db CK	54	struct fence_cb cb;
a72ce6f8 JZ	55	};
	56
	57	/**
	58	* Run queue is a set of entities scheduling command submissions for
	59	* one specific ring. It implements the scheduling policy that selects
	60	* the next entity to emit commands from.
	61	*/
432a4ff8	62	struct amd_sched_rq {
2b184d8d	63	spinlock_t lock;
432a4ff8 CK	64	struct list_head entities;
432a4ff8 CK	65	struct amd_sched_entity *current_entity;
a72ce6f8 JZ	66	};
a72ce6f8 JZ	67
f556cb0c	68	struct amd_sched_fence {
6fc13675 CK	69	struct fence scheduled;
6fc13675 CK	70	struct fence finished;
258f3f99	71	struct fence_cb cb;
754ce0fa	72	struct fence *parent;
9b398fa5	73	struct amd_gpu_scheduler *sched;
f556cb0c	74	spinlock_t lock;
84f76ea6	75	void *owner;
f556cb0c CZ	76	};
f556cb0c CZ	77
4cef9267	78	struct amd_sched_job {
4cef9267	79	struct amd_gpu_scheduler *sched;
953e8fd4	80	struct amd_sched_entity *s_entity;
f556cb0c	81	struct amd_sched_fence *s_fence;
c5f74f78 CK	82	struct fence_cb finish_cb;
	83	struct work_struct finish_work;
	84	struct list_head node;
	85	struct delayed_work work_tdr;
4cef9267 CZ	86	};
4cef9267 CZ	87
6fc13675 CK	88	extern const struct fence_ops amd_sched_fence_ops_scheduled;
6fc13675 CK	89	extern const struct fence_ops amd_sched_fence_ops_finished;
f556cb0c CZ	90	static inline struct amd_sched_fence to_amd_sched_fence(struct fence f)
f556cb0c CZ	91	{
6fc13675 CK	92	if (f->ops == &amd_sched_fence_ops_scheduled)
6fc13675 CK	93	return container_of(f, struct amd_sched_fence, scheduled);
f556cb0c	94
6fc13675 CK	95	if (f->ops == &amd_sched_fence_ops_finished)
6fc13675 CK	96	return container_of(f, struct amd_sched_fence, finished);
f556cb0c CZ	97
	98	return NULL;
	99	}
	100
a72ce6f8 JZ	101	/**
	102	* Define the backend operations called by the scheduler,
	103	* these functions should be implemented in driver side
	104	*/
	105	struct amd_sched_backend_ops {
4c7eb91c JZ	106	struct fence (dependency)(struct amd_sched_job *sched_job);
4c7eb91c JZ	107	struct fence (run_job)(struct amd_sched_job *sched_job);
0e51a772	108	void (timedout_job)(struct amd_sched_job sched_job);
c5f74f78	109	void (free_job)(struct amd_sched_job sched_job);
a72ce6f8 JZ	110	};
a72ce6f8 JZ	111
d033a6de CZ	112	enum amd_sched_priority {
	113	AMD_SCHED_PRIORITY_KERNEL = 0,
	114	AMD_SCHED_PRIORITY_NORMAL,
	115	AMD_SCHED_MAX_PRIORITY
	116	};
	117
a72ce6f8 JZ	118	/**
	119	* One scheduler is implemented for each hardware ring
	120	*/
	121	struct amd_gpu_scheduler {
62250a91	122	const struct amd_sched_backend_ops *ops;
4f839a24	123	uint32_t hw_submission_limit;
2440ff2c	124	long timeout;
4f839a24	125	const char *name;
d033a6de	126	struct amd_sched_rq sched_rq[AMD_SCHED_MAX_PRIORITY];
c2b6bd7e CK	127	wait_queue_head_t wake_up_worker;
c2b6bd7e CK	128	wait_queue_head_t job_scheduled;
4f839a24 CK	129	atomic_t hw_rq_count;
4f839a24 CK	130	struct task_struct *thread;
4835096b ML	131	struct list_head ring_mirror_list;
4835096b ML	132	spinlock_t job_list_lock;
a72ce6f8 JZ	133	};
a72ce6f8 JZ	134
4f839a24	135	int amd_sched_init(struct amd_gpu_scheduler *sched,
62250a91	136	const struct amd_sched_backend_ops *ops,
2440ff2c	137	uint32_t hw_submission, long timeout, const char *name);
4f839a24	138	void amd_sched_fini(struct amd_gpu_scheduler *sched);
a72ce6f8	139
91404fb2 CK	140	int amd_sched_entity_init(struct amd_gpu_scheduler *sched,
91404fb2 CK	141	struct amd_sched_entity *entity,
432a4ff8	142	struct amd_sched_rq *rq,
91404fb2	143	uint32_t jobs);
062c7fb3 CK	144	void amd_sched_entity_fini(struct amd_gpu_scheduler *sched,
062c7fb3 CK	145	struct amd_sched_entity *entity);
e2840221	146	void amd_sched_entity_push_job(struct amd_sched_job *sched_job);
a72ce6f8	147
f556cb0c	148	struct amd_sched_fence *amd_sched_fence_create(
84f76ea6	149	struct amd_sched_entity s_entity, void owner);
393a0bd4	150	void amd_sched_fence_scheduled(struct amd_sched_fence *fence);
6fc13675	151	void amd_sched_fence_finished(struct amd_sched_fence *fence);
e686941a	152	int amd_sched_job_init(struct amd_sched_job *job,
16a7133f CK	153	struct amd_gpu_scheduler *sched,
16a7133f CK	154	struct amd_sched_entity *entity,
595a9cd6	155	void *owner);
e686e75d	156	void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched);
ec75f573	157	void amd_sched_job_recovery(struct amd_gpu_scheduler *sched);
a72ce6f8	158	#endif