Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
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1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
f453ba04
DA
33#include "drmP.h"
34#include "drm_edid.h"
38fcbb67 35#include "drm_edid_modes.h"
f453ba04 36
13931579
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37#define version_greater(edid, maj, min) \
38 (((edid)->version > (maj)) || \
39 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 40
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41#define EDID_EST_TIMINGS 16
42#define EDID_STD_TIMINGS 8
43#define EDID_DETAILED_TIMINGS 4
f453ba04
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44
45/*
46 * EDID blocks out in the wild have a variety of bugs, try to collect
47 * them here (note that userspace may work around broken monitors first,
48 * but fixes should make their way here so that the kernel "just works"
49 * on as many displays as possible).
50 */
51
52/* First detailed mode wrong, use largest 60Hz mode */
53#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
54/* Reported 135MHz pixel clock is too high, needs adjustment */
55#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
56/* Prefer the largest mode at 75 Hz */
57#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
58/* Detail timing is in cm not mm */
59#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
60/* Detailed timing descriptors have bogus size values, so just take the
61 * maximum size and use that.
62 */
63#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
64/* Monitor forgot to set the first detailed is preferred bit. */
65#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
66/* use +hsync +vsync for detailed mode */
67#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3c537889 68
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69struct detailed_mode_closure {
70 struct drm_connector *connector;
71 struct edid *edid;
72 bool preferred;
73 u32 quirks;
74 int modes;
75};
f453ba04 76
5c61259e
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77#define LEVEL_DMT 0
78#define LEVEL_GTF 1
7a374350
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79#define LEVEL_GTF2 2
80#define LEVEL_CVT 3
5c61259e 81
f453ba04
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82static struct edid_quirk {
83 char *vendor;
84 int product_id;
85 u32 quirks;
86} edid_quirk_list[] = {
87 /* Acer AL1706 */
88 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
89 /* Acer F51 */
90 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
91 /* Unknown Acer */
92 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
93
94 /* Belinea 10 15 55 */
95 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
96 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
97
98 /* Envision Peripherals, Inc. EN-7100e */
99 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
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100 /* Envision EN2028 */
101 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
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102
103 /* Funai Electronics PM36B */
104 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
105 EDID_QUIRK_DETAILED_IN_CM },
106
107 /* LG Philips LCD LP154W01-A5 */
108 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
109 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
110
111 /* Philips 107p5 CRT */
112 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
113
114 /* Proview AY765C */
115 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
116
117 /* Samsung SyncMaster 205BW. Note: irony */
118 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
119 /* Samsung SyncMaster 22[5-6]BW */
120 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
121 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
122};
123
61e57a8d 124/*** DDC fetch and block validation ***/
f453ba04 125
083ae056
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126static const u8 edid_header[] = {
127 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
128};
f453ba04 129
61e57a8d
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130/*
131 * Sanity check the EDID block (base or extension). Return 0 if the block
132 * doesn't check out, or 1 if it's valid.
f453ba04 133 */
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134static bool
135drm_edid_block_valid(u8 *raw_edid)
f453ba04 136{
61e57a8d 137 int i;
f453ba04 138 u8 csum = 0;
61e57a8d 139 struct edid *edid = (struct edid *)raw_edid;
f453ba04 140
61e57a8d
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141 if (raw_edid[0] == 0x00) {
142 int score = 0;
862b89c0 143
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144 for (i = 0; i < sizeof(edid_header); i++)
145 if (raw_edid[i] == edid_header[i])
146 score++;
147
148 if (score == 8) ;
149 else if (score >= 6) {
150 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
151 memcpy(raw_edid, edid_header, sizeof(edid_header));
152 } else {
153 goto bad;
154 }
155 }
f453ba04
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156
157 for (i = 0; i < EDID_LENGTH; i++)
158 csum += raw_edid[i];
159 if (csum) {
160 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
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AJ
161
162 /* allow CEA to slide through, switches mangle this */
163 if (raw_edid[0] != 0x02)
164 goto bad;
f453ba04
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165 }
166
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167 /* per-block-type checks */
168 switch (raw_edid[0]) {
169 case 0: /* base */
170 if (edid->version != 1) {
171 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
172 goto bad;
173 }
862b89c0 174
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175 if (edid->revision > 4)
176 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
177 break;
862b89c0 178
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179 default:
180 break;
181 }
47ee4ccf 182
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183 return 1;
184
185bad:
186 if (raw_edid) {
f49dadb8 187 printk(KERN_ERR "Raw EDID:\n");
f453ba04 188 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
f49dadb8 189 printk(KERN_ERR "\n");
f453ba04
DA
190 }
191 return 0;
192}
61e57a8d
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193
194/**
195 * drm_edid_is_valid - sanity check EDID data
196 * @edid: EDID data
197 *
198 * Sanity-check an entire EDID record (including extensions)
199 */
200bool drm_edid_is_valid(struct edid *edid)
201{
202 int i;
203 u8 *raw = (u8 *)edid;
204
205 if (!edid)
206 return false;
207
208 for (i = 0; i <= edid->extensions; i++)
209 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
210 return false;
211
212 return true;
213}
3c537889 214EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 215
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216#define DDC_ADDR 0x50
217#define DDC_SEGMENT_ADDR 0x30
218/**
219 * Get EDID information via I2C.
220 *
221 * \param adapter : i2c device adaptor
222 * \param buf : EDID data buffer to be filled
223 * \param len : EDID data buffer length
224 * \return 0 on success or -1 on failure.
225 *
226 * Try to fetch EDID information by calling i2c driver function.
227 */
228static int
229drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
230 int block, int len)
231{
232 unsigned char start = block * EDID_LENGTH;
4819d2e4
CW
233 int ret, retries = 5;
234
235 /* The core i2c driver will automatically retry the transfer if the
236 * adapter reports EAGAIN. However, we find that bit-banging transfers
237 * are susceptible to errors under a heavily loaded machine and
238 * generate spurious NAKs and timeouts. Retrying the transfer
239 * of the individual block a few times seems to overcome this.
240 */
241 do {
242 struct i2c_msg msgs[] = {
243 {
244 .addr = DDC_ADDR,
245 .flags = 0,
246 .len = 1,
247 .buf = &start,
248 }, {
249 .addr = DDC_ADDR,
250 .flags = I2C_M_RD,
251 .len = len,
252 .buf = buf,
253 }
254 };
255 ret = i2c_transfer(adapter, msgs, 2);
256 } while (ret != 2 && --retries);
257
258 return ret == 2 ? 0 : -1;
61e57a8d
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259}
260
4a9a8b71
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261static bool drm_edid_is_zero(u8 *in_edid, int length)
262{
263 int i;
264 u32 *raw_edid = (u32 *)in_edid;
265
266 for (i = 0; i < length / 4; i++)
267 if (*(raw_edid + i) != 0)
268 return false;
269 return true;
270}
271
61e57a8d
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272static u8 *
273drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
274{
0ea75e23 275 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
276 u8 *block, *new;
277
278 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
279 return NULL;
280
281 /* base block fetch */
282 for (i = 0; i < 4; i++) {
283 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
284 goto out;
285 if (drm_edid_block_valid(block))
286 break;
4a9a8b71
DA
287 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
288 connector->null_edid_counter++;
289 goto carp;
290 }
61e57a8d
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291 }
292 if (i == 4)
293 goto carp;
294
295 /* if there's no extensions, we're done */
296 if (block[0x7e] == 0)
297 return block;
298
299 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
300 if (!new)
301 goto out;
302 block = new;
303
304 for (j = 1; j <= block[0x7e]; j++) {
305 for (i = 0; i < 4; i++) {
0ea75e23
ST
306 if (drm_do_probe_ddc_edid(adapter,
307 block + (valid_extensions + 1) * EDID_LENGTH,
308 j, EDID_LENGTH))
61e57a8d 309 goto out;
0ea75e23
ST
310 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {
311 valid_extensions++;
61e57a8d 312 break;
0ea75e23 313 }
61e57a8d
AJ
314 }
315 if (i == 4)
0ea75e23
ST
316 dev_warn(connector->dev->dev,
317 "%s: Ignoring invalid EDID block %d.\n",
318 drm_get_connector_name(connector), j);
319 }
320
321 if (valid_extensions != block[0x7e]) {
322 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
323 block[0x7e] = valid_extensions;
324 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
325 if (!new)
326 goto out;
327 block = new;
61e57a8d
AJ
328 }
329
330 return block;
331
332carp:
dcdb1674 333 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
334 drm_get_connector_name(connector), j);
335
336out:
337 kfree(block);
338 return NULL;
339}
340
341/**
342 * Probe DDC presence.
343 *
344 * \param adapter : i2c device adaptor
345 * \return 1 on success
346 */
347static bool
348drm_probe_ddc(struct i2c_adapter *adapter)
349{
350 unsigned char out;
351
352 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
353}
354
355/**
356 * drm_get_edid - get EDID data, if available
357 * @connector: connector we're probing
358 * @adapter: i2c adapter to use for DDC
359 *
360 * Poke the given i2c channel to grab EDID data if possible. If found,
361 * attach it to the connector.
362 *
363 * Return edid data or NULL if we couldn't find any.
364 */
365struct edid *drm_get_edid(struct drm_connector *connector,
366 struct i2c_adapter *adapter)
367{
368 struct edid *edid = NULL;
369
370 if (drm_probe_ddc(adapter))
371 edid = (struct edid *)drm_do_get_edid(connector, adapter);
372
373 connector->display_info.raw_edid = (char *)edid;
374
375 return edid;
376
377}
378EXPORT_SYMBOL(drm_get_edid);
379
380/*** EDID parsing ***/
381
f453ba04
DA
382/**
383 * edid_vendor - match a string against EDID's obfuscated vendor field
384 * @edid: EDID to match
385 * @vendor: vendor string
386 *
387 * Returns true if @vendor is in @edid, false otherwise
388 */
389static bool edid_vendor(struct edid *edid, char *vendor)
390{
391 char edid_vendor[3];
392
393 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
394 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
395 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 396 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
397
398 return !strncmp(edid_vendor, vendor, 3);
399}
400
401/**
402 * edid_get_quirks - return quirk flags for a given EDID
403 * @edid: EDID to process
404 *
405 * This tells subsequent routines what fixes they need to apply.
406 */
407static u32 edid_get_quirks(struct edid *edid)
408{
409 struct edid_quirk *quirk;
410 int i;
411
412 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
413 quirk = &edid_quirk_list[i];
414
415 if (edid_vendor(edid, quirk->vendor) &&
416 (EDID_PRODUCT_ID(edid) == quirk->product_id))
417 return quirk->quirks;
418 }
419
420 return 0;
421}
422
423#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
424#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
425
f453ba04
DA
426/**
427 * edid_fixup_preferred - set preferred modes based on quirk list
428 * @connector: has mode list to fix up
429 * @quirks: quirks list
430 *
431 * Walk the mode list for @connector, clearing the preferred status
432 * on existing modes and setting it anew for the right mode ala @quirks.
433 */
434static void edid_fixup_preferred(struct drm_connector *connector,
435 u32 quirks)
436{
437 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 438 int target_refresh = 0;
f453ba04
DA
439
440 if (list_empty(&connector->probed_modes))
441 return;
442
443 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
444 target_refresh = 60;
445 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
446 target_refresh = 75;
447
448 preferred_mode = list_first_entry(&connector->probed_modes,
449 struct drm_display_mode, head);
450
451 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
452 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
453
454 if (cur_mode == preferred_mode)
455 continue;
456
457 /* Largest mode is preferred */
458 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
459 preferred_mode = cur_mode;
460
461 /* At a given size, try to get closest to target refresh */
462 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
463 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
464 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
465 preferred_mode = cur_mode;
466 }
467 }
468
469 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
470}
471
1d42bbc8
DA
472struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
473 int hsize, int vsize, int fresh)
559ee21d 474{
b1f559ec 475 struct drm_display_mode *mode = NULL;
07a5e632 476 int i;
559ee21d 477
07a5e632 478 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 479 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
559ee21d
ZY
480 if (hsize == ptr->hdisplay &&
481 vsize == ptr->vdisplay &&
482 fresh == drm_mode_vrefresh(ptr)) {
483 /* get the expected default mode */
484 mode = drm_mode_duplicate(dev, ptr);
485 break;
486 }
487 }
488 return mode;
489}
1d42bbc8 490EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 491
d1ff6409
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492typedef void detailed_cb(struct detailed_timing *timing, void *closure);
493
4d76a221
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494static void
495cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
496{
497 int i, n = 0;
498 u8 rev = ext[0x01], d = ext[0x02];
499 u8 *det_base = ext + d;
500
501 switch (rev) {
502 case 0:
503 /* can't happen */
504 return;
505 case 1:
506 /* have to infer how many blocks we have, check pixel clock */
507 for (i = 0; i < 6; i++)
508 if (det_base[18*i] || det_base[18*i+1])
509 n++;
510 break;
511 default:
512 /* explicit count */
513 n = min(ext[0x03] & 0x0f, 6);
514 break;
515 }
516
517 for (i = 0; i < n; i++)
518 cb((struct detailed_timing *)(det_base + 18 * i), closure);
519}
520
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521static void
522vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
523{
524 unsigned int i, n = min((int)ext[0x02], 6);
525 u8 *det_base = ext + 5;
526
527 if (ext[0x01] != 1)
528 return; /* unknown version */
529
530 for (i = 0; i < n; i++)
531 cb((struct detailed_timing *)(det_base + 18 * i), closure);
532}
533
d1ff6409
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534static void
535drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
536{
537 int i;
538 struct edid *edid = (struct edid *)raw_edid;
539
540 if (edid == NULL)
541 return;
542
543 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
544 cb(&(edid->detailed_timings[i]), closure);
545
4d76a221
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546 for (i = 1; i <= raw_edid[0x7e]; i++) {
547 u8 *ext = raw_edid + (i * EDID_LENGTH);
548 switch (*ext) {
549 case CEA_EXT:
550 cea_for_each_detailed_block(ext, cb, closure);
551 break;
cbba98f8
AJ
552 case VTB_EXT:
553 vtb_for_each_detailed_block(ext, cb, closure);
554 break;
4d76a221
AJ
555 default:
556 break;
557 }
558 }
d1ff6409
AJ
559}
560
561static void
562is_rb(struct detailed_timing *t, void *data)
563{
564 u8 *r = (u8 *)t;
565 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
566 if (r[15] & 0x10)
567 *(bool *)data = true;
568}
569
570/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
571static bool
572drm_monitor_supports_rb(struct edid *edid)
573{
574 if (edid->revision >= 4) {
575 bool ret;
576 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
577 return ret;
578 }
579
580 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
581}
582
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583static void
584find_gtf2(struct detailed_timing *t, void *data)
585{
586 u8 *r = (u8 *)t;
587 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
588 *(u8 **)data = r;
589}
590
591/* Secondary GTF curve kicks in above some break frequency */
592static int
593drm_gtf2_hbreak(struct edid *edid)
594{
595 u8 *r = NULL;
596 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
597 return r ? (r[12] * 2) : 0;
598}
599
600static int
601drm_gtf2_2c(struct edid *edid)
602{
603 u8 *r = NULL;
604 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
605 return r ? r[13] : 0;
606}
607
608static int
609drm_gtf2_m(struct edid *edid)
610{
611 u8 *r = NULL;
612 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
613 return r ? (r[15] << 8) + r[14] : 0;
614}
615
616static int
617drm_gtf2_k(struct edid *edid)
618{
619 u8 *r = NULL;
620 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
621 return r ? r[16] : 0;
622}
623
624static int
625drm_gtf2_2j(struct edid *edid)
626{
627 u8 *r = NULL;
628 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
629 return r ? r[17] : 0;
630}
631
632/**
633 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
634 * @edid: EDID block to scan
635 */
636static int standard_timing_level(struct edid *edid)
637{
638 if (edid->revision >= 2) {
639 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
640 return LEVEL_CVT;
641 if (drm_gtf2_hbreak(edid))
642 return LEVEL_GTF2;
643 return LEVEL_GTF;
644 }
645 return LEVEL_DMT;
646}
647
23425cae
AJ
648/*
649 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
650 * monitors fill with ascii space (0x20) instead.
651 */
652static int
653bad_std_timing(u8 a, u8 b)
654{
655 return (a == 0x00 && b == 0x00) ||
656 (a == 0x01 && b == 0x01) ||
657 (a == 0x20 && b == 0x20);
658}
659
f453ba04
DA
660/**
661 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
662 * @t: standard timing params
5c61259e 663 * @timing_level: standard timing level
f453ba04
DA
664 *
665 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 666 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 667 */
7ca6adb3 668static struct drm_display_mode *
7a374350
AJ
669drm_mode_std(struct drm_connector *connector, struct edid *edid,
670 struct std_timing *t, int revision)
f453ba04 671{
7ca6adb3
AJ
672 struct drm_device *dev = connector->dev;
673 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
674 int hsize, vsize;
675 int vrefresh_rate;
0454beab
MD
676 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
677 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
678 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
679 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 680 int timing_level = standard_timing_level(edid);
5c61259e 681
23425cae
AJ
682 if (bad_std_timing(t->hsize, t->vfreq_aspect))
683 return NULL;
684
5c61259e
ZY
685 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
686 hsize = t->hsize * 8 + 248;
687 /* vrefresh_rate = vfreq + 60 */
688 vrefresh_rate = vfreq + 60;
689 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
690 if (aspect_ratio == 0) {
691 if (revision < 3)
692 vsize = hsize;
693 else
694 vsize = (hsize * 10) / 16;
695 } else if (aspect_ratio == 1)
f453ba04 696 vsize = (hsize * 3) / 4;
0454beab 697 else if (aspect_ratio == 2)
f453ba04
DA
698 vsize = (hsize * 4) / 5;
699 else
700 vsize = (hsize * 9) / 16;
a0910c8e
AJ
701
702 /* HDTV hack, part 1 */
703 if (vrefresh_rate == 60 &&
704 ((hsize == 1360 && vsize == 765) ||
705 (hsize == 1368 && vsize == 769))) {
706 hsize = 1366;
707 vsize = 768;
708 }
709
7ca6adb3
AJ
710 /*
711 * If this connector already has a mode for this size and refresh
712 * rate (because it came from detailed or CVT info), use that
713 * instead. This way we don't have to guess at interlace or
714 * reduced blanking.
715 */
522032da 716 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
717 if (m->hdisplay == hsize && m->vdisplay == vsize &&
718 drm_mode_vrefresh(m) == vrefresh_rate)
719 return NULL;
720
a0910c8e
AJ
721 /* HDTV hack, part 2 */
722 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
723 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 724 false);
559ee21d 725 mode->hdisplay = 1366;
a4967de6
AJ
726 mode->hsync_start = mode->hsync_start - 1;
727 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
728 return mode;
729 }
a0910c8e 730
559ee21d 731 /* check whether it can be found in default mode table */
1d42bbc8 732 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
559ee21d
ZY
733 if (mode)
734 return mode;
735
5c61259e
ZY
736 switch (timing_level) {
737 case LEVEL_DMT:
5c61259e
ZY
738 break;
739 case LEVEL_GTF:
740 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
741 break;
7a374350
AJ
742 case LEVEL_GTF2:
743 /*
744 * This is potentially wrong if there's ever a monitor with
745 * more than one ranges section, each claiming a different
746 * secondary GTF curve. Please don't do that.
747 */
748 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
749 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
750 kfree(mode);
751 mode = drm_gtf_mode_complex(dev, hsize, vsize,
752 vrefresh_rate, 0, 0,
753 drm_gtf2_m(edid),
754 drm_gtf2_2c(edid),
755 drm_gtf2_k(edid),
756 drm_gtf2_2j(edid));
757 }
758 break;
5c61259e 759 case LEVEL_CVT:
d50ba256
DA
760 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
761 false);
5c61259e
ZY
762 break;
763 }
f453ba04
DA
764 return mode;
765}
766
b58db2c6
AJ
767/*
768 * EDID is delightfully ambiguous about how interlaced modes are to be
769 * encoded. Our internal representation is of frame height, but some
770 * HDTV detailed timings are encoded as field height.
771 *
772 * The format list here is from CEA, in frame size. Technically we
773 * should be checking refresh rate too. Whatever.
774 */
775static void
776drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
777 struct detailed_pixel_timing *pt)
778{
779 int i;
780 static const struct {
781 int w, h;
782 } cea_interlaced[] = {
783 { 1920, 1080 },
784 { 720, 480 },
785 { 1440, 480 },
786 { 2880, 480 },
787 { 720, 576 },
788 { 1440, 576 },
789 { 2880, 576 },
790 };
b58db2c6
AJ
791
792 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
793 return;
794
3c581411 795 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
796 if ((mode->hdisplay == cea_interlaced[i].w) &&
797 (mode->vdisplay == cea_interlaced[i].h / 2)) {
798 mode->vdisplay *= 2;
799 mode->vsync_start *= 2;
800 mode->vsync_end *= 2;
801 mode->vtotal *= 2;
802 mode->vtotal |= 1;
803 }
804 }
805
806 mode->flags |= DRM_MODE_FLAG_INTERLACE;
807}
808
f453ba04
DA
809/**
810 * drm_mode_detailed - create a new mode from an EDID detailed timing section
811 * @dev: DRM device (needed to create new mode)
812 * @edid: EDID block
813 * @timing: EDID detailed timing info
814 * @quirks: quirks to apply
815 *
816 * An EDID detailed timing block contains enough info for us to create and
817 * return a new struct drm_display_mode.
818 */
819static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
820 struct edid *edid,
821 struct detailed_timing *timing,
822 u32 quirks)
823{
824 struct drm_display_mode *mode;
825 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
826 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
827 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
828 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
829 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
830 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
831 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
832 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
833 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 834
fc438966 835 /* ignore tiny modes */
0454beab 836 if (hactive < 64 || vactive < 64)
fc438966
AJ
837 return NULL;
838
0454beab 839 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
840 printk(KERN_WARNING "stereo mode not supported\n");
841 return NULL;
842 }
0454beab 843 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 844 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
845 }
846
fcb45611
ZY
847 /* it is incorrect if hsync/vsync width is zero */
848 if (!hsync_pulse_width || !vsync_pulse_width) {
849 DRM_DEBUG_KMS("Incorrect Detailed timing. "
850 "Wrong Hsync/Vsync pulse width\n");
851 return NULL;
852 }
f453ba04
DA
853 mode = drm_mode_create(dev);
854 if (!mode)
855 return NULL;
856
857 mode->type = DRM_MODE_TYPE_DRIVER;
858
859 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
860 timing->pixel_clock = cpu_to_le16(1088);
861
862 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
863
864 mode->hdisplay = hactive;
865 mode->hsync_start = mode->hdisplay + hsync_offset;
866 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
867 mode->htotal = mode->hdisplay + hblank;
868
869 mode->vdisplay = vactive;
870 mode->vsync_start = mode->vdisplay + vsync_offset;
871 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
872 mode->vtotal = mode->vdisplay + vblank;
f453ba04 873
7064fef5
JB
874 /* Some EDIDs have bogus h/vtotal values */
875 if (mode->hsync_end > mode->htotal)
876 mode->htotal = mode->hsync_end + 1;
877 if (mode->vsync_end > mode->vtotal)
878 mode->vtotal = mode->vsync_end + 1;
879
b58db2c6 880 drm_mode_do_interlace_quirk(mode, pt);
f453ba04 881
171fdd89
AJ
882 drm_mode_set_name(mode);
883
f453ba04 884 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 885 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
886 }
887
0454beab
MD
888 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
889 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
890 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
891 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 892
e14cbee4
MD
893 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
894 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
895
896 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
897 mode->width_mm *= 10;
898 mode->height_mm *= 10;
899 }
900
901 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
902 mode->width_mm = edid->width_cm * 10;
903 mode->height_mm = edid->height_cm * 10;
904 }
905
906 return mode;
907}
908
07a5e632 909static bool
b1f559ec 910mode_is_rb(const struct drm_display_mode *mode)
07a5e632 911{
b17e52ef
AJ
912 return (mode->htotal - mode->hdisplay == 160) &&
913 (mode->hsync_end - mode->hdisplay == 80) &&
914 (mode->hsync_end - mode->hsync_start == 32) &&
915 (mode->vsync_start - mode->vdisplay == 3);
916}
07a5e632 917
b17e52ef 918static bool
b1f559ec
CW
919mode_in_hsync_range(const struct drm_display_mode *mode,
920 struct edid *edid, u8 *t)
b17e52ef
AJ
921{
922 int hsync, hmin, hmax;
923
924 hmin = t[7];
925 if (edid->revision >= 4)
926 hmin += ((t[4] & 0x04) ? 255 : 0);
927 hmax = t[8];
928 if (edid->revision >= 4)
929 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 930 hsync = drm_mode_hsync(mode);
07a5e632 931
b17e52ef
AJ
932 return (hsync <= hmax && hsync >= hmin);
933}
934
935static bool
b1f559ec
CW
936mode_in_vsync_range(const struct drm_display_mode *mode,
937 struct edid *edid, u8 *t)
b17e52ef
AJ
938{
939 int vsync, vmin, vmax;
940
941 vmin = t[5];
942 if (edid->revision >= 4)
943 vmin += ((t[4] & 0x01) ? 255 : 0);
944 vmax = t[6];
945 if (edid->revision >= 4)
946 vmax += ((t[4] & 0x02) ? 255 : 0);
947 vsync = drm_mode_vrefresh(mode);
948
949 return (vsync <= vmax && vsync >= vmin);
950}
951
952static u32
953range_pixel_clock(struct edid *edid, u8 *t)
954{
955 /* unspecified */
956 if (t[9] == 0 || t[9] == 255)
957 return 0;
958
959 /* 1.4 with CVT support gives us real precision, yay */
960 if (edid->revision >= 4 && t[10] == 0x04)
961 return (t[9] * 10000) - ((t[12] >> 2) * 250);
962
963 /* 1.3 is pathetic, so fuzz up a bit */
964 return t[9] * 10000 + 5001;
965}
966
b17e52ef 967static bool
b1f559ec 968mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
969 struct detailed_timing *timing)
970{
971 u32 max_clock;
972 u8 *t = (u8 *)timing;
973
974 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
975 return false;
976
b17e52ef 977 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
978 return false;
979
b17e52ef 980 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
981 if (mode->clock > max_clock)
982 return false;
b17e52ef
AJ
983
984 /* 1.4 max horizontal check */
985 if (edid->revision >= 4 && t[10] == 0x04)
986 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
987 return false;
988
989 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
990 return false;
07a5e632
AJ
991
992 return true;
993}
994
995/*
996 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
997 * need to account for them.
998 */
b17e52ef
AJ
999static int
1000drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1001 struct detailed_timing *timing)
07a5e632
AJ
1002{
1003 int i, modes = 0;
1004 struct drm_display_mode *newmode;
1005 struct drm_device *dev = connector->dev;
1006
1007 for (i = 0; i < drm_num_dmt_modes; i++) {
b17e52ef 1008 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
07a5e632
AJ
1009 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1010 if (newmode) {
1011 drm_mode_probed_add(connector, newmode);
1012 modes++;
1013 }
1014 }
1015 }
1016
1017 return modes;
1018}
1019
13931579
AJ
1020static void
1021do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1022{
13931579
AJ
1023 struct detailed_mode_closure *closure = c;
1024 struct detailed_non_pixel *data = &timing->data.other_data;
1025 int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
9340d8cf 1026
13931579
AJ
1027 if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE)
1028 closure->modes += drm_gtf_modes_for_range(closure->connector,
1029 closure->edid,
1030 timing);
1031}
69da3015 1032
13931579
AJ
1033static int
1034add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1035{
1036 struct detailed_mode_closure closure = {
1037 connector, edid, 0, 0, 0
1038 };
9340d8cf 1039
13931579
AJ
1040 if (version_greater(edid, 1, 0))
1041 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1042 &closure);
9340d8cf 1043
13931579 1044 return closure.modes;
9340d8cf
AJ
1045}
1046
2255be14
AJ
1047static int
1048drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1049{
1050 int i, j, m, modes = 0;
1051 struct drm_display_mode *mode;
1052 u8 *est = ((u8 *)timing) + 5;
1053
1054 for (i = 0; i < 6; i++) {
1055 for (j = 7; j > 0; j--) {
1056 m = (i * 8) + (7 - j);
3c581411 1057 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1058 break;
1059 if (est[i] & (1 << j)) {
1d42bbc8
DA
1060 mode = drm_mode_find_dmt(connector->dev,
1061 est3_modes[m].w,
1062 est3_modes[m].h,
1063 est3_modes[m].r
1064 /*, est3_modes[m].rb */);
2255be14
AJ
1065 if (mode) {
1066 drm_mode_probed_add(connector, mode);
1067 modes++;
1068 }
1069 }
1070 }
1071 }
1072
1073 return modes;
1074}
1075
13931579
AJ
1076static void
1077do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1078{
13931579 1079 struct detailed_mode_closure *closure = c;
9cf00977 1080 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1081
13931579
AJ
1082 if (data->type == EDID_DETAIL_EST_TIMINGS)
1083 closure->modes += drm_est3_modes(closure->connector, timing);
1084}
9cf00977 1085
13931579
AJ
1086/**
1087 * add_established_modes - get est. modes from EDID and add them
1088 * @edid: EDID block to scan
1089 *
1090 * Each EDID block contains a bitmap of the supported "established modes" list
1091 * (defined above). Tease them out and add them to the global modes list.
1092 */
1093static int
1094add_established_modes(struct drm_connector *connector, struct edid *edid)
1095{
1096 struct drm_device *dev = connector->dev;
1097 unsigned long est_bits = edid->established_timings.t1 |
1098 (edid->established_timings.t2 << 8) |
1099 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1100 int i, modes = 0;
1101 struct detailed_mode_closure closure = {
1102 connector, edid, 0, 0, 0
1103 };
9cf00977 1104
13931579
AJ
1105 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1106 if (est_bits & (1<<i)) {
1107 struct drm_display_mode *newmode;
1108 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1109 if (newmode) {
1110 drm_mode_probed_add(connector, newmode);
1111 modes++;
1112 }
1113 }
9cf00977
AJ
1114 }
1115
13931579
AJ
1116 if (version_greater(edid, 1, 0))
1117 drm_for_each_detailed_block((u8 *)edid,
1118 do_established_modes, &closure);
1119
1120 return modes + closure.modes;
1121}
1122
1123static void
1124do_standard_modes(struct detailed_timing *timing, void *c)
1125{
1126 struct detailed_mode_closure *closure = c;
1127 struct detailed_non_pixel *data = &timing->data.other_data;
1128 struct drm_connector *connector = closure->connector;
1129 struct edid *edid = closure->edid;
1130
1131 if (data->type == EDID_DETAIL_STD_MODES) {
1132 int i;
9cf00977
AJ
1133 for (i = 0; i < 6; i++) {
1134 struct std_timing *std;
1135 struct drm_display_mode *newmode;
1136
1137 std = &data->data.timings[i];
7a374350
AJ
1138 newmode = drm_mode_std(connector, edid, std,
1139 edid->revision);
9cf00977
AJ
1140 if (newmode) {
1141 drm_mode_probed_add(connector, newmode);
13931579 1142 closure->modes++;
9cf00977
AJ
1143 }
1144 }
9cf00977 1145 }
9cf00977
AJ
1146}
1147
f453ba04 1148/**
13931579 1149 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1150 * @edid: EDID block to scan
f453ba04 1151 *
13931579
AJ
1152 * Standard modes can be calculated using the appropriate standard (DMT,
1153 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1154 */
13931579
AJ
1155static int
1156add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1157{
9cf00977 1158 int i, modes = 0;
13931579
AJ
1159 struct detailed_mode_closure closure = {
1160 connector, edid, 0, 0, 0
1161 };
1162
1163 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1164 struct drm_display_mode *newmode;
1165
1166 newmode = drm_mode_std(connector, edid,
1167 &edid->standard_timings[i],
1168 edid->revision);
1169 if (newmode) {
1170 drm_mode_probed_add(connector, newmode);
1171 modes++;
1172 }
1173 }
1174
1175 if (version_greater(edid, 1, 0))
1176 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1177 &closure);
1178
1179 /* XXX should also look for standard codes in VTB blocks */
1180
1181 return modes + closure.modes;
1182}
f453ba04 1183
13931579
AJ
1184static int drm_cvt_modes(struct drm_connector *connector,
1185 struct detailed_timing *timing)
1186{
1187 int i, j, modes = 0;
1188 struct drm_display_mode *newmode;
1189 struct drm_device *dev = connector->dev;
1190 struct cvt_timing *cvt;
1191 const int rates[] = { 60, 85, 75, 60, 50 };
1192 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1193
13931579
AJ
1194 for (i = 0; i < 4; i++) {
1195 int uninitialized_var(width), height;
1196 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1197
13931579 1198 if (!memcmp(cvt->code, empty, 3))
9cf00977 1199 continue;
f453ba04 1200
13931579
AJ
1201 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1202 switch (cvt->code[1] & 0x0c) {
1203 case 0x00:
1204 width = height * 4 / 3;
1205 break;
1206 case 0x04:
1207 width = height * 16 / 9;
1208 break;
1209 case 0x08:
1210 width = height * 16 / 10;
1211 break;
1212 case 0x0c:
1213 width = height * 15 / 9;
1214 break;
1215 }
1216
1217 for (j = 1; j < 5; j++) {
1218 if (cvt->code[2] & (1 << j)) {
1219 newmode = drm_cvt_mode(dev, width, height,
1220 rates[j], j == 0,
1221 false, false);
1222 if (newmode) {
1223 drm_mode_probed_add(connector, newmode);
1224 modes++;
1225 }
1226 }
1227 }
f453ba04
DA
1228 }
1229
1230 return modes;
1231}
9cf00977 1232
13931579
AJ
1233static void
1234do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1235{
13931579
AJ
1236 struct detailed_mode_closure *closure = c;
1237 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1238
13931579
AJ
1239 if (data->type == EDID_DETAIL_CVT_3BYTE)
1240 closure->modes += drm_cvt_modes(closure->connector, timing);
1241}
882f0219 1242
13931579
AJ
1243static int
1244add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1245{
1246 struct detailed_mode_closure closure = {
1247 connector, edid, 0, 0, 0
1248 };
882f0219 1249
13931579
AJ
1250 if (version_greater(edid, 1, 2))
1251 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1252
13931579 1253 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1254
13931579
AJ
1255 return closure.modes;
1256}
1257
1258static void
1259do_detailed_mode(struct detailed_timing *timing, void *c)
1260{
1261 struct detailed_mode_closure *closure = c;
1262 struct drm_display_mode *newmode;
1263
1264 if (timing->pixel_clock) {
1265 newmode = drm_mode_detailed(closure->connector->dev,
1266 closure->edid, timing,
1267 closure->quirks);
1268 if (!newmode)
1269 return;
1270
1271 if (closure->preferred)
1272 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1273
1274 drm_mode_probed_add(closure->connector, newmode);
1275 closure->modes++;
1276 closure->preferred = 0;
882f0219 1277 }
13931579 1278}
882f0219 1279
13931579
AJ
1280/*
1281 * add_detailed_modes - Add modes from detailed timings
1282 * @connector: attached connector
1283 * @edid: EDID block to scan
1284 * @quirks: quirks to apply
1285 */
1286static int
1287add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1288 u32 quirks)
1289{
1290 struct detailed_mode_closure closure = {
1291 connector,
1292 edid,
1293 1,
1294 quirks,
1295 0
1296 };
1297
1298 if (closure.preferred && !version_greater(edid, 1, 3))
1299 closure.preferred =
1300 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1301
1302 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1303
1304 return closure.modes;
882f0219 1305}
f453ba04 1306
f23c20c8 1307#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1308#define AUDIO_BLOCK 0x01
f23c20c8 1309#define VENDOR_BLOCK 0x03
8fe9790d
ZW
1310#define EDID_BASIC_AUDIO (1 << 6)
1311
f23c20c8 1312/**
8fe9790d 1313 * Search EDID for CEA extension block.
f23c20c8 1314 */
eccaca28 1315u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1316{
8fe9790d
ZW
1317 u8 *edid_ext = NULL;
1318 int i;
f23c20c8
ML
1319
1320 /* No EDID or EDID extensions */
1321 if (edid == NULL || edid->extensions == 0)
8fe9790d 1322 return NULL;
f23c20c8 1323
f23c20c8 1324 /* Find CEA extension */
7466f4cc 1325 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1326 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1327 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1328 break;
1329 }
1330
7466f4cc 1331 if (i == edid->extensions)
8fe9790d
ZW
1332 return NULL;
1333
1334 return edid_ext;
1335}
eccaca28 1336EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d
ZW
1337
1338/**
1339 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1340 * @edid: monitor EDID information
1341 *
1342 * Parse the CEA extension according to CEA-861-B.
1343 * Return true if HDMI, false if not or unknown.
1344 */
1345bool drm_detect_hdmi_monitor(struct edid *edid)
1346{
1347 u8 *edid_ext;
1348 int i, hdmi_id;
1349 int start_offset, end_offset;
1350 bool is_hdmi = false;
1351
1352 edid_ext = drm_find_cea_extension(edid);
1353 if (!edid_ext)
f23c20c8
ML
1354 goto end;
1355
1356 /* Data block offset in CEA extension block */
1357 start_offset = 4;
1358 end_offset = edid_ext[2];
1359
1360 /*
1361 * Because HDMI identifier is in Vendor Specific Block,
1362 * search it from all data blocks of CEA extension.
1363 */
1364 for (i = start_offset; i < end_offset;
1365 /* Increased by data block len */
1366 i += ((edid_ext[i] & 0x1f) + 1)) {
1367 /* Find vendor specific block */
1368 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1369 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1370 edid_ext[i + 3] << 16;
1371 /* Find HDMI identifier */
1372 if (hdmi_id == HDMI_IDENTIFIER)
1373 is_hdmi = true;
1374 break;
1375 }
1376 }
1377
1378end:
1379 return is_hdmi;
1380}
1381EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1382
8fe9790d
ZW
1383/**
1384 * drm_detect_monitor_audio - check monitor audio capability
1385 *
1386 * Monitor should have CEA extension block.
1387 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1388 * audio' only. If there is any audio extension block and supported
1389 * audio format, assume at least 'basic audio' support, even if 'basic
1390 * audio' is not defined in EDID.
1391 *
1392 */
1393bool drm_detect_monitor_audio(struct edid *edid)
1394{
1395 u8 *edid_ext;
1396 int i, j;
1397 bool has_audio = false;
1398 int start_offset, end_offset;
1399
1400 edid_ext = drm_find_cea_extension(edid);
1401 if (!edid_ext)
1402 goto end;
1403
1404 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1405
1406 if (has_audio) {
1407 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1408 goto end;
1409 }
1410
1411 /* Data block offset in CEA extension block */
1412 start_offset = 4;
1413 end_offset = edid_ext[2];
1414
1415 for (i = start_offset; i < end_offset;
1416 i += ((edid_ext[i] & 0x1f) + 1)) {
1417 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1418 has_audio = true;
1419 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1420 DRM_DEBUG_KMS("CEA audio format %d\n",
1421 (edid_ext[i + j] >> 3) & 0xf);
1422 goto end;
1423 }
1424 }
1425end:
1426 return has_audio;
1427}
1428EXPORT_SYMBOL(drm_detect_monitor_audio);
1429
3b11228b
JB
1430/**
1431 * drm_add_display_info - pull display info out if present
1432 * @edid: EDID data
1433 * @info: display info (attached to connector)
1434 *
1435 * Grab any available display info and stuff it into the drm_display_info
1436 * structure that's part of the connector. Useful for tracking bpp and
1437 * color spaces.
1438 */
1439static void drm_add_display_info(struct edid *edid,
1440 struct drm_display_info *info)
1441{
1442 info->width_mm = edid->width_cm * 10;
1443 info->height_mm = edid->height_cm * 10;
1444
1445 /* driver figures it out in this case */
1446 info->bpc = 0;
da05a5a7 1447 info->color_formats = 0;
3b11228b
JB
1448
1449 /* Only defined for 1.4 with digital displays */
1450 if (edid->revision < 4)
1451 return;
1452
1453 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1454 return;
1455
1456 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1457 case DRM_EDID_DIGITAL_DEPTH_6:
1458 info->bpc = 6;
1459 break;
1460 case DRM_EDID_DIGITAL_DEPTH_8:
1461 info->bpc = 8;
1462 break;
1463 case DRM_EDID_DIGITAL_DEPTH_10:
1464 info->bpc = 10;
1465 break;
1466 case DRM_EDID_DIGITAL_DEPTH_12:
1467 info->bpc = 12;
1468 break;
1469 case DRM_EDID_DIGITAL_DEPTH_14:
1470 info->bpc = 14;
1471 break;
1472 case DRM_EDID_DIGITAL_DEPTH_16:
1473 info->bpc = 16;
1474 break;
1475 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1476 default:
1477 info->bpc = 0;
1478 break;
1479 }
da05a5a7
JB
1480
1481 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1482 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444)
1483 info->color_formats = DRM_COLOR_FORMAT_YCRCB444;
1484 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422)
1485 info->color_formats = DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
1486}
1487
f453ba04
DA
1488/**
1489 * drm_add_edid_modes - add modes from EDID data, if available
1490 * @connector: connector we're probing
1491 * @edid: edid data
1492 *
1493 * Add the specified modes to the connector's mode list.
1494 *
1495 * Return number of modes added or 0 if we couldn't find any.
1496 */
1497int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1498{
1499 int num_modes = 0;
1500 u32 quirks;
1501
1502 if (edid == NULL) {
1503 return 0;
1504 }
3c537889 1505 if (!drm_edid_is_valid(edid)) {
dcdb1674 1506 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1507 drm_get_connector_name(connector));
1508 return 0;
1509 }
1510
1511 quirks = edid_get_quirks(edid);
1512
c867df70
AJ
1513 /*
1514 * EDID spec says modes should be preferred in this order:
1515 * - preferred detailed mode
1516 * - other detailed modes from base block
1517 * - detailed modes from extension blocks
1518 * - CVT 3-byte code modes
1519 * - standard timing codes
1520 * - established timing codes
1521 * - modes inferred from GTF or CVT range information
1522 *
13931579 1523 * We get this pretty much right.
c867df70
AJ
1524 *
1525 * XXX order for additional mode types in extension blocks?
1526 */
13931579
AJ
1527 num_modes += add_detailed_modes(connector, edid, quirks);
1528 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1529 num_modes += add_standard_modes(connector, edid);
1530 num_modes += add_established_modes(connector, edid);
13931579 1531 num_modes += add_inferred_modes(connector, edid);
f453ba04
DA
1532
1533 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1534 edid_fixup_preferred(connector, quirks);
1535
3b11228b 1536 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
1537
1538 return num_modes;
1539}
1540EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1541
1542/**
1543 * drm_add_modes_noedid - add modes for the connectors without EDID
1544 * @connector: connector we're probing
1545 * @hdisplay: the horizontal display limit
1546 * @vdisplay: the vertical display limit
1547 *
1548 * Add the specified modes to the connector's mode list. Only when the
1549 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1550 *
1551 * Return number of modes added or 0 if we couldn't find any.
1552 */
1553int drm_add_modes_noedid(struct drm_connector *connector,
1554 int hdisplay, int vdisplay)
1555{
1556 int i, count, num_modes = 0;
b1f559ec 1557 struct drm_display_mode *mode;
f0fda0a4
ZY
1558 struct drm_device *dev = connector->dev;
1559
1560 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1561 if (hdisplay < 0)
1562 hdisplay = 0;
1563 if (vdisplay < 0)
1564 vdisplay = 0;
1565
1566 for (i = 0; i < count; i++) {
b1f559ec 1567 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
1568 if (hdisplay && vdisplay) {
1569 /*
1570 * Only when two are valid, they will be used to check
1571 * whether the mode should be added to the mode list of
1572 * the connector.
1573 */
1574 if (ptr->hdisplay > hdisplay ||
1575 ptr->vdisplay > vdisplay)
1576 continue;
1577 }
f985dedb
AJ
1578 if (drm_mode_vrefresh(ptr) > 61)
1579 continue;
f0fda0a4
ZY
1580 mode = drm_mode_duplicate(dev, ptr);
1581 if (mode) {
1582 drm_mode_probed_add(connector, mode);
1583 num_modes++;
1584 }
1585 }
1586 return num_modes;
1587}
1588EXPORT_SYMBOL(drm_add_modes_noedid);
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