drm/intel: Fix initialization if startup happens in interlaced mode [v2]
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
2d1a8a48 33#include <linux/export.h>
f453ba04
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34#include "drmP.h"
35#include "drm_edid.h"
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
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42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
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45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3c537889 69
13931579
AJ
70struct detailed_mode_closure {
71 struct drm_connector *connector;
72 struct edid *edid;
73 bool preferred;
74 u32 quirks;
75 int modes;
76};
f453ba04 77
5c61259e
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78#define LEVEL_DMT 0
79#define LEVEL_GTF 1
7a374350
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80#define LEVEL_GTF2 2
81#define LEVEL_CVT 3
5c61259e 82
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83static struct edid_quirk {
84 char *vendor;
85 int product_id;
86 u32 quirks;
87} edid_quirk_list[] = {
88 /* Acer AL1706 */
89 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
90 /* Acer F51 */
91 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Unknown Acer */
93 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
94
95 /* Belinea 10 15 55 */
96 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
97 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
98
99 /* Envision Peripherals, Inc. EN-7100e */
100 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
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101 /* Envision EN2028 */
102 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
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DA
103
104 /* Funai Electronics PM36B */
105 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
106 EDID_QUIRK_DETAILED_IN_CM },
107
108 /* LG Philips LCD LP154W01-A5 */
109 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
110 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
111
112 /* Philips 107p5 CRT */
113 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
114
115 /* Proview AY765C */
116 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
117
118 /* Samsung SyncMaster 205BW. Note: irony */
119 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
120 /* Samsung SyncMaster 22[5-6]BW */
121 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
122 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
123};
124
61e57a8d 125/*** DDC fetch and block validation ***/
f453ba04 126
083ae056
AJ
127static const u8 edid_header[] = {
128 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
129};
f453ba04 130
051963d4
TR
131 /*
132 * Sanity check the header of the base EDID block. Return 8 if the header
133 * is perfect, down to 0 if it's totally wrong.
134 */
135int drm_edid_header_is_valid(const u8 *raw_edid)
136{
137 int i, score = 0;
138
139 for (i = 0; i < sizeof(edid_header); i++)
140 if (raw_edid[i] == edid_header[i])
141 score++;
142
143 return score;
144}
145EXPORT_SYMBOL(drm_edid_header_is_valid);
146
147
61e57a8d
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148/*
149 * Sanity check the EDID block (base or extension). Return 0 if the block
150 * doesn't check out, or 1 if it's valid.
f453ba04 151 */
61e57a8d
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152static bool
153drm_edid_block_valid(u8 *raw_edid)
f453ba04 154{
61e57a8d 155 int i;
f453ba04 156 u8 csum = 0;
61e57a8d 157 struct edid *edid = (struct edid *)raw_edid;
f453ba04 158
61e57a8d 159 if (raw_edid[0] == 0x00) {
051963d4 160 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d
AJ
161 if (score == 8) ;
162 else if (score >= 6) {
163 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
164 memcpy(raw_edid, edid_header, sizeof(edid_header));
165 } else {
166 goto bad;
167 }
168 }
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DA
169
170 for (i = 0; i < EDID_LENGTH; i++)
171 csum += raw_edid[i];
172 if (csum) {
173 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
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174
175 /* allow CEA to slide through, switches mangle this */
176 if (raw_edid[0] != 0x02)
177 goto bad;
f453ba04
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178 }
179
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180 /* per-block-type checks */
181 switch (raw_edid[0]) {
182 case 0: /* base */
183 if (edid->version != 1) {
184 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
185 goto bad;
186 }
862b89c0 187
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188 if (edid->revision > 4)
189 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
190 break;
862b89c0 191
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192 default:
193 break;
194 }
47ee4ccf 195
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DA
196 return 1;
197
198bad:
199 if (raw_edid) {
f49dadb8 200 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
201 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
202 raw_edid, EDID_LENGTH, false);
f453ba04
DA
203 }
204 return 0;
205}
61e57a8d
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206
207/**
208 * drm_edid_is_valid - sanity check EDID data
209 * @edid: EDID data
210 *
211 * Sanity-check an entire EDID record (including extensions)
212 */
213bool drm_edid_is_valid(struct edid *edid)
214{
215 int i;
216 u8 *raw = (u8 *)edid;
217
218 if (!edid)
219 return false;
220
221 for (i = 0; i <= edid->extensions; i++)
222 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
223 return false;
224
225 return true;
226}
3c537889 227EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 228
61e57a8d
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229#define DDC_ADDR 0x50
230#define DDC_SEGMENT_ADDR 0x30
231/**
232 * Get EDID information via I2C.
233 *
234 * \param adapter : i2c device adaptor
235 * \param buf : EDID data buffer to be filled
236 * \param len : EDID data buffer length
237 * \return 0 on success or -1 on failure.
238 *
239 * Try to fetch EDID information by calling i2c driver function.
240 */
241static int
242drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
243 int block, int len)
244{
245 unsigned char start = block * EDID_LENGTH;
4819d2e4
CW
246 int ret, retries = 5;
247
248 /* The core i2c driver will automatically retry the transfer if the
249 * adapter reports EAGAIN. However, we find that bit-banging transfers
250 * are susceptible to errors under a heavily loaded machine and
251 * generate spurious NAKs and timeouts. Retrying the transfer
252 * of the individual block a few times seems to overcome this.
253 */
254 do {
255 struct i2c_msg msgs[] = {
256 {
257 .addr = DDC_ADDR,
258 .flags = 0,
259 .len = 1,
260 .buf = &start,
261 }, {
262 .addr = DDC_ADDR,
263 .flags = I2C_M_RD,
264 .len = len,
265 .buf = buf,
266 }
267 };
268 ret = i2c_transfer(adapter, msgs, 2);
269 } while (ret != 2 && --retries);
270
271 return ret == 2 ? 0 : -1;
61e57a8d
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272}
273
4a9a8b71
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274static bool drm_edid_is_zero(u8 *in_edid, int length)
275{
276 int i;
277 u32 *raw_edid = (u32 *)in_edid;
278
279 for (i = 0; i < length / 4; i++)
280 if (*(raw_edid + i) != 0)
281 return false;
282 return true;
283}
284
61e57a8d
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285static u8 *
286drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
287{
0ea75e23 288 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
289 u8 *block, *new;
290
291 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
292 return NULL;
293
294 /* base block fetch */
295 for (i = 0; i < 4; i++) {
296 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
297 goto out;
298 if (drm_edid_block_valid(block))
299 break;
4a9a8b71
DA
300 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
301 connector->null_edid_counter++;
302 goto carp;
303 }
61e57a8d
AJ
304 }
305 if (i == 4)
306 goto carp;
307
308 /* if there's no extensions, we're done */
309 if (block[0x7e] == 0)
310 return block;
311
312 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
313 if (!new)
314 goto out;
315 block = new;
316
317 for (j = 1; j <= block[0x7e]; j++) {
318 for (i = 0; i < 4; i++) {
0ea75e23
ST
319 if (drm_do_probe_ddc_edid(adapter,
320 block + (valid_extensions + 1) * EDID_LENGTH,
321 j, EDID_LENGTH))
61e57a8d 322 goto out;
0ea75e23
ST
323 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {
324 valid_extensions++;
61e57a8d 325 break;
0ea75e23 326 }
61e57a8d
AJ
327 }
328 if (i == 4)
0ea75e23
ST
329 dev_warn(connector->dev->dev,
330 "%s: Ignoring invalid EDID block %d.\n",
331 drm_get_connector_name(connector), j);
332 }
333
334 if (valid_extensions != block[0x7e]) {
335 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
336 block[0x7e] = valid_extensions;
337 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
338 if (!new)
339 goto out;
340 block = new;
61e57a8d
AJ
341 }
342
343 return block;
344
345carp:
dcdb1674 346 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
347 drm_get_connector_name(connector), j);
348
349out:
350 kfree(block);
351 return NULL;
352}
353
354/**
355 * Probe DDC presence.
356 *
357 * \param adapter : i2c device adaptor
358 * \return 1 on success
359 */
360static bool
361drm_probe_ddc(struct i2c_adapter *adapter)
362{
363 unsigned char out;
364
365 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
366}
367
368/**
369 * drm_get_edid - get EDID data, if available
370 * @connector: connector we're probing
371 * @adapter: i2c adapter to use for DDC
372 *
373 * Poke the given i2c channel to grab EDID data if possible. If found,
374 * attach it to the connector.
375 *
376 * Return edid data or NULL if we couldn't find any.
377 */
378struct edid *drm_get_edid(struct drm_connector *connector,
379 struct i2c_adapter *adapter)
380{
381 struct edid *edid = NULL;
382
383 if (drm_probe_ddc(adapter))
384 edid = (struct edid *)drm_do_get_edid(connector, adapter);
385
386 connector->display_info.raw_edid = (char *)edid;
387
388 return edid;
389
390}
391EXPORT_SYMBOL(drm_get_edid);
392
393/*** EDID parsing ***/
394
f453ba04
DA
395/**
396 * edid_vendor - match a string against EDID's obfuscated vendor field
397 * @edid: EDID to match
398 * @vendor: vendor string
399 *
400 * Returns true if @vendor is in @edid, false otherwise
401 */
402static bool edid_vendor(struct edid *edid, char *vendor)
403{
404 char edid_vendor[3];
405
406 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
407 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
408 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 409 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
410
411 return !strncmp(edid_vendor, vendor, 3);
412}
413
414/**
415 * edid_get_quirks - return quirk flags for a given EDID
416 * @edid: EDID to process
417 *
418 * This tells subsequent routines what fixes they need to apply.
419 */
420static u32 edid_get_quirks(struct edid *edid)
421{
422 struct edid_quirk *quirk;
423 int i;
424
425 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
426 quirk = &edid_quirk_list[i];
427
428 if (edid_vendor(edid, quirk->vendor) &&
429 (EDID_PRODUCT_ID(edid) == quirk->product_id))
430 return quirk->quirks;
431 }
432
433 return 0;
434}
435
436#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
437#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
438
f453ba04
DA
439/**
440 * edid_fixup_preferred - set preferred modes based on quirk list
441 * @connector: has mode list to fix up
442 * @quirks: quirks list
443 *
444 * Walk the mode list for @connector, clearing the preferred status
445 * on existing modes and setting it anew for the right mode ala @quirks.
446 */
447static void edid_fixup_preferred(struct drm_connector *connector,
448 u32 quirks)
449{
450 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 451 int target_refresh = 0;
f453ba04
DA
452
453 if (list_empty(&connector->probed_modes))
454 return;
455
456 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
457 target_refresh = 60;
458 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
459 target_refresh = 75;
460
461 preferred_mode = list_first_entry(&connector->probed_modes,
462 struct drm_display_mode, head);
463
464 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
465 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
466
467 if (cur_mode == preferred_mode)
468 continue;
469
470 /* Largest mode is preferred */
471 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
472 preferred_mode = cur_mode;
473
474 /* At a given size, try to get closest to target refresh */
475 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
476 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
477 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
478 preferred_mode = cur_mode;
479 }
480 }
481
482 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
483}
484
1d42bbc8
DA
485struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
486 int hsize, int vsize, int fresh)
559ee21d 487{
b1f559ec 488 struct drm_display_mode *mode = NULL;
07a5e632 489 int i;
559ee21d 490
07a5e632 491 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 492 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
559ee21d
ZY
493 if (hsize == ptr->hdisplay &&
494 vsize == ptr->vdisplay &&
495 fresh == drm_mode_vrefresh(ptr)) {
496 /* get the expected default mode */
497 mode = drm_mode_duplicate(dev, ptr);
498 break;
499 }
500 }
501 return mode;
502}
1d42bbc8 503EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 504
d1ff6409
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505typedef void detailed_cb(struct detailed_timing *timing, void *closure);
506
4d76a221
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507static void
508cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
509{
510 int i, n = 0;
4966b2a9 511 u8 d = ext[0x02];
4d76a221
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512 u8 *det_base = ext + d;
513
4966b2a9 514 n = (127 - d) / 18;
4d76a221
AJ
515 for (i = 0; i < n; i++)
516 cb((struct detailed_timing *)(det_base + 18 * i), closure);
517}
518
cbba98f8
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519static void
520vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
521{
522 unsigned int i, n = min((int)ext[0x02], 6);
523 u8 *det_base = ext + 5;
524
525 if (ext[0x01] != 1)
526 return; /* unknown version */
527
528 for (i = 0; i < n; i++)
529 cb((struct detailed_timing *)(det_base + 18 * i), closure);
530}
531
d1ff6409
AJ
532static void
533drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
534{
535 int i;
536 struct edid *edid = (struct edid *)raw_edid;
537
538 if (edid == NULL)
539 return;
540
541 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
542 cb(&(edid->detailed_timings[i]), closure);
543
4d76a221
AJ
544 for (i = 1; i <= raw_edid[0x7e]; i++) {
545 u8 *ext = raw_edid + (i * EDID_LENGTH);
546 switch (*ext) {
547 case CEA_EXT:
548 cea_for_each_detailed_block(ext, cb, closure);
549 break;
cbba98f8
AJ
550 case VTB_EXT:
551 vtb_for_each_detailed_block(ext, cb, closure);
552 break;
4d76a221
AJ
553 default:
554 break;
555 }
556 }
d1ff6409
AJ
557}
558
559static void
560is_rb(struct detailed_timing *t, void *data)
561{
562 u8 *r = (u8 *)t;
563 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
564 if (r[15] & 0x10)
565 *(bool *)data = true;
566}
567
568/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
569static bool
570drm_monitor_supports_rb(struct edid *edid)
571{
572 if (edid->revision >= 4) {
573 bool ret;
574 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
575 return ret;
576 }
577
578 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
579}
580
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581static void
582find_gtf2(struct detailed_timing *t, void *data)
583{
584 u8 *r = (u8 *)t;
585 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
586 *(u8 **)data = r;
587}
588
589/* Secondary GTF curve kicks in above some break frequency */
590static int
591drm_gtf2_hbreak(struct edid *edid)
592{
593 u8 *r = NULL;
594 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
595 return r ? (r[12] * 2) : 0;
596}
597
598static int
599drm_gtf2_2c(struct edid *edid)
600{
601 u8 *r = NULL;
602 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
603 return r ? r[13] : 0;
604}
605
606static int
607drm_gtf2_m(struct edid *edid)
608{
609 u8 *r = NULL;
610 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
611 return r ? (r[15] << 8) + r[14] : 0;
612}
613
614static int
615drm_gtf2_k(struct edid *edid)
616{
617 u8 *r = NULL;
618 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
619 return r ? r[16] : 0;
620}
621
622static int
623drm_gtf2_2j(struct edid *edid)
624{
625 u8 *r = NULL;
626 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
627 return r ? r[17] : 0;
628}
629
630/**
631 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
632 * @edid: EDID block to scan
633 */
634static int standard_timing_level(struct edid *edid)
635{
636 if (edid->revision >= 2) {
637 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
638 return LEVEL_CVT;
639 if (drm_gtf2_hbreak(edid))
640 return LEVEL_GTF2;
641 return LEVEL_GTF;
642 }
643 return LEVEL_DMT;
644}
645
23425cae
AJ
646/*
647 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
648 * monitors fill with ascii space (0x20) instead.
649 */
650static int
651bad_std_timing(u8 a, u8 b)
652{
653 return (a == 0x00 && b == 0x00) ||
654 (a == 0x01 && b == 0x01) ||
655 (a == 0x20 && b == 0x20);
656}
657
f453ba04
DA
658/**
659 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
660 * @t: standard timing params
5c61259e 661 * @timing_level: standard timing level
f453ba04
DA
662 *
663 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 664 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 665 */
7ca6adb3 666static struct drm_display_mode *
7a374350
AJ
667drm_mode_std(struct drm_connector *connector, struct edid *edid,
668 struct std_timing *t, int revision)
f453ba04 669{
7ca6adb3
AJ
670 struct drm_device *dev = connector->dev;
671 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
672 int hsize, vsize;
673 int vrefresh_rate;
0454beab
MD
674 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
675 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
676 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
677 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 678 int timing_level = standard_timing_level(edid);
5c61259e 679
23425cae
AJ
680 if (bad_std_timing(t->hsize, t->vfreq_aspect))
681 return NULL;
682
5c61259e
ZY
683 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
684 hsize = t->hsize * 8 + 248;
685 /* vrefresh_rate = vfreq + 60 */
686 vrefresh_rate = vfreq + 60;
687 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
688 if (aspect_ratio == 0) {
689 if (revision < 3)
690 vsize = hsize;
691 else
692 vsize = (hsize * 10) / 16;
693 } else if (aspect_ratio == 1)
f453ba04 694 vsize = (hsize * 3) / 4;
0454beab 695 else if (aspect_ratio == 2)
f453ba04
DA
696 vsize = (hsize * 4) / 5;
697 else
698 vsize = (hsize * 9) / 16;
a0910c8e
AJ
699
700 /* HDTV hack, part 1 */
701 if (vrefresh_rate == 60 &&
702 ((hsize == 1360 && vsize == 765) ||
703 (hsize == 1368 && vsize == 769))) {
704 hsize = 1366;
705 vsize = 768;
706 }
707
7ca6adb3
AJ
708 /*
709 * If this connector already has a mode for this size and refresh
710 * rate (because it came from detailed or CVT info), use that
711 * instead. This way we don't have to guess at interlace or
712 * reduced blanking.
713 */
522032da 714 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
715 if (m->hdisplay == hsize && m->vdisplay == vsize &&
716 drm_mode_vrefresh(m) == vrefresh_rate)
717 return NULL;
718
a0910c8e
AJ
719 /* HDTV hack, part 2 */
720 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
721 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 722 false);
559ee21d 723 mode->hdisplay = 1366;
a4967de6
AJ
724 mode->hsync_start = mode->hsync_start - 1;
725 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
726 return mode;
727 }
a0910c8e 728
559ee21d 729 /* check whether it can be found in default mode table */
1d42bbc8 730 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
559ee21d
ZY
731 if (mode)
732 return mode;
733
5c61259e
ZY
734 switch (timing_level) {
735 case LEVEL_DMT:
5c61259e
ZY
736 break;
737 case LEVEL_GTF:
738 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
739 break;
7a374350
AJ
740 case LEVEL_GTF2:
741 /*
742 * This is potentially wrong if there's ever a monitor with
743 * more than one ranges section, each claiming a different
744 * secondary GTF curve. Please don't do that.
745 */
746 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
747 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
748 kfree(mode);
749 mode = drm_gtf_mode_complex(dev, hsize, vsize,
750 vrefresh_rate, 0, 0,
751 drm_gtf2_m(edid),
752 drm_gtf2_2c(edid),
753 drm_gtf2_k(edid),
754 drm_gtf2_2j(edid));
755 }
756 break;
5c61259e 757 case LEVEL_CVT:
d50ba256
DA
758 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
759 false);
5c61259e
ZY
760 break;
761 }
f453ba04
DA
762 return mode;
763}
764
b58db2c6
AJ
765/*
766 * EDID is delightfully ambiguous about how interlaced modes are to be
767 * encoded. Our internal representation is of frame height, but some
768 * HDTV detailed timings are encoded as field height.
769 *
770 * The format list here is from CEA, in frame size. Technically we
771 * should be checking refresh rate too. Whatever.
772 */
773static void
774drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
775 struct detailed_pixel_timing *pt)
776{
777 int i;
778 static const struct {
779 int w, h;
780 } cea_interlaced[] = {
781 { 1920, 1080 },
782 { 720, 480 },
783 { 1440, 480 },
784 { 2880, 480 },
785 { 720, 576 },
786 { 1440, 576 },
787 { 2880, 576 },
788 };
b58db2c6
AJ
789
790 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
791 return;
792
3c581411 793 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
794 if ((mode->hdisplay == cea_interlaced[i].w) &&
795 (mode->vdisplay == cea_interlaced[i].h / 2)) {
796 mode->vdisplay *= 2;
797 mode->vsync_start *= 2;
798 mode->vsync_end *= 2;
799 mode->vtotal *= 2;
800 mode->vtotal |= 1;
801 }
802 }
803
804 mode->flags |= DRM_MODE_FLAG_INTERLACE;
805}
806
f453ba04
DA
807/**
808 * drm_mode_detailed - create a new mode from an EDID detailed timing section
809 * @dev: DRM device (needed to create new mode)
810 * @edid: EDID block
811 * @timing: EDID detailed timing info
812 * @quirks: quirks to apply
813 *
814 * An EDID detailed timing block contains enough info for us to create and
815 * return a new struct drm_display_mode.
816 */
817static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
818 struct edid *edid,
819 struct detailed_timing *timing,
820 u32 quirks)
821{
822 struct drm_display_mode *mode;
823 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
824 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
825 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
826 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
827 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
828 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
829 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
830 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
831 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 832
fc438966 833 /* ignore tiny modes */
0454beab 834 if (hactive < 64 || vactive < 64)
fc438966
AJ
835 return NULL;
836
0454beab 837 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
838 printk(KERN_WARNING "stereo mode not supported\n");
839 return NULL;
840 }
0454beab 841 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 842 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
843 }
844
fcb45611
ZY
845 /* it is incorrect if hsync/vsync width is zero */
846 if (!hsync_pulse_width || !vsync_pulse_width) {
847 DRM_DEBUG_KMS("Incorrect Detailed timing. "
848 "Wrong Hsync/Vsync pulse width\n");
849 return NULL;
850 }
f453ba04
DA
851 mode = drm_mode_create(dev);
852 if (!mode)
853 return NULL;
854
855 mode->type = DRM_MODE_TYPE_DRIVER;
856
857 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
858 timing->pixel_clock = cpu_to_le16(1088);
859
860 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
861
862 mode->hdisplay = hactive;
863 mode->hsync_start = mode->hdisplay + hsync_offset;
864 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
865 mode->htotal = mode->hdisplay + hblank;
866
867 mode->vdisplay = vactive;
868 mode->vsync_start = mode->vdisplay + vsync_offset;
869 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
870 mode->vtotal = mode->vdisplay + vblank;
f453ba04 871
7064fef5
JB
872 /* Some EDIDs have bogus h/vtotal values */
873 if (mode->hsync_end > mode->htotal)
874 mode->htotal = mode->hsync_end + 1;
875 if (mode->vsync_end > mode->vtotal)
876 mode->vtotal = mode->vsync_end + 1;
877
b58db2c6 878 drm_mode_do_interlace_quirk(mode, pt);
f453ba04 879
171fdd89
AJ
880 drm_mode_set_name(mode);
881
f453ba04 882 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 883 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
884 }
885
0454beab
MD
886 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
887 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
888 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
889 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 890
e14cbee4
MD
891 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
892 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
893
894 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
895 mode->width_mm *= 10;
896 mode->height_mm *= 10;
897 }
898
899 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
900 mode->width_mm = edid->width_cm * 10;
901 mode->height_mm = edid->height_cm * 10;
902 }
903
904 return mode;
905}
906
07a5e632 907static bool
b1f559ec 908mode_is_rb(const struct drm_display_mode *mode)
07a5e632 909{
b17e52ef
AJ
910 return (mode->htotal - mode->hdisplay == 160) &&
911 (mode->hsync_end - mode->hdisplay == 80) &&
912 (mode->hsync_end - mode->hsync_start == 32) &&
913 (mode->vsync_start - mode->vdisplay == 3);
914}
07a5e632 915
b17e52ef 916static bool
b1f559ec
CW
917mode_in_hsync_range(const struct drm_display_mode *mode,
918 struct edid *edid, u8 *t)
b17e52ef
AJ
919{
920 int hsync, hmin, hmax;
921
922 hmin = t[7];
923 if (edid->revision >= 4)
924 hmin += ((t[4] & 0x04) ? 255 : 0);
925 hmax = t[8];
926 if (edid->revision >= 4)
927 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 928 hsync = drm_mode_hsync(mode);
07a5e632 929
b17e52ef
AJ
930 return (hsync <= hmax && hsync >= hmin);
931}
932
933static bool
b1f559ec
CW
934mode_in_vsync_range(const struct drm_display_mode *mode,
935 struct edid *edid, u8 *t)
b17e52ef
AJ
936{
937 int vsync, vmin, vmax;
938
939 vmin = t[5];
940 if (edid->revision >= 4)
941 vmin += ((t[4] & 0x01) ? 255 : 0);
942 vmax = t[6];
943 if (edid->revision >= 4)
944 vmax += ((t[4] & 0x02) ? 255 : 0);
945 vsync = drm_mode_vrefresh(mode);
946
947 return (vsync <= vmax && vsync >= vmin);
948}
949
950static u32
951range_pixel_clock(struct edid *edid, u8 *t)
952{
953 /* unspecified */
954 if (t[9] == 0 || t[9] == 255)
955 return 0;
956
957 /* 1.4 with CVT support gives us real precision, yay */
958 if (edid->revision >= 4 && t[10] == 0x04)
959 return (t[9] * 10000) - ((t[12] >> 2) * 250);
960
961 /* 1.3 is pathetic, so fuzz up a bit */
962 return t[9] * 10000 + 5001;
963}
964
b17e52ef 965static bool
b1f559ec 966mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
967 struct detailed_timing *timing)
968{
969 u32 max_clock;
970 u8 *t = (u8 *)timing;
971
972 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
973 return false;
974
b17e52ef 975 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
976 return false;
977
b17e52ef 978 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
979 if (mode->clock > max_clock)
980 return false;
b17e52ef
AJ
981
982 /* 1.4 max horizontal check */
983 if (edid->revision >= 4 && t[10] == 0x04)
984 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
985 return false;
986
987 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
988 return false;
07a5e632
AJ
989
990 return true;
991}
992
993/*
994 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
995 * need to account for them.
996 */
b17e52ef
AJ
997static int
998drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
999 struct detailed_timing *timing)
07a5e632
AJ
1000{
1001 int i, modes = 0;
1002 struct drm_display_mode *newmode;
1003 struct drm_device *dev = connector->dev;
1004
1005 for (i = 0; i < drm_num_dmt_modes; i++) {
b17e52ef 1006 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
07a5e632
AJ
1007 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1008 if (newmode) {
1009 drm_mode_probed_add(connector, newmode);
1010 modes++;
1011 }
1012 }
1013 }
1014
1015 return modes;
1016}
1017
13931579
AJ
1018static void
1019do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1020{
13931579
AJ
1021 struct detailed_mode_closure *closure = c;
1022 struct detailed_non_pixel *data = &timing->data.other_data;
1023 int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
9340d8cf 1024
13931579
AJ
1025 if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE)
1026 closure->modes += drm_gtf_modes_for_range(closure->connector,
1027 closure->edid,
1028 timing);
1029}
69da3015 1030
13931579
AJ
1031static int
1032add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1033{
1034 struct detailed_mode_closure closure = {
1035 connector, edid, 0, 0, 0
1036 };
9340d8cf 1037
13931579
AJ
1038 if (version_greater(edid, 1, 0))
1039 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1040 &closure);
9340d8cf 1041
13931579 1042 return closure.modes;
9340d8cf
AJ
1043}
1044
2255be14
AJ
1045static int
1046drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1047{
1048 int i, j, m, modes = 0;
1049 struct drm_display_mode *mode;
1050 u8 *est = ((u8 *)timing) + 5;
1051
1052 for (i = 0; i < 6; i++) {
1053 for (j = 7; j > 0; j--) {
1054 m = (i * 8) + (7 - j);
3c581411 1055 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1056 break;
1057 if (est[i] & (1 << j)) {
1d42bbc8
DA
1058 mode = drm_mode_find_dmt(connector->dev,
1059 est3_modes[m].w,
1060 est3_modes[m].h,
1061 est3_modes[m].r
1062 /*, est3_modes[m].rb */);
2255be14
AJ
1063 if (mode) {
1064 drm_mode_probed_add(connector, mode);
1065 modes++;
1066 }
1067 }
1068 }
1069 }
1070
1071 return modes;
1072}
1073
13931579
AJ
1074static void
1075do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1076{
13931579 1077 struct detailed_mode_closure *closure = c;
9cf00977 1078 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1079
13931579
AJ
1080 if (data->type == EDID_DETAIL_EST_TIMINGS)
1081 closure->modes += drm_est3_modes(closure->connector, timing);
1082}
9cf00977 1083
13931579
AJ
1084/**
1085 * add_established_modes - get est. modes from EDID and add them
1086 * @edid: EDID block to scan
1087 *
1088 * Each EDID block contains a bitmap of the supported "established modes" list
1089 * (defined above). Tease them out and add them to the global modes list.
1090 */
1091static int
1092add_established_modes(struct drm_connector *connector, struct edid *edid)
1093{
1094 struct drm_device *dev = connector->dev;
1095 unsigned long est_bits = edid->established_timings.t1 |
1096 (edid->established_timings.t2 << 8) |
1097 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1098 int i, modes = 0;
1099 struct detailed_mode_closure closure = {
1100 connector, edid, 0, 0, 0
1101 };
9cf00977 1102
13931579
AJ
1103 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1104 if (est_bits & (1<<i)) {
1105 struct drm_display_mode *newmode;
1106 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1107 if (newmode) {
1108 drm_mode_probed_add(connector, newmode);
1109 modes++;
1110 }
1111 }
9cf00977
AJ
1112 }
1113
13931579
AJ
1114 if (version_greater(edid, 1, 0))
1115 drm_for_each_detailed_block((u8 *)edid,
1116 do_established_modes, &closure);
1117
1118 return modes + closure.modes;
1119}
1120
1121static void
1122do_standard_modes(struct detailed_timing *timing, void *c)
1123{
1124 struct detailed_mode_closure *closure = c;
1125 struct detailed_non_pixel *data = &timing->data.other_data;
1126 struct drm_connector *connector = closure->connector;
1127 struct edid *edid = closure->edid;
1128
1129 if (data->type == EDID_DETAIL_STD_MODES) {
1130 int i;
9cf00977
AJ
1131 for (i = 0; i < 6; i++) {
1132 struct std_timing *std;
1133 struct drm_display_mode *newmode;
1134
1135 std = &data->data.timings[i];
7a374350
AJ
1136 newmode = drm_mode_std(connector, edid, std,
1137 edid->revision);
9cf00977
AJ
1138 if (newmode) {
1139 drm_mode_probed_add(connector, newmode);
13931579 1140 closure->modes++;
9cf00977
AJ
1141 }
1142 }
9cf00977 1143 }
9cf00977
AJ
1144}
1145
f453ba04 1146/**
13931579 1147 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1148 * @edid: EDID block to scan
f453ba04 1149 *
13931579
AJ
1150 * Standard modes can be calculated using the appropriate standard (DMT,
1151 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1152 */
13931579
AJ
1153static int
1154add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1155{
9cf00977 1156 int i, modes = 0;
13931579
AJ
1157 struct detailed_mode_closure closure = {
1158 connector, edid, 0, 0, 0
1159 };
1160
1161 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1162 struct drm_display_mode *newmode;
1163
1164 newmode = drm_mode_std(connector, edid,
1165 &edid->standard_timings[i],
1166 edid->revision);
1167 if (newmode) {
1168 drm_mode_probed_add(connector, newmode);
1169 modes++;
1170 }
1171 }
1172
1173 if (version_greater(edid, 1, 0))
1174 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1175 &closure);
1176
1177 /* XXX should also look for standard codes in VTB blocks */
1178
1179 return modes + closure.modes;
1180}
f453ba04 1181
13931579
AJ
1182static int drm_cvt_modes(struct drm_connector *connector,
1183 struct detailed_timing *timing)
1184{
1185 int i, j, modes = 0;
1186 struct drm_display_mode *newmode;
1187 struct drm_device *dev = connector->dev;
1188 struct cvt_timing *cvt;
1189 const int rates[] = { 60, 85, 75, 60, 50 };
1190 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1191
13931579
AJ
1192 for (i = 0; i < 4; i++) {
1193 int uninitialized_var(width), height;
1194 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1195
13931579 1196 if (!memcmp(cvt->code, empty, 3))
9cf00977 1197 continue;
f453ba04 1198
13931579
AJ
1199 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1200 switch (cvt->code[1] & 0x0c) {
1201 case 0x00:
1202 width = height * 4 / 3;
1203 break;
1204 case 0x04:
1205 width = height * 16 / 9;
1206 break;
1207 case 0x08:
1208 width = height * 16 / 10;
1209 break;
1210 case 0x0c:
1211 width = height * 15 / 9;
1212 break;
1213 }
1214
1215 for (j = 1; j < 5; j++) {
1216 if (cvt->code[2] & (1 << j)) {
1217 newmode = drm_cvt_mode(dev, width, height,
1218 rates[j], j == 0,
1219 false, false);
1220 if (newmode) {
1221 drm_mode_probed_add(connector, newmode);
1222 modes++;
1223 }
1224 }
1225 }
f453ba04
DA
1226 }
1227
1228 return modes;
1229}
9cf00977 1230
13931579
AJ
1231static void
1232do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1233{
13931579
AJ
1234 struct detailed_mode_closure *closure = c;
1235 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1236
13931579
AJ
1237 if (data->type == EDID_DETAIL_CVT_3BYTE)
1238 closure->modes += drm_cvt_modes(closure->connector, timing);
1239}
882f0219 1240
13931579
AJ
1241static int
1242add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1243{
1244 struct detailed_mode_closure closure = {
1245 connector, edid, 0, 0, 0
1246 };
882f0219 1247
13931579
AJ
1248 if (version_greater(edid, 1, 2))
1249 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1250
13931579 1251 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1252
13931579
AJ
1253 return closure.modes;
1254}
1255
1256static void
1257do_detailed_mode(struct detailed_timing *timing, void *c)
1258{
1259 struct detailed_mode_closure *closure = c;
1260 struct drm_display_mode *newmode;
1261
1262 if (timing->pixel_clock) {
1263 newmode = drm_mode_detailed(closure->connector->dev,
1264 closure->edid, timing,
1265 closure->quirks);
1266 if (!newmode)
1267 return;
1268
1269 if (closure->preferred)
1270 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1271
1272 drm_mode_probed_add(closure->connector, newmode);
1273 closure->modes++;
1274 closure->preferred = 0;
882f0219 1275 }
13931579 1276}
882f0219 1277
13931579
AJ
1278/*
1279 * add_detailed_modes - Add modes from detailed timings
1280 * @connector: attached connector
1281 * @edid: EDID block to scan
1282 * @quirks: quirks to apply
1283 */
1284static int
1285add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1286 u32 quirks)
1287{
1288 struct detailed_mode_closure closure = {
1289 connector,
1290 edid,
1291 1,
1292 quirks,
1293 0
1294 };
1295
1296 if (closure.preferred && !version_greater(edid, 1, 3))
1297 closure.preferred =
1298 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1299
1300 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1301
1302 return closure.modes;
882f0219 1303}
f453ba04 1304
f23c20c8 1305#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1306#define AUDIO_BLOCK 0x01
54ac76f8 1307#define VIDEO_BLOCK 0x02
f23c20c8 1308#define VENDOR_BLOCK 0x03
76adaa34 1309#define SPEAKER_BLOCK 0x04
8fe9790d
ZW
1310#define EDID_BASIC_AUDIO (1 << 6)
1311
f23c20c8 1312/**
8fe9790d 1313 * Search EDID for CEA extension block.
f23c20c8 1314 */
eccaca28 1315u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1316{
8fe9790d
ZW
1317 u8 *edid_ext = NULL;
1318 int i;
f23c20c8
ML
1319
1320 /* No EDID or EDID extensions */
1321 if (edid == NULL || edid->extensions == 0)
8fe9790d 1322 return NULL;
f23c20c8 1323
f23c20c8 1324 /* Find CEA extension */
7466f4cc 1325 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1326 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1327 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1328 break;
1329 }
1330
7466f4cc 1331 if (i == edid->extensions)
8fe9790d
ZW
1332 return NULL;
1333
1334 return edid_ext;
1335}
eccaca28 1336EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1337
54ac76f8
CS
1338static int
1339do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1340{
1341 struct drm_device *dev = connector->dev;
1342 u8 * mode, cea_mode;
1343 int modes = 0;
1344
1345 for (mode = db; mode < db + len; mode++) {
1346 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1347 if (cea_mode < drm_num_cea_modes) {
1348 struct drm_display_mode *newmode;
1349 newmode = drm_mode_duplicate(dev,
1350 &edid_cea_modes[cea_mode]);
1351 if (newmode) {
1352 drm_mode_probed_add(connector, newmode);
1353 modes++;
1354 }
1355 }
1356 }
1357
1358 return modes;
1359}
1360
1361static int
1362add_cea_modes(struct drm_connector *connector, struct edid *edid)
1363{
1364 u8 * cea = drm_find_cea_extension(edid);
1365 u8 * db, dbl;
1366 int modes = 0;
1367
1368 if (cea && cea[1] >= 3) {
1369 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1370 dbl = db[0] & 0x1f;
1371 if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK)
1372 modes += do_cea_modes (connector, db+1, dbl);
1373 }
1374 }
1375
1376 return modes;
1377}
1378
76adaa34
WF
1379static void
1380parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
1381{
1382 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1383
1384 connector->dvi_dual = db[6] & 1;
1385 connector->max_tmds_clock = db[7] * 5;
1386
1387 connector->latency_present[0] = db[8] >> 7;
1388 connector->latency_present[1] = (db[8] >> 6) & 1;
1389 connector->video_latency[0] = db[9];
1390 connector->audio_latency[0] = db[10];
1391 connector->video_latency[1] = db[11];
1392 connector->audio_latency[1] = db[12];
1393
1394 DRM_LOG_KMS("HDMI: DVI dual %d, "
1395 "max TMDS clock %d, "
1396 "latency present %d %d, "
1397 "video latency %d %d, "
1398 "audio latency %d %d\n",
1399 connector->dvi_dual,
1400 connector->max_tmds_clock,
1401 (int) connector->latency_present[0],
1402 (int) connector->latency_present[1],
1403 connector->video_latency[0],
1404 connector->video_latency[1],
1405 connector->audio_latency[0],
1406 connector->audio_latency[1]);
1407}
1408
1409static void
1410monitor_name(struct detailed_timing *t, void *data)
1411{
1412 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1413 *(u8 **)data = t->data.other_data.data.str.str;
1414}
1415
1416/**
1417 * drm_edid_to_eld - build ELD from EDID
1418 * @connector: connector corresponding to the HDMI/DP sink
1419 * @edid: EDID to parse
1420 *
1421 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1422 * Some ELD fields are left to the graphics driver caller:
1423 * - Conn_Type
1424 * - HDCP
1425 * - Port_ID
1426 */
1427void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1428{
1429 uint8_t *eld = connector->eld;
1430 u8 *cea;
1431 u8 *name;
1432 u8 *db;
1433 int sad_count = 0;
1434 int mnl;
1435 int dbl;
1436
1437 memset(eld, 0, sizeof(connector->eld));
1438
1439 cea = drm_find_cea_extension(edid);
1440 if (!cea) {
1441 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1442 return;
1443 }
1444
1445 name = NULL;
1446 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1447 for (mnl = 0; name && mnl < 13; mnl++) {
1448 if (name[mnl] == 0x0a)
1449 break;
1450 eld[20 + mnl] = name[mnl];
1451 }
1452 eld[4] = (cea[1] << 5) | mnl;
1453 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1454
1455 eld[0] = 2 << 3; /* ELD version: 2 */
1456
1457 eld[16] = edid->mfg_id[0];
1458 eld[17] = edid->mfg_id[1];
1459 eld[18] = edid->prod_code[0];
1460 eld[19] = edid->prod_code[1];
1461
a0ab734d
CS
1462 if (cea[1] >= 3)
1463 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1464 dbl = db[0] & 0x1f;
1465
1466 switch ((db[0] & 0xe0) >> 5) {
1467 case AUDIO_BLOCK:
1468 /* Audio Data Block, contains SADs */
1469 sad_count = dbl / 3;
1470 memcpy(eld + 20 + mnl, &db[1], dbl);
1471 break;
1472 case SPEAKER_BLOCK:
1473 /* Speaker Allocation Data Block */
1474 eld[7] = db[1];
1475 break;
1476 case VENDOR_BLOCK:
1477 /* HDMI Vendor-Specific Data Block */
1478 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0)
1479 parse_hdmi_vsdb(connector, db);
1480 break;
1481 default:
1482 break;
1483 }
76adaa34 1484 }
76adaa34
WF
1485 eld[5] |= sad_count << 4;
1486 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1487
1488 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1489}
1490EXPORT_SYMBOL(drm_edid_to_eld);
1491
1492/**
1493 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1494 * @connector: connector associated with the HDMI/DP sink
1495 * @mode: the display mode
1496 */
1497int drm_av_sync_delay(struct drm_connector *connector,
1498 struct drm_display_mode *mode)
1499{
1500 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1501 int a, v;
1502
1503 if (!connector->latency_present[0])
1504 return 0;
1505 if (!connector->latency_present[1])
1506 i = 0;
1507
1508 a = connector->audio_latency[i];
1509 v = connector->video_latency[i];
1510
1511 /*
1512 * HDMI/DP sink doesn't support audio or video?
1513 */
1514 if (a == 255 || v == 255)
1515 return 0;
1516
1517 /*
1518 * Convert raw EDID values to millisecond.
1519 * Treat unknown latency as 0ms.
1520 */
1521 if (a)
1522 a = min(2 * (a - 1), 500);
1523 if (v)
1524 v = min(2 * (v - 1), 500);
1525
1526 return max(v - a, 0);
1527}
1528EXPORT_SYMBOL(drm_av_sync_delay);
1529
1530/**
1531 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1532 * @encoder: the encoder just changed display mode
1533 * @mode: the adjusted display mode
1534 *
1535 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1536 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1537 */
1538struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1539 struct drm_display_mode *mode)
1540{
1541 struct drm_connector *connector;
1542 struct drm_device *dev = encoder->dev;
1543
1544 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1545 if (connector->encoder == encoder && connector->eld[0])
1546 return connector;
1547
1548 return NULL;
1549}
1550EXPORT_SYMBOL(drm_select_eld);
1551
8fe9790d
ZW
1552/**
1553 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1554 * @edid: monitor EDID information
1555 *
1556 * Parse the CEA extension according to CEA-861-B.
1557 * Return true if HDMI, false if not or unknown.
1558 */
1559bool drm_detect_hdmi_monitor(struct edid *edid)
1560{
1561 u8 *edid_ext;
1562 int i, hdmi_id;
1563 int start_offset, end_offset;
1564 bool is_hdmi = false;
1565
1566 edid_ext = drm_find_cea_extension(edid);
1567 if (!edid_ext)
f23c20c8
ML
1568 goto end;
1569
1570 /* Data block offset in CEA extension block */
1571 start_offset = 4;
1572 end_offset = edid_ext[2];
1573
1574 /*
1575 * Because HDMI identifier is in Vendor Specific Block,
1576 * search it from all data blocks of CEA extension.
1577 */
1578 for (i = start_offset; i < end_offset;
1579 /* Increased by data block len */
1580 i += ((edid_ext[i] & 0x1f) + 1)) {
1581 /* Find vendor specific block */
1582 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1583 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1584 edid_ext[i + 3] << 16;
1585 /* Find HDMI identifier */
1586 if (hdmi_id == HDMI_IDENTIFIER)
1587 is_hdmi = true;
1588 break;
1589 }
1590 }
1591
1592end:
1593 return is_hdmi;
1594}
1595EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1596
8fe9790d
ZW
1597/**
1598 * drm_detect_monitor_audio - check monitor audio capability
1599 *
1600 * Monitor should have CEA extension block.
1601 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1602 * audio' only. If there is any audio extension block and supported
1603 * audio format, assume at least 'basic audio' support, even if 'basic
1604 * audio' is not defined in EDID.
1605 *
1606 */
1607bool drm_detect_monitor_audio(struct edid *edid)
1608{
1609 u8 *edid_ext;
1610 int i, j;
1611 bool has_audio = false;
1612 int start_offset, end_offset;
1613
1614 edid_ext = drm_find_cea_extension(edid);
1615 if (!edid_ext)
1616 goto end;
1617
1618 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1619
1620 if (has_audio) {
1621 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1622 goto end;
1623 }
1624
1625 /* Data block offset in CEA extension block */
1626 start_offset = 4;
1627 end_offset = edid_ext[2];
1628
1629 for (i = start_offset; i < end_offset;
1630 i += ((edid_ext[i] & 0x1f) + 1)) {
1631 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1632 has_audio = true;
1633 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1634 DRM_DEBUG_KMS("CEA audio format %d\n",
1635 (edid_ext[i + j] >> 3) & 0xf);
1636 goto end;
1637 }
1638 }
1639end:
1640 return has_audio;
1641}
1642EXPORT_SYMBOL(drm_detect_monitor_audio);
1643
3b11228b
JB
1644/**
1645 * drm_add_display_info - pull display info out if present
1646 * @edid: EDID data
1647 * @info: display info (attached to connector)
1648 *
1649 * Grab any available display info and stuff it into the drm_display_info
1650 * structure that's part of the connector. Useful for tracking bpp and
1651 * color spaces.
1652 */
1653static void drm_add_display_info(struct edid *edid,
1654 struct drm_display_info *info)
1655{
ebec9a7b
JB
1656 u8 *edid_ext;
1657
3b11228b
JB
1658 info->width_mm = edid->width_cm * 10;
1659 info->height_mm = edid->height_cm * 10;
1660
1661 /* driver figures it out in this case */
1662 info->bpc = 0;
da05a5a7 1663 info->color_formats = 0;
3b11228b
JB
1664
1665 /* Only defined for 1.4 with digital displays */
1666 if (edid->revision < 4)
1667 return;
1668
1669 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1670 return;
1671
1672 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1673 case DRM_EDID_DIGITAL_DEPTH_6:
1674 info->bpc = 6;
1675 break;
1676 case DRM_EDID_DIGITAL_DEPTH_8:
1677 info->bpc = 8;
1678 break;
1679 case DRM_EDID_DIGITAL_DEPTH_10:
1680 info->bpc = 10;
1681 break;
1682 case DRM_EDID_DIGITAL_DEPTH_12:
1683 info->bpc = 12;
1684 break;
1685 case DRM_EDID_DIGITAL_DEPTH_14:
1686 info->bpc = 14;
1687 break;
1688 case DRM_EDID_DIGITAL_DEPTH_16:
1689 info->bpc = 16;
1690 break;
1691 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1692 default:
1693 info->bpc = 0;
1694 break;
1695 }
da05a5a7
JB
1696
1697 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1698 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444)
1699 info->color_formats = DRM_COLOR_FORMAT_YCRCB444;
1700 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422)
1701 info->color_formats = DRM_COLOR_FORMAT_YCRCB422;
ebec9a7b
JB
1702
1703 /* Get data from CEA blocks if present */
1704 edid_ext = drm_find_cea_extension(edid);
1705 if (!edid_ext)
1706 return;
1707
1708 info->cea_rev = edid_ext[1];
3b11228b
JB
1709}
1710
f453ba04
DA
1711/**
1712 * drm_add_edid_modes - add modes from EDID data, if available
1713 * @connector: connector we're probing
1714 * @edid: edid data
1715 *
1716 * Add the specified modes to the connector's mode list.
1717 *
1718 * Return number of modes added or 0 if we couldn't find any.
1719 */
1720int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1721{
1722 int num_modes = 0;
1723 u32 quirks;
1724
1725 if (edid == NULL) {
1726 return 0;
1727 }
3c537889 1728 if (!drm_edid_is_valid(edid)) {
dcdb1674 1729 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1730 drm_get_connector_name(connector));
1731 return 0;
1732 }
1733
1734 quirks = edid_get_quirks(edid);
1735
c867df70
AJ
1736 /*
1737 * EDID spec says modes should be preferred in this order:
1738 * - preferred detailed mode
1739 * - other detailed modes from base block
1740 * - detailed modes from extension blocks
1741 * - CVT 3-byte code modes
1742 * - standard timing codes
1743 * - established timing codes
1744 * - modes inferred from GTF or CVT range information
1745 *
13931579 1746 * We get this pretty much right.
c867df70
AJ
1747 *
1748 * XXX order for additional mode types in extension blocks?
1749 */
13931579
AJ
1750 num_modes += add_detailed_modes(connector, edid, quirks);
1751 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1752 num_modes += add_standard_modes(connector, edid);
1753 num_modes += add_established_modes(connector, edid);
13931579 1754 num_modes += add_inferred_modes(connector, edid);
54ac76f8 1755 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
1756
1757 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1758 edid_fixup_preferred(connector, quirks);
1759
3b11228b 1760 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
1761
1762 return num_modes;
1763}
1764EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1765
1766/**
1767 * drm_add_modes_noedid - add modes for the connectors without EDID
1768 * @connector: connector we're probing
1769 * @hdisplay: the horizontal display limit
1770 * @vdisplay: the vertical display limit
1771 *
1772 * Add the specified modes to the connector's mode list. Only when the
1773 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1774 *
1775 * Return number of modes added or 0 if we couldn't find any.
1776 */
1777int drm_add_modes_noedid(struct drm_connector *connector,
1778 int hdisplay, int vdisplay)
1779{
1780 int i, count, num_modes = 0;
b1f559ec 1781 struct drm_display_mode *mode;
f0fda0a4
ZY
1782 struct drm_device *dev = connector->dev;
1783
1784 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1785 if (hdisplay < 0)
1786 hdisplay = 0;
1787 if (vdisplay < 0)
1788 vdisplay = 0;
1789
1790 for (i = 0; i < count; i++) {
b1f559ec 1791 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
1792 if (hdisplay && vdisplay) {
1793 /*
1794 * Only when two are valid, they will be used to check
1795 * whether the mode should be added to the mode list of
1796 * the connector.
1797 */
1798 if (ptr->hdisplay > hdisplay ||
1799 ptr->vdisplay > vdisplay)
1800 continue;
1801 }
f985dedb
AJ
1802 if (drm_mode_vrefresh(ptr) > 61)
1803 continue;
f0fda0a4
ZY
1804 mode = drm_mode_duplicate(dev, ptr);
1805 if (mode) {
1806 drm_mode_probed_add(connector, mode);
1807 num_modes++;
1808 }
1809 }
1810 return num_modes;
1811}
1812EXPORT_SYMBOL(drm_add_modes_noedid);
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