Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
2d1a8a48 33#include <linux/export.h>
f453ba04
DA
34#include "drmP.h"
35#include "drm_edid.h"
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
d1ff6409
AJ
42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
DA
45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3c537889 69
13931579
AJ
70struct detailed_mode_closure {
71 struct drm_connector *connector;
72 struct edid *edid;
73 bool preferred;
74 u32 quirks;
75 int modes;
76};
f453ba04 77
5c61259e
ZY
78#define LEVEL_DMT 0
79#define LEVEL_GTF 1
7a374350
AJ
80#define LEVEL_GTF2 2
81#define LEVEL_CVT 3
5c61259e 82
f453ba04 83static struct edid_quirk {
c51a3fd6 84 char vendor[4];
f453ba04
DA
85 int product_id;
86 u32 quirks;
87} edid_quirk_list[] = {
88 /* Acer AL1706 */
89 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
90 /* Acer F51 */
91 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Unknown Acer */
93 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
94
95 /* Belinea 10 15 55 */
96 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
97 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
98
99 /* Envision Peripherals, Inc. EN-7100e */
100 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
ba1163de
AJ
101 /* Envision EN2028 */
102 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
103
104 /* Funai Electronics PM36B */
105 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
106 EDID_QUIRK_DETAILED_IN_CM },
107
108 /* LG Philips LCD LP154W01-A5 */
109 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
110 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
111
112 /* Philips 107p5 CRT */
113 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
114
115 /* Proview AY765C */
116 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
117
118 /* Samsung SyncMaster 205BW. Note: irony */
119 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
120 /* Samsung SyncMaster 22[5-6]BW */
121 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
122 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
123};
124
61e57a8d 125/*** DDC fetch and block validation ***/
f453ba04 126
083ae056
AJ
127static const u8 edid_header[] = {
128 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
129};
f453ba04 130
051963d4
TR
131 /*
132 * Sanity check the header of the base EDID block. Return 8 if the header
133 * is perfect, down to 0 if it's totally wrong.
134 */
135int drm_edid_header_is_valid(const u8 *raw_edid)
136{
137 int i, score = 0;
138
139 for (i = 0; i < sizeof(edid_header); i++)
140 if (raw_edid[i] == edid_header[i])
141 score++;
142
143 return score;
144}
145EXPORT_SYMBOL(drm_edid_header_is_valid);
146
147
61e57a8d
AJ
148/*
149 * Sanity check the EDID block (base or extension). Return 0 if the block
150 * doesn't check out, or 1 if it's valid.
f453ba04 151 */
f89ec8a4 152bool drm_edid_block_valid(u8 *raw_edid, int block)
f453ba04 153{
61e57a8d 154 int i;
f453ba04 155 u8 csum = 0;
61e57a8d 156 struct edid *edid = (struct edid *)raw_edid;
f453ba04 157
f89ec8a4 158 if (block == 0) {
051963d4 159 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d
AJ
160 if (score == 8) ;
161 else if (score >= 6) {
162 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
163 memcpy(raw_edid, edid_header, sizeof(edid_header));
164 } else {
165 goto bad;
166 }
167 }
f453ba04
DA
168
169 for (i = 0; i < EDID_LENGTH; i++)
170 csum += raw_edid[i];
171 if (csum) {
172 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
4a638b4e
AJ
173
174 /* allow CEA to slide through, switches mangle this */
175 if (raw_edid[0] != 0x02)
176 goto bad;
f453ba04
DA
177 }
178
61e57a8d
AJ
179 /* per-block-type checks */
180 switch (raw_edid[0]) {
181 case 0: /* base */
182 if (edid->version != 1) {
183 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
184 goto bad;
185 }
862b89c0 186
61e57a8d
AJ
187 if (edid->revision > 4)
188 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
189 break;
862b89c0 190
61e57a8d
AJ
191 default:
192 break;
193 }
47ee4ccf 194
f453ba04
DA
195 return 1;
196
197bad:
198 if (raw_edid) {
f49dadb8 199 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
200 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
201 raw_edid, EDID_LENGTH, false);
f453ba04
DA
202 }
203 return 0;
204}
da0df92b 205EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
AJ
206
207/**
208 * drm_edid_is_valid - sanity check EDID data
209 * @edid: EDID data
210 *
211 * Sanity-check an entire EDID record (including extensions)
212 */
213bool drm_edid_is_valid(struct edid *edid)
214{
215 int i;
216 u8 *raw = (u8 *)edid;
217
218 if (!edid)
219 return false;
220
221 for (i = 0; i <= edid->extensions; i++)
f89ec8a4 222 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))
61e57a8d
AJ
223 return false;
224
225 return true;
226}
3c537889 227EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 228
61e57a8d
AJ
229#define DDC_SEGMENT_ADDR 0x30
230/**
231 * Get EDID information via I2C.
232 *
233 * \param adapter : i2c device adaptor
234 * \param buf : EDID data buffer to be filled
235 * \param len : EDID data buffer length
236 * \return 0 on success or -1 on failure.
237 *
238 * Try to fetch EDID information by calling i2c driver function.
239 */
240static int
241drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
242 int block, int len)
243{
244 unsigned char start = block * EDID_LENGTH;
4819d2e4
CW
245 int ret, retries = 5;
246
247 /* The core i2c driver will automatically retry the transfer if the
248 * adapter reports EAGAIN. However, we find that bit-banging transfers
249 * are susceptible to errors under a heavily loaded machine and
250 * generate spurious NAKs and timeouts. Retrying the transfer
251 * of the individual block a few times seems to overcome this.
252 */
253 do {
254 struct i2c_msg msgs[] = {
255 {
256 .addr = DDC_ADDR,
257 .flags = 0,
258 .len = 1,
259 .buf = &start,
260 }, {
261 .addr = DDC_ADDR,
262 .flags = I2C_M_RD,
263 .len = len,
264 .buf = buf,
265 }
266 };
267 ret = i2c_transfer(adapter, msgs, 2);
9292f37e
ED
268 if (ret == -ENXIO) {
269 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
270 adapter->name);
271 break;
272 }
4819d2e4
CW
273 } while (ret != 2 && --retries);
274
275 return ret == 2 ? 0 : -1;
61e57a8d
AJ
276}
277
4a9a8b71
DA
278static bool drm_edid_is_zero(u8 *in_edid, int length)
279{
280 int i;
281 u32 *raw_edid = (u32 *)in_edid;
282
283 for (i = 0; i < length / 4; i++)
284 if (*(raw_edid + i) != 0)
285 return false;
286 return true;
287}
288
61e57a8d
AJ
289static u8 *
290drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
291{
0ea75e23 292 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
293 u8 *block, *new;
294
295 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
296 return NULL;
297
298 /* base block fetch */
299 for (i = 0; i < 4; i++) {
300 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
301 goto out;
f89ec8a4 302 if (drm_edid_block_valid(block, 0))
61e57a8d 303 break;
4a9a8b71
DA
304 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
305 connector->null_edid_counter++;
306 goto carp;
307 }
61e57a8d
AJ
308 }
309 if (i == 4)
310 goto carp;
311
312 /* if there's no extensions, we're done */
313 if (block[0x7e] == 0)
314 return block;
315
316 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
317 if (!new)
318 goto out;
319 block = new;
320
321 for (j = 1; j <= block[0x7e]; j++) {
322 for (i = 0; i < 4; i++) {
0ea75e23
ST
323 if (drm_do_probe_ddc_edid(adapter,
324 block + (valid_extensions + 1) * EDID_LENGTH,
325 j, EDID_LENGTH))
61e57a8d 326 goto out;
f89ec8a4 327 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) {
0ea75e23 328 valid_extensions++;
61e57a8d 329 break;
0ea75e23 330 }
61e57a8d
AJ
331 }
332 if (i == 4)
0ea75e23
ST
333 dev_warn(connector->dev->dev,
334 "%s: Ignoring invalid EDID block %d.\n",
335 drm_get_connector_name(connector), j);
336 }
337
338 if (valid_extensions != block[0x7e]) {
339 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
340 block[0x7e] = valid_extensions;
341 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
342 if (!new)
343 goto out;
344 block = new;
61e57a8d
AJ
345 }
346
347 return block;
348
349carp:
dcdb1674 350 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
351 drm_get_connector_name(connector), j);
352
353out:
354 kfree(block);
355 return NULL;
356}
357
358/**
359 * Probe DDC presence.
360 *
361 * \param adapter : i2c device adaptor
362 * \return 1 on success
363 */
364static bool
365drm_probe_ddc(struct i2c_adapter *adapter)
366{
367 unsigned char out;
368
369 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
370}
371
372/**
373 * drm_get_edid - get EDID data, if available
374 * @connector: connector we're probing
375 * @adapter: i2c adapter to use for DDC
376 *
377 * Poke the given i2c channel to grab EDID data if possible. If found,
378 * attach it to the connector.
379 *
380 * Return edid data or NULL if we couldn't find any.
381 */
382struct edid *drm_get_edid(struct drm_connector *connector,
383 struct i2c_adapter *adapter)
384{
385 struct edid *edid = NULL;
386
387 if (drm_probe_ddc(adapter))
388 edid = (struct edid *)drm_do_get_edid(connector, adapter);
389
390 connector->display_info.raw_edid = (char *)edid;
391
392 return edid;
393
394}
395EXPORT_SYMBOL(drm_get_edid);
396
397/*** EDID parsing ***/
398
f453ba04
DA
399/**
400 * edid_vendor - match a string against EDID's obfuscated vendor field
401 * @edid: EDID to match
402 * @vendor: vendor string
403 *
404 * Returns true if @vendor is in @edid, false otherwise
405 */
406static bool edid_vendor(struct edid *edid, char *vendor)
407{
408 char edid_vendor[3];
409
410 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
411 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
412 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 413 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
414
415 return !strncmp(edid_vendor, vendor, 3);
416}
417
418/**
419 * edid_get_quirks - return quirk flags for a given EDID
420 * @edid: EDID to process
421 *
422 * This tells subsequent routines what fixes they need to apply.
423 */
424static u32 edid_get_quirks(struct edid *edid)
425{
426 struct edid_quirk *quirk;
427 int i;
428
429 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
430 quirk = &edid_quirk_list[i];
431
432 if (edid_vendor(edid, quirk->vendor) &&
433 (EDID_PRODUCT_ID(edid) == quirk->product_id))
434 return quirk->quirks;
435 }
436
437 return 0;
438}
439
440#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
441#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
442
f453ba04
DA
443/**
444 * edid_fixup_preferred - set preferred modes based on quirk list
445 * @connector: has mode list to fix up
446 * @quirks: quirks list
447 *
448 * Walk the mode list for @connector, clearing the preferred status
449 * on existing modes and setting it anew for the right mode ala @quirks.
450 */
451static void edid_fixup_preferred(struct drm_connector *connector,
452 u32 quirks)
453{
454 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 455 int target_refresh = 0;
f453ba04
DA
456
457 if (list_empty(&connector->probed_modes))
458 return;
459
460 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
461 target_refresh = 60;
462 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
463 target_refresh = 75;
464
465 preferred_mode = list_first_entry(&connector->probed_modes,
466 struct drm_display_mode, head);
467
468 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
469 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
470
471 if (cur_mode == preferred_mode)
472 continue;
473
474 /* Largest mode is preferred */
475 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
476 preferred_mode = cur_mode;
477
478 /* At a given size, try to get closest to target refresh */
479 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
480 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
481 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
482 preferred_mode = cur_mode;
483 }
484 }
485
486 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
487}
488
f6e252ba
AJ
489static bool
490mode_is_rb(const struct drm_display_mode *mode)
491{
492 return (mode->htotal - mode->hdisplay == 160) &&
493 (mode->hsync_end - mode->hdisplay == 80) &&
494 (mode->hsync_end - mode->hsync_start == 32) &&
495 (mode->vsync_start - mode->vdisplay == 3);
496}
497
33c7531d
AJ
498/*
499 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
500 * @dev: Device to duplicate against
501 * @hsize: Mode width
502 * @vsize: Mode height
503 * @fresh: Mode refresh rate
f6e252ba 504 * @rb: Mode reduced-blanking-ness
33c7531d
AJ
505 *
506 * Walk the DMT mode list looking for a match for the given parameters.
507 * Return a newly allocated copy of the mode, or NULL if not found.
508 */
1d42bbc8 509struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
f6e252ba
AJ
510 int hsize, int vsize, int fresh,
511 bool rb)
559ee21d 512{
07a5e632 513 int i;
559ee21d 514
07a5e632 515 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 516 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f8b46a05
AJ
517 if (hsize != ptr->hdisplay)
518 continue;
519 if (vsize != ptr->vdisplay)
520 continue;
521 if (fresh != drm_mode_vrefresh(ptr))
522 continue;
f6e252ba
AJ
523 if (rb != mode_is_rb(ptr))
524 continue;
f8b46a05
AJ
525
526 return drm_mode_duplicate(dev, ptr);
559ee21d 527 }
f8b46a05
AJ
528
529 return NULL;
559ee21d 530}
1d42bbc8 531EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 532
d1ff6409
AJ
533typedef void detailed_cb(struct detailed_timing *timing, void *closure);
534
4d76a221
AJ
535static void
536cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
537{
538 int i, n = 0;
4966b2a9 539 u8 d = ext[0x02];
4d76a221
AJ
540 u8 *det_base = ext + d;
541
4966b2a9 542 n = (127 - d) / 18;
4d76a221
AJ
543 for (i = 0; i < n; i++)
544 cb((struct detailed_timing *)(det_base + 18 * i), closure);
545}
546
cbba98f8
AJ
547static void
548vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
549{
550 unsigned int i, n = min((int)ext[0x02], 6);
551 u8 *det_base = ext + 5;
552
553 if (ext[0x01] != 1)
554 return; /* unknown version */
555
556 for (i = 0; i < n; i++)
557 cb((struct detailed_timing *)(det_base + 18 * i), closure);
558}
559
d1ff6409
AJ
560static void
561drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
562{
563 int i;
564 struct edid *edid = (struct edid *)raw_edid;
565
566 if (edid == NULL)
567 return;
568
569 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
570 cb(&(edid->detailed_timings[i]), closure);
571
4d76a221
AJ
572 for (i = 1; i <= raw_edid[0x7e]; i++) {
573 u8 *ext = raw_edid + (i * EDID_LENGTH);
574 switch (*ext) {
575 case CEA_EXT:
576 cea_for_each_detailed_block(ext, cb, closure);
577 break;
cbba98f8
AJ
578 case VTB_EXT:
579 vtb_for_each_detailed_block(ext, cb, closure);
580 break;
4d76a221
AJ
581 default:
582 break;
583 }
584 }
d1ff6409
AJ
585}
586
587static void
588is_rb(struct detailed_timing *t, void *data)
589{
590 u8 *r = (u8 *)t;
591 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
592 if (r[15] & 0x10)
593 *(bool *)data = true;
594}
595
596/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
597static bool
598drm_monitor_supports_rb(struct edid *edid)
599{
600 if (edid->revision >= 4) {
601 bool ret;
602 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
603 return ret;
604 }
605
606 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
607}
608
7a374350
AJ
609static void
610find_gtf2(struct detailed_timing *t, void *data)
611{
612 u8 *r = (u8 *)t;
613 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
614 *(u8 **)data = r;
615}
616
617/* Secondary GTF curve kicks in above some break frequency */
618static int
619drm_gtf2_hbreak(struct edid *edid)
620{
621 u8 *r = NULL;
622 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
623 return r ? (r[12] * 2) : 0;
624}
625
626static int
627drm_gtf2_2c(struct edid *edid)
628{
629 u8 *r = NULL;
630 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
631 return r ? r[13] : 0;
632}
633
634static int
635drm_gtf2_m(struct edid *edid)
636{
637 u8 *r = NULL;
638 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
639 return r ? (r[15] << 8) + r[14] : 0;
640}
641
642static int
643drm_gtf2_k(struct edid *edid)
644{
645 u8 *r = NULL;
646 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
647 return r ? r[16] : 0;
648}
649
650static int
651drm_gtf2_2j(struct edid *edid)
652{
653 u8 *r = NULL;
654 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
655 return r ? r[17] : 0;
656}
657
658/**
659 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
660 * @edid: EDID block to scan
661 */
662static int standard_timing_level(struct edid *edid)
663{
664 if (edid->revision >= 2) {
665 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
666 return LEVEL_CVT;
667 if (drm_gtf2_hbreak(edid))
668 return LEVEL_GTF2;
669 return LEVEL_GTF;
670 }
671 return LEVEL_DMT;
672}
673
23425cae
AJ
674/*
675 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
676 * monitors fill with ascii space (0x20) instead.
677 */
678static int
679bad_std_timing(u8 a, u8 b)
680{
681 return (a == 0x00 && b == 0x00) ||
682 (a == 0x01 && b == 0x01) ||
683 (a == 0x20 && b == 0x20);
684}
685
f453ba04
DA
686/**
687 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
688 * @t: standard timing params
5c61259e 689 * @timing_level: standard timing level
f453ba04
DA
690 *
691 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 692 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 693 */
7ca6adb3 694static struct drm_display_mode *
7a374350
AJ
695drm_mode_std(struct drm_connector *connector, struct edid *edid,
696 struct std_timing *t, int revision)
f453ba04 697{
7ca6adb3
AJ
698 struct drm_device *dev = connector->dev;
699 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
700 int hsize, vsize;
701 int vrefresh_rate;
0454beab
MD
702 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
703 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
704 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
705 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 706 int timing_level = standard_timing_level(edid);
5c61259e 707
23425cae
AJ
708 if (bad_std_timing(t->hsize, t->vfreq_aspect))
709 return NULL;
710
5c61259e
ZY
711 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
712 hsize = t->hsize * 8 + 248;
713 /* vrefresh_rate = vfreq + 60 */
714 vrefresh_rate = vfreq + 60;
715 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
716 if (aspect_ratio == 0) {
717 if (revision < 3)
718 vsize = hsize;
719 else
720 vsize = (hsize * 10) / 16;
721 } else if (aspect_ratio == 1)
f453ba04 722 vsize = (hsize * 3) / 4;
0454beab 723 else if (aspect_ratio == 2)
f453ba04
DA
724 vsize = (hsize * 4) / 5;
725 else
726 vsize = (hsize * 9) / 16;
a0910c8e
AJ
727
728 /* HDTV hack, part 1 */
729 if (vrefresh_rate == 60 &&
730 ((hsize == 1360 && vsize == 765) ||
731 (hsize == 1368 && vsize == 769))) {
732 hsize = 1366;
733 vsize = 768;
734 }
735
7ca6adb3
AJ
736 /*
737 * If this connector already has a mode for this size and refresh
738 * rate (because it came from detailed or CVT info), use that
739 * instead. This way we don't have to guess at interlace or
740 * reduced blanking.
741 */
522032da 742 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
743 if (m->hdisplay == hsize && m->vdisplay == vsize &&
744 drm_mode_vrefresh(m) == vrefresh_rate)
745 return NULL;
746
a0910c8e
AJ
747 /* HDTV hack, part 2 */
748 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
749 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 750 false);
559ee21d 751 mode->hdisplay = 1366;
a4967de6
AJ
752 mode->hsync_start = mode->hsync_start - 1;
753 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
754 return mode;
755 }
a0910c8e 756
559ee21d 757 /* check whether it can be found in default mode table */
f6e252ba
AJ
758 if (drm_monitor_supports_rb(edid)) {
759 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
760 true);
761 if (mode)
762 return mode;
763 }
764 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
559ee21d
ZY
765 if (mode)
766 return mode;
767
f6e252ba 768 /* okay, generate it */
5c61259e
ZY
769 switch (timing_level) {
770 case LEVEL_DMT:
5c61259e
ZY
771 break;
772 case LEVEL_GTF:
773 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
774 break;
7a374350
AJ
775 case LEVEL_GTF2:
776 /*
777 * This is potentially wrong if there's ever a monitor with
778 * more than one ranges section, each claiming a different
779 * secondary GTF curve. Please don't do that.
780 */
781 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
fc48f169
TI
782 if (!mode)
783 return NULL;
7a374350 784 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 785 drm_mode_destroy(dev, mode);
7a374350
AJ
786 mode = drm_gtf_mode_complex(dev, hsize, vsize,
787 vrefresh_rate, 0, 0,
788 drm_gtf2_m(edid),
789 drm_gtf2_2c(edid),
790 drm_gtf2_k(edid),
791 drm_gtf2_2j(edid));
792 }
793 break;
5c61259e 794 case LEVEL_CVT:
d50ba256
DA
795 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
796 false);
5c61259e
ZY
797 break;
798 }
f453ba04
DA
799 return mode;
800}
801
b58db2c6
AJ
802/*
803 * EDID is delightfully ambiguous about how interlaced modes are to be
804 * encoded. Our internal representation is of frame height, but some
805 * HDTV detailed timings are encoded as field height.
806 *
807 * The format list here is from CEA, in frame size. Technically we
808 * should be checking refresh rate too. Whatever.
809 */
810static void
811drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
812 struct detailed_pixel_timing *pt)
813{
814 int i;
815 static const struct {
816 int w, h;
817 } cea_interlaced[] = {
818 { 1920, 1080 },
819 { 720, 480 },
820 { 1440, 480 },
821 { 2880, 480 },
822 { 720, 576 },
823 { 1440, 576 },
824 { 2880, 576 },
825 };
b58db2c6
AJ
826
827 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
828 return;
829
3c581411 830 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
831 if ((mode->hdisplay == cea_interlaced[i].w) &&
832 (mode->vdisplay == cea_interlaced[i].h / 2)) {
833 mode->vdisplay *= 2;
834 mode->vsync_start *= 2;
835 mode->vsync_end *= 2;
836 mode->vtotal *= 2;
837 mode->vtotal |= 1;
838 }
839 }
840
841 mode->flags |= DRM_MODE_FLAG_INTERLACE;
842}
843
f453ba04
DA
844/**
845 * drm_mode_detailed - create a new mode from an EDID detailed timing section
846 * @dev: DRM device (needed to create new mode)
847 * @edid: EDID block
848 * @timing: EDID detailed timing info
849 * @quirks: quirks to apply
850 *
851 * An EDID detailed timing block contains enough info for us to create and
852 * return a new struct drm_display_mode.
853 */
854static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
855 struct edid *edid,
856 struct detailed_timing *timing,
857 u32 quirks)
858{
859 struct drm_display_mode *mode;
860 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
861 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
862 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
863 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
864 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
865 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
866 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
867 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
868 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 869
fc438966 870 /* ignore tiny modes */
0454beab 871 if (hactive < 64 || vactive < 64)
fc438966
AJ
872 return NULL;
873
0454beab 874 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
875 printk(KERN_WARNING "stereo mode not supported\n");
876 return NULL;
877 }
0454beab 878 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 879 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
880 }
881
fcb45611
ZY
882 /* it is incorrect if hsync/vsync width is zero */
883 if (!hsync_pulse_width || !vsync_pulse_width) {
884 DRM_DEBUG_KMS("Incorrect Detailed timing. "
885 "Wrong Hsync/Vsync pulse width\n");
886 return NULL;
887 }
f453ba04
DA
888 mode = drm_mode_create(dev);
889 if (!mode)
890 return NULL;
891
892 mode->type = DRM_MODE_TYPE_DRIVER;
893
894 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
895 timing->pixel_clock = cpu_to_le16(1088);
896
897 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
898
899 mode->hdisplay = hactive;
900 mode->hsync_start = mode->hdisplay + hsync_offset;
901 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
902 mode->htotal = mode->hdisplay + hblank;
903
904 mode->vdisplay = vactive;
905 mode->vsync_start = mode->vdisplay + vsync_offset;
906 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
907 mode->vtotal = mode->vdisplay + vblank;
f453ba04 908
7064fef5
JB
909 /* Some EDIDs have bogus h/vtotal values */
910 if (mode->hsync_end > mode->htotal)
911 mode->htotal = mode->hsync_end + 1;
912 if (mode->vsync_end > mode->vtotal)
913 mode->vtotal = mode->vsync_end + 1;
914
b58db2c6 915 drm_mode_do_interlace_quirk(mode, pt);
f453ba04 916
171fdd89
AJ
917 drm_mode_set_name(mode);
918
f453ba04 919 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 920 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
921 }
922
0454beab
MD
923 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
924 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
925 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
926 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 927
e14cbee4
MD
928 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
929 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
930
931 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
932 mode->width_mm *= 10;
933 mode->height_mm *= 10;
934 }
935
936 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
937 mode->width_mm = edid->width_cm * 10;
938 mode->height_mm = edid->height_cm * 10;
939 }
940
941 return mode;
942}
943
b17e52ef 944static bool
b1f559ec
CW
945mode_in_hsync_range(const struct drm_display_mode *mode,
946 struct edid *edid, u8 *t)
b17e52ef
AJ
947{
948 int hsync, hmin, hmax;
949
950 hmin = t[7];
951 if (edid->revision >= 4)
952 hmin += ((t[4] & 0x04) ? 255 : 0);
953 hmax = t[8];
954 if (edid->revision >= 4)
955 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 956 hsync = drm_mode_hsync(mode);
07a5e632 957
b17e52ef
AJ
958 return (hsync <= hmax && hsync >= hmin);
959}
960
961static bool
b1f559ec
CW
962mode_in_vsync_range(const struct drm_display_mode *mode,
963 struct edid *edid, u8 *t)
b17e52ef
AJ
964{
965 int vsync, vmin, vmax;
966
967 vmin = t[5];
968 if (edid->revision >= 4)
969 vmin += ((t[4] & 0x01) ? 255 : 0);
970 vmax = t[6];
971 if (edid->revision >= 4)
972 vmax += ((t[4] & 0x02) ? 255 : 0);
973 vsync = drm_mode_vrefresh(mode);
974
975 return (vsync <= vmax && vsync >= vmin);
976}
977
978static u32
979range_pixel_clock(struct edid *edid, u8 *t)
980{
981 /* unspecified */
982 if (t[9] == 0 || t[9] == 255)
983 return 0;
984
985 /* 1.4 with CVT support gives us real precision, yay */
986 if (edid->revision >= 4 && t[10] == 0x04)
987 return (t[9] * 10000) - ((t[12] >> 2) * 250);
988
989 /* 1.3 is pathetic, so fuzz up a bit */
990 return t[9] * 10000 + 5001;
991}
992
b17e52ef 993static bool
b1f559ec 994mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
995 struct detailed_timing *timing)
996{
997 u32 max_clock;
998 u8 *t = (u8 *)timing;
999
1000 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
1001 return false;
1002
b17e52ef 1003 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
1004 return false;
1005
b17e52ef 1006 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
1007 if (mode->clock > max_clock)
1008 return false;
b17e52ef
AJ
1009
1010 /* 1.4 max horizontal check */
1011 if (edid->revision >= 4 && t[10] == 0x04)
1012 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1013 return false;
1014
1015 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1016 return false;
07a5e632
AJ
1017
1018 return true;
1019}
1020
b17e52ef 1021static int
cd4cd3de 1022drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
b17e52ef 1023 struct detailed_timing *timing)
07a5e632
AJ
1024{
1025 int i, modes = 0;
1026 struct drm_display_mode *newmode;
1027 struct drm_device *dev = connector->dev;
1028
1029 for (i = 0; i < drm_num_dmt_modes; i++) {
b17e52ef 1030 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
07a5e632
AJ
1031 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1032 if (newmode) {
1033 drm_mode_probed_add(connector, newmode);
1034 modes++;
1035 }
1036 }
1037 }
1038
1039 return modes;
1040}
1041
c09dedb7
TI
1042/* fix up 1366x768 mode from 1368x768;
1043 * GFT/CVT can't express 1366 width which isn't dividable by 8
1044 */
1045static void fixup_mode_1366x768(struct drm_display_mode *mode)
1046{
1047 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1048 mode->hdisplay = 1366;
1049 mode->hsync_start--;
1050 mode->hsync_end--;
1051 drm_mode_set_name(mode);
1052 }
1053}
1054
b309bd37
AJ
1055static int
1056drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1057 struct detailed_timing *timing)
1058{
1059 int i, modes = 0;
1060 struct drm_display_mode *newmode;
1061 struct drm_device *dev = connector->dev;
1062
1063 for (i = 0; i < num_extra_modes; i++) {
1064 const struct minimode *m = &extra_modes[i];
1065 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
fc48f169
TI
1066 if (!newmode)
1067 return modes;
b309bd37 1068
c09dedb7 1069 fixup_mode_1366x768(newmode);
b309bd37
AJ
1070 if (!mode_in_range(newmode, edid, timing)) {
1071 drm_mode_destroy(dev, newmode);
1072 continue;
1073 }
1074
1075 drm_mode_probed_add(connector, newmode);
1076 modes++;
1077 }
1078
1079 return modes;
1080}
1081
1082static int
1083drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1084 struct detailed_timing *timing)
1085{
1086 int i, modes = 0;
1087 struct drm_display_mode *newmode;
1088 struct drm_device *dev = connector->dev;
1089 bool rb = drm_monitor_supports_rb(edid);
1090
1091 for (i = 0; i < num_extra_modes; i++) {
1092 const struct minimode *m = &extra_modes[i];
1093 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
fc48f169
TI
1094 if (!newmode)
1095 return modes;
b309bd37 1096
c09dedb7 1097 fixup_mode_1366x768(newmode);
b309bd37
AJ
1098 if (!mode_in_range(newmode, edid, timing)) {
1099 drm_mode_destroy(dev, newmode);
1100 continue;
1101 }
1102
1103 drm_mode_probed_add(connector, newmode);
1104 modes++;
1105 }
1106
1107 return modes;
1108}
1109
13931579
AJ
1110static void
1111do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1112{
13931579
AJ
1113 struct detailed_mode_closure *closure = c;
1114 struct detailed_non_pixel *data = &timing->data.other_data;
b309bd37 1115 struct detailed_data_monitor_range *range = &data->data.range;
9340d8cf 1116
cb21aafe
AJ
1117 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1118 return;
1119
1120 closure->modes += drm_dmt_modes_for_range(closure->connector,
1121 closure->edid,
1122 timing);
b309bd37
AJ
1123
1124 if (!version_greater(closure->edid, 1, 1))
1125 return; /* GTF not defined yet */
1126
1127 switch (range->flags) {
1128 case 0x02: /* secondary gtf, XXX could do more */
1129 case 0x00: /* default gtf */
1130 closure->modes += drm_gtf_modes_for_range(closure->connector,
1131 closure->edid,
1132 timing);
1133 break;
1134 case 0x04: /* cvt, only in 1.4+ */
1135 if (!version_greater(closure->edid, 1, 3))
1136 break;
1137
1138 closure->modes += drm_cvt_modes_for_range(closure->connector,
1139 closure->edid,
1140 timing);
1141 break;
1142 case 0x01: /* just the ranges, no formula */
1143 default:
1144 break;
1145 }
13931579 1146}
69da3015 1147
13931579
AJ
1148static int
1149add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1150{
1151 struct detailed_mode_closure closure = {
1152 connector, edid, 0, 0, 0
1153 };
9340d8cf 1154
13931579
AJ
1155 if (version_greater(edid, 1, 0))
1156 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1157 &closure);
9340d8cf 1158
13931579 1159 return closure.modes;
9340d8cf
AJ
1160}
1161
2255be14
AJ
1162static int
1163drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1164{
1165 int i, j, m, modes = 0;
1166 struct drm_display_mode *mode;
1167 u8 *est = ((u8 *)timing) + 5;
1168
1169 for (i = 0; i < 6; i++) {
1170 for (j = 7; j > 0; j--) {
1171 m = (i * 8) + (7 - j);
3c581411 1172 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1173 break;
1174 if (est[i] & (1 << j)) {
1d42bbc8
DA
1175 mode = drm_mode_find_dmt(connector->dev,
1176 est3_modes[m].w,
1177 est3_modes[m].h,
f6e252ba
AJ
1178 est3_modes[m].r,
1179 est3_modes[m].rb);
2255be14
AJ
1180 if (mode) {
1181 drm_mode_probed_add(connector, mode);
1182 modes++;
1183 }
1184 }
1185 }
1186 }
1187
1188 return modes;
1189}
1190
13931579
AJ
1191static void
1192do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1193{
13931579 1194 struct detailed_mode_closure *closure = c;
9cf00977 1195 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1196
13931579
AJ
1197 if (data->type == EDID_DETAIL_EST_TIMINGS)
1198 closure->modes += drm_est3_modes(closure->connector, timing);
1199}
9cf00977 1200
13931579
AJ
1201/**
1202 * add_established_modes - get est. modes from EDID and add them
1203 * @edid: EDID block to scan
1204 *
1205 * Each EDID block contains a bitmap of the supported "established modes" list
1206 * (defined above). Tease them out and add them to the global modes list.
1207 */
1208static int
1209add_established_modes(struct drm_connector *connector, struct edid *edid)
1210{
1211 struct drm_device *dev = connector->dev;
1212 unsigned long est_bits = edid->established_timings.t1 |
1213 (edid->established_timings.t2 << 8) |
1214 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1215 int i, modes = 0;
1216 struct detailed_mode_closure closure = {
1217 connector, edid, 0, 0, 0
1218 };
9cf00977 1219
13931579
AJ
1220 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1221 if (est_bits & (1<<i)) {
1222 struct drm_display_mode *newmode;
1223 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1224 if (newmode) {
1225 drm_mode_probed_add(connector, newmode);
1226 modes++;
1227 }
1228 }
9cf00977
AJ
1229 }
1230
13931579
AJ
1231 if (version_greater(edid, 1, 0))
1232 drm_for_each_detailed_block((u8 *)edid,
1233 do_established_modes, &closure);
1234
1235 return modes + closure.modes;
1236}
1237
1238static void
1239do_standard_modes(struct detailed_timing *timing, void *c)
1240{
1241 struct detailed_mode_closure *closure = c;
1242 struct detailed_non_pixel *data = &timing->data.other_data;
1243 struct drm_connector *connector = closure->connector;
1244 struct edid *edid = closure->edid;
1245
1246 if (data->type == EDID_DETAIL_STD_MODES) {
1247 int i;
9cf00977
AJ
1248 for (i = 0; i < 6; i++) {
1249 struct std_timing *std;
1250 struct drm_display_mode *newmode;
1251
1252 std = &data->data.timings[i];
7a374350
AJ
1253 newmode = drm_mode_std(connector, edid, std,
1254 edid->revision);
9cf00977
AJ
1255 if (newmode) {
1256 drm_mode_probed_add(connector, newmode);
13931579 1257 closure->modes++;
9cf00977
AJ
1258 }
1259 }
9cf00977 1260 }
9cf00977
AJ
1261}
1262
f453ba04 1263/**
13931579 1264 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1265 * @edid: EDID block to scan
f453ba04 1266 *
13931579
AJ
1267 * Standard modes can be calculated using the appropriate standard (DMT,
1268 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1269 */
13931579
AJ
1270static int
1271add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1272{
9cf00977 1273 int i, modes = 0;
13931579
AJ
1274 struct detailed_mode_closure closure = {
1275 connector, edid, 0, 0, 0
1276 };
1277
1278 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1279 struct drm_display_mode *newmode;
1280
1281 newmode = drm_mode_std(connector, edid,
1282 &edid->standard_timings[i],
1283 edid->revision);
1284 if (newmode) {
1285 drm_mode_probed_add(connector, newmode);
1286 modes++;
1287 }
1288 }
1289
1290 if (version_greater(edid, 1, 0))
1291 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1292 &closure);
1293
1294 /* XXX should also look for standard codes in VTB blocks */
1295
1296 return modes + closure.modes;
1297}
f453ba04 1298
13931579
AJ
1299static int drm_cvt_modes(struct drm_connector *connector,
1300 struct detailed_timing *timing)
1301{
1302 int i, j, modes = 0;
1303 struct drm_display_mode *newmode;
1304 struct drm_device *dev = connector->dev;
1305 struct cvt_timing *cvt;
1306 const int rates[] = { 60, 85, 75, 60, 50 };
1307 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1308
13931579
AJ
1309 for (i = 0; i < 4; i++) {
1310 int uninitialized_var(width), height;
1311 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1312
13931579 1313 if (!memcmp(cvt->code, empty, 3))
9cf00977 1314 continue;
f453ba04 1315
13931579
AJ
1316 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1317 switch (cvt->code[1] & 0x0c) {
1318 case 0x00:
1319 width = height * 4 / 3;
1320 break;
1321 case 0x04:
1322 width = height * 16 / 9;
1323 break;
1324 case 0x08:
1325 width = height * 16 / 10;
1326 break;
1327 case 0x0c:
1328 width = height * 15 / 9;
1329 break;
1330 }
1331
1332 for (j = 1; j < 5; j++) {
1333 if (cvt->code[2] & (1 << j)) {
1334 newmode = drm_cvt_mode(dev, width, height,
1335 rates[j], j == 0,
1336 false, false);
1337 if (newmode) {
1338 drm_mode_probed_add(connector, newmode);
1339 modes++;
1340 }
1341 }
1342 }
f453ba04
DA
1343 }
1344
1345 return modes;
1346}
9cf00977 1347
13931579
AJ
1348static void
1349do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1350{
13931579
AJ
1351 struct detailed_mode_closure *closure = c;
1352 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1353
13931579
AJ
1354 if (data->type == EDID_DETAIL_CVT_3BYTE)
1355 closure->modes += drm_cvt_modes(closure->connector, timing);
1356}
882f0219 1357
13931579
AJ
1358static int
1359add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1360{
1361 struct detailed_mode_closure closure = {
1362 connector, edid, 0, 0, 0
1363 };
882f0219 1364
13931579
AJ
1365 if (version_greater(edid, 1, 2))
1366 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1367
13931579 1368 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1369
13931579
AJ
1370 return closure.modes;
1371}
1372
1373static void
1374do_detailed_mode(struct detailed_timing *timing, void *c)
1375{
1376 struct detailed_mode_closure *closure = c;
1377 struct drm_display_mode *newmode;
1378
1379 if (timing->pixel_clock) {
1380 newmode = drm_mode_detailed(closure->connector->dev,
1381 closure->edid, timing,
1382 closure->quirks);
1383 if (!newmode)
1384 return;
1385
1386 if (closure->preferred)
1387 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1388
1389 drm_mode_probed_add(closure->connector, newmode);
1390 closure->modes++;
1391 closure->preferred = 0;
882f0219 1392 }
13931579 1393}
882f0219 1394
13931579
AJ
1395/*
1396 * add_detailed_modes - Add modes from detailed timings
1397 * @connector: attached connector
1398 * @edid: EDID block to scan
1399 * @quirks: quirks to apply
1400 */
1401static int
1402add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1403 u32 quirks)
1404{
1405 struct detailed_mode_closure closure = {
1406 connector,
1407 edid,
1408 1,
1409 quirks,
1410 0
1411 };
1412
1413 if (closure.preferred && !version_greater(edid, 1, 3))
1414 closure.preferred =
1415 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1416
1417 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1418
1419 return closure.modes;
882f0219 1420}
f453ba04 1421
f23c20c8 1422#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1423#define AUDIO_BLOCK 0x01
54ac76f8 1424#define VIDEO_BLOCK 0x02
f23c20c8 1425#define VENDOR_BLOCK 0x03
76adaa34 1426#define SPEAKER_BLOCK 0x04
8fe9790d 1427#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1428#define EDID_CEA_YCRCB444 (1 << 5)
1429#define EDID_CEA_YCRCB422 (1 << 4)
8fe9790d 1430
f23c20c8 1431/**
8fe9790d 1432 * Search EDID for CEA extension block.
f23c20c8 1433 */
eccaca28 1434u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1435{
8fe9790d
ZW
1436 u8 *edid_ext = NULL;
1437 int i;
f23c20c8
ML
1438
1439 /* No EDID or EDID extensions */
1440 if (edid == NULL || edid->extensions == 0)
8fe9790d 1441 return NULL;
f23c20c8 1442
f23c20c8 1443 /* Find CEA extension */
7466f4cc 1444 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1445 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1446 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1447 break;
1448 }
1449
7466f4cc 1450 if (i == edid->extensions)
8fe9790d
ZW
1451 return NULL;
1452
1453 return edid_ext;
1454}
eccaca28 1455EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1456
54ac76f8
CS
1457static int
1458do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1459{
1460 struct drm_device *dev = connector->dev;
1461 u8 * mode, cea_mode;
1462 int modes = 0;
1463
1464 for (mode = db; mode < db + len; mode++) {
1465 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1466 if (cea_mode < drm_num_cea_modes) {
1467 struct drm_display_mode *newmode;
1468 newmode = drm_mode_duplicate(dev,
1469 &edid_cea_modes[cea_mode]);
1470 if (newmode) {
1471 drm_mode_probed_add(connector, newmode);
1472 modes++;
1473 }
1474 }
1475 }
1476
1477 return modes;
1478}
1479
1480static int
1481add_cea_modes(struct drm_connector *connector, struct edid *edid)
1482{
1483 u8 * cea = drm_find_cea_extension(edid);
1484 u8 * db, dbl;
1485 int modes = 0;
1486
1487 if (cea && cea[1] >= 3) {
1488 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1489 dbl = db[0] & 0x1f;
1490 if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK)
1491 modes += do_cea_modes (connector, db+1, dbl);
1492 }
1493 }
1494
1495 return modes;
1496}
1497
76adaa34
WF
1498static void
1499parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
1500{
1501 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1502
1503 connector->dvi_dual = db[6] & 1;
1504 connector->max_tmds_clock = db[7] * 5;
1505
1506 connector->latency_present[0] = db[8] >> 7;
1507 connector->latency_present[1] = (db[8] >> 6) & 1;
1508 connector->video_latency[0] = db[9];
1509 connector->audio_latency[0] = db[10];
1510 connector->video_latency[1] = db[11];
1511 connector->audio_latency[1] = db[12];
1512
1513 DRM_LOG_KMS("HDMI: DVI dual %d, "
1514 "max TMDS clock %d, "
1515 "latency present %d %d, "
1516 "video latency %d %d, "
1517 "audio latency %d %d\n",
1518 connector->dvi_dual,
1519 connector->max_tmds_clock,
1520 (int) connector->latency_present[0],
1521 (int) connector->latency_present[1],
1522 connector->video_latency[0],
1523 connector->video_latency[1],
1524 connector->audio_latency[0],
1525 connector->audio_latency[1]);
1526}
1527
1528static void
1529monitor_name(struct detailed_timing *t, void *data)
1530{
1531 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1532 *(u8 **)data = t->data.other_data.data.str.str;
1533}
1534
1535/**
1536 * drm_edid_to_eld - build ELD from EDID
1537 * @connector: connector corresponding to the HDMI/DP sink
1538 * @edid: EDID to parse
1539 *
1540 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1541 * Some ELD fields are left to the graphics driver caller:
1542 * - Conn_Type
1543 * - HDCP
1544 * - Port_ID
1545 */
1546void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1547{
1548 uint8_t *eld = connector->eld;
1549 u8 *cea;
1550 u8 *name;
1551 u8 *db;
1552 int sad_count = 0;
1553 int mnl;
1554 int dbl;
1555
1556 memset(eld, 0, sizeof(connector->eld));
1557
1558 cea = drm_find_cea_extension(edid);
1559 if (!cea) {
1560 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1561 return;
1562 }
1563
1564 name = NULL;
1565 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1566 for (mnl = 0; name && mnl < 13; mnl++) {
1567 if (name[mnl] == 0x0a)
1568 break;
1569 eld[20 + mnl] = name[mnl];
1570 }
1571 eld[4] = (cea[1] << 5) | mnl;
1572 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1573
1574 eld[0] = 2 << 3; /* ELD version: 2 */
1575
1576 eld[16] = edid->mfg_id[0];
1577 eld[17] = edid->mfg_id[1];
1578 eld[18] = edid->prod_code[0];
1579 eld[19] = edid->prod_code[1];
1580
a0ab734d
CS
1581 if (cea[1] >= 3)
1582 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1583 dbl = db[0] & 0x1f;
1584
1585 switch ((db[0] & 0xe0) >> 5) {
1586 case AUDIO_BLOCK:
1587 /* Audio Data Block, contains SADs */
1588 sad_count = dbl / 3;
1589 memcpy(eld + 20 + mnl, &db[1], dbl);
1590 break;
1591 case SPEAKER_BLOCK:
1592 /* Speaker Allocation Data Block */
1593 eld[7] = db[1];
1594 break;
1595 case VENDOR_BLOCK:
1596 /* HDMI Vendor-Specific Data Block */
1597 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0)
1598 parse_hdmi_vsdb(connector, db);
1599 break;
1600 default:
1601 break;
1602 }
76adaa34 1603 }
76adaa34
WF
1604 eld[5] |= sad_count << 4;
1605 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1606
1607 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1608}
1609EXPORT_SYMBOL(drm_edid_to_eld);
1610
1611/**
1612 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1613 * @connector: connector associated with the HDMI/DP sink
1614 * @mode: the display mode
1615 */
1616int drm_av_sync_delay(struct drm_connector *connector,
1617 struct drm_display_mode *mode)
1618{
1619 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1620 int a, v;
1621
1622 if (!connector->latency_present[0])
1623 return 0;
1624 if (!connector->latency_present[1])
1625 i = 0;
1626
1627 a = connector->audio_latency[i];
1628 v = connector->video_latency[i];
1629
1630 /*
1631 * HDMI/DP sink doesn't support audio or video?
1632 */
1633 if (a == 255 || v == 255)
1634 return 0;
1635
1636 /*
1637 * Convert raw EDID values to millisecond.
1638 * Treat unknown latency as 0ms.
1639 */
1640 if (a)
1641 a = min(2 * (a - 1), 500);
1642 if (v)
1643 v = min(2 * (v - 1), 500);
1644
1645 return max(v - a, 0);
1646}
1647EXPORT_SYMBOL(drm_av_sync_delay);
1648
1649/**
1650 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1651 * @encoder: the encoder just changed display mode
1652 * @mode: the adjusted display mode
1653 *
1654 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1655 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1656 */
1657struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1658 struct drm_display_mode *mode)
1659{
1660 struct drm_connector *connector;
1661 struct drm_device *dev = encoder->dev;
1662
1663 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1664 if (connector->encoder == encoder && connector->eld[0])
1665 return connector;
1666
1667 return NULL;
1668}
1669EXPORT_SYMBOL(drm_select_eld);
1670
8fe9790d
ZW
1671/**
1672 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1673 * @edid: monitor EDID information
1674 *
1675 * Parse the CEA extension according to CEA-861-B.
1676 * Return true if HDMI, false if not or unknown.
1677 */
1678bool drm_detect_hdmi_monitor(struct edid *edid)
1679{
1680 u8 *edid_ext;
1681 int i, hdmi_id;
1682 int start_offset, end_offset;
1683 bool is_hdmi = false;
1684
1685 edid_ext = drm_find_cea_extension(edid);
1686 if (!edid_ext)
f23c20c8
ML
1687 goto end;
1688
1689 /* Data block offset in CEA extension block */
1690 start_offset = 4;
1691 end_offset = edid_ext[2];
1692
1693 /*
1694 * Because HDMI identifier is in Vendor Specific Block,
1695 * search it from all data blocks of CEA extension.
1696 */
1697 for (i = start_offset; i < end_offset;
1698 /* Increased by data block len */
1699 i += ((edid_ext[i] & 0x1f) + 1)) {
1700 /* Find vendor specific block */
1701 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1702 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1703 edid_ext[i + 3] << 16;
1704 /* Find HDMI identifier */
1705 if (hdmi_id == HDMI_IDENTIFIER)
1706 is_hdmi = true;
1707 break;
1708 }
1709 }
1710
1711end:
1712 return is_hdmi;
1713}
1714EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1715
8fe9790d
ZW
1716/**
1717 * drm_detect_monitor_audio - check monitor audio capability
1718 *
1719 * Monitor should have CEA extension block.
1720 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1721 * audio' only. If there is any audio extension block and supported
1722 * audio format, assume at least 'basic audio' support, even if 'basic
1723 * audio' is not defined in EDID.
1724 *
1725 */
1726bool drm_detect_monitor_audio(struct edid *edid)
1727{
1728 u8 *edid_ext;
1729 int i, j;
1730 bool has_audio = false;
1731 int start_offset, end_offset;
1732
1733 edid_ext = drm_find_cea_extension(edid);
1734 if (!edid_ext)
1735 goto end;
1736
1737 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1738
1739 if (has_audio) {
1740 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1741 goto end;
1742 }
1743
1744 /* Data block offset in CEA extension block */
1745 start_offset = 4;
1746 end_offset = edid_ext[2];
1747
1748 for (i = start_offset; i < end_offset;
1749 i += ((edid_ext[i] & 0x1f) + 1)) {
1750 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1751 has_audio = true;
1752 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1753 DRM_DEBUG_KMS("CEA audio format %d\n",
1754 (edid_ext[i + j] >> 3) & 0xf);
1755 goto end;
1756 }
1757 }
1758end:
1759 return has_audio;
1760}
1761EXPORT_SYMBOL(drm_detect_monitor_audio);
1762
3b11228b
JB
1763/**
1764 * drm_add_display_info - pull display info out if present
1765 * @edid: EDID data
1766 * @info: display info (attached to connector)
1767 *
1768 * Grab any available display info and stuff it into the drm_display_info
1769 * structure that's part of the connector. Useful for tracking bpp and
1770 * color spaces.
1771 */
1772static void drm_add_display_info(struct edid *edid,
1773 struct drm_display_info *info)
1774{
ebec9a7b
JB
1775 u8 *edid_ext;
1776
3b11228b
JB
1777 info->width_mm = edid->width_cm * 10;
1778 info->height_mm = edid->height_cm * 10;
1779
1780 /* driver figures it out in this case */
1781 info->bpc = 0;
da05a5a7 1782 info->color_formats = 0;
3b11228b 1783
a988bc72 1784 if (edid->revision < 3)
3b11228b
JB
1785 return;
1786
1787 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1788 return;
1789
a988bc72
LPC
1790 /* Get data from CEA blocks if present */
1791 edid_ext = drm_find_cea_extension(edid);
1792 if (edid_ext) {
1793 info->cea_rev = edid_ext[1];
1794
1795 /* The existence of a CEA block should imply RGB support */
1796 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1797 if (edid_ext[3] & EDID_CEA_YCRCB444)
1798 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1799 if (edid_ext[3] & EDID_CEA_YCRCB422)
1800 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1801 }
1802
1803 /* Only defined for 1.4 with digital displays */
1804 if (edid->revision < 4)
1805 return;
1806
3b11228b
JB
1807 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1808 case DRM_EDID_DIGITAL_DEPTH_6:
1809 info->bpc = 6;
1810 break;
1811 case DRM_EDID_DIGITAL_DEPTH_8:
1812 info->bpc = 8;
1813 break;
1814 case DRM_EDID_DIGITAL_DEPTH_10:
1815 info->bpc = 10;
1816 break;
1817 case DRM_EDID_DIGITAL_DEPTH_12:
1818 info->bpc = 12;
1819 break;
1820 case DRM_EDID_DIGITAL_DEPTH_14:
1821 info->bpc = 14;
1822 break;
1823 case DRM_EDID_DIGITAL_DEPTH_16:
1824 info->bpc = 16;
1825 break;
1826 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1827 default:
1828 info->bpc = 0;
1829 break;
1830 }
da05a5a7 1831
a988bc72 1832 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
1833 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1834 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1835 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1836 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
1837}
1838
f453ba04
DA
1839/**
1840 * drm_add_edid_modes - add modes from EDID data, if available
1841 * @connector: connector we're probing
1842 * @edid: edid data
1843 *
1844 * Add the specified modes to the connector's mode list.
1845 *
1846 * Return number of modes added or 0 if we couldn't find any.
1847 */
1848int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1849{
1850 int num_modes = 0;
1851 u32 quirks;
1852
1853 if (edid == NULL) {
1854 return 0;
1855 }
3c537889 1856 if (!drm_edid_is_valid(edid)) {
dcdb1674 1857 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1858 drm_get_connector_name(connector));
1859 return 0;
1860 }
1861
1862 quirks = edid_get_quirks(edid);
1863
c867df70
AJ
1864 /*
1865 * EDID spec says modes should be preferred in this order:
1866 * - preferred detailed mode
1867 * - other detailed modes from base block
1868 * - detailed modes from extension blocks
1869 * - CVT 3-byte code modes
1870 * - standard timing codes
1871 * - established timing codes
1872 * - modes inferred from GTF or CVT range information
1873 *
13931579 1874 * We get this pretty much right.
c867df70
AJ
1875 *
1876 * XXX order for additional mode types in extension blocks?
1877 */
13931579
AJ
1878 num_modes += add_detailed_modes(connector, edid, quirks);
1879 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1880 num_modes += add_standard_modes(connector, edid);
1881 num_modes += add_established_modes(connector, edid);
13931579 1882 num_modes += add_inferred_modes(connector, edid);
54ac76f8 1883 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
1884
1885 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1886 edid_fixup_preferred(connector, quirks);
1887
3b11228b 1888 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
1889
1890 return num_modes;
1891}
1892EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1893
1894/**
1895 * drm_add_modes_noedid - add modes for the connectors without EDID
1896 * @connector: connector we're probing
1897 * @hdisplay: the horizontal display limit
1898 * @vdisplay: the vertical display limit
1899 *
1900 * Add the specified modes to the connector's mode list. Only when the
1901 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1902 *
1903 * Return number of modes added or 0 if we couldn't find any.
1904 */
1905int drm_add_modes_noedid(struct drm_connector *connector,
1906 int hdisplay, int vdisplay)
1907{
1908 int i, count, num_modes = 0;
b1f559ec 1909 struct drm_display_mode *mode;
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ZY
1910 struct drm_device *dev = connector->dev;
1911
1912 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1913 if (hdisplay < 0)
1914 hdisplay = 0;
1915 if (vdisplay < 0)
1916 vdisplay = 0;
1917
1918 for (i = 0; i < count; i++) {
b1f559ec 1919 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
1920 if (hdisplay && vdisplay) {
1921 /*
1922 * Only when two are valid, they will be used to check
1923 * whether the mode should be added to the mode list of
1924 * the connector.
1925 */
1926 if (ptr->hdisplay > hdisplay ||
1927 ptr->vdisplay > vdisplay)
1928 continue;
1929 }
f985dedb
AJ
1930 if (drm_mode_vrefresh(ptr) > 61)
1931 continue;
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ZY
1932 mode = drm_mode_duplicate(dev, ptr);
1933 if (mode) {
1934 drm_mode_probed_add(connector, mode);
1935 num_modes++;
1936 }
1937 }
1938 return num_modes;
1939}
1940EXPORT_SYMBOL(drm_add_modes_noedid);
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