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f453ba04 DA |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) | |
3 | * Copyright (c) 2007-2008 Intel Corporation | |
4 | * Jesse Barnes <jesse.barnes@intel.com> | |
61e57a8d | 5 | * Copyright 2010 Red Hat, Inc. |
f453ba04 DA |
6 | * |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from | |
8 | * FB layer. | |
9 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> | |
10 | * | |
11 | * Permission is hereby granted, free of charge, to any person obtaining a | |
12 | * copy of this software and associated documentation files (the "Software"), | |
13 | * to deal in the Software without restriction, including without limitation | |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | |
15 | * and/or sell copies of the Software, and to permit persons to whom the | |
16 | * Software is furnished to do so, subject to the following conditions: | |
17 | * | |
18 | * The above copyright notice and this permission notice (including the | |
19 | * next paragraph) shall be included in all copies or substantial portions | |
20 | * of the Software. | |
21 | * | |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
28 | * DEALINGS IN THE SOFTWARE. | |
29 | */ | |
30 | #include <linux/kernel.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
f453ba04 | 32 | #include <linux/i2c.h> |
2d1a8a48 | 33 | #include <linux/export.h> |
f453ba04 DA |
34 | #include "drmP.h" |
35 | #include "drm_edid.h" | |
38fcbb67 | 36 | #include "drm_edid_modes.h" |
f453ba04 | 37 | |
13931579 AJ |
38 | #define version_greater(edid, maj, min) \ |
39 | (((edid)->version > (maj)) || \ | |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) | |
f453ba04 | 41 | |
d1ff6409 AJ |
42 | #define EDID_EST_TIMINGS 16 |
43 | #define EDID_STD_TIMINGS 8 | |
44 | #define EDID_DETAILED_TIMINGS 4 | |
f453ba04 DA |
45 | |
46 | /* | |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect | |
48 | * them here (note that userspace may work around broken monitors first, | |
49 | * but fixes should make their way here so that the kernel "just works" | |
50 | * on as many displays as possible). | |
51 | */ | |
52 | ||
53 | /* First detailed mode wrong, use largest 60Hz mode */ | |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) | |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ | |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) | |
57 | /* Prefer the largest mode at 75 Hz */ | |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) | |
59 | /* Detail timing is in cm not mm */ | |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) | |
61 | /* Detailed timing descriptors have bogus size values, so just take the | |
62 | * maximum size and use that. | |
63 | */ | |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) | |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ | |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) | |
67 | /* use +hsync +vsync for detailed mode */ | |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) | |
3c537889 | 69 | |
13931579 AJ |
70 | struct detailed_mode_closure { |
71 | struct drm_connector *connector; | |
72 | struct edid *edid; | |
73 | bool preferred; | |
74 | u32 quirks; | |
75 | int modes; | |
76 | }; | |
f453ba04 | 77 | |
5c61259e ZY |
78 | #define LEVEL_DMT 0 |
79 | #define LEVEL_GTF 1 | |
7a374350 AJ |
80 | #define LEVEL_GTF2 2 |
81 | #define LEVEL_CVT 3 | |
5c61259e | 82 | |
f453ba04 DA |
83 | static struct edid_quirk { |
84 | char *vendor; | |
85 | int product_id; | |
86 | u32 quirks; | |
87 | } edid_quirk_list[] = { | |
88 | /* Acer AL1706 */ | |
89 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, | |
90 | /* Acer F51 */ | |
91 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, | |
92 | /* Unknown Acer */ | |
93 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
94 | ||
95 | /* Belinea 10 15 55 */ | |
96 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, | |
97 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, | |
98 | ||
99 | /* Envision Peripherals, Inc. EN-7100e */ | |
100 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, | |
ba1163de AJ |
101 | /* Envision EN2028 */ |
102 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, | |
f453ba04 DA |
103 | |
104 | /* Funai Electronics PM36B */ | |
105 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | | |
106 | EDID_QUIRK_DETAILED_IN_CM }, | |
107 | ||
108 | /* LG Philips LCD LP154W01-A5 */ | |
109 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
110 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
111 | ||
112 | /* Philips 107p5 CRT */ | |
113 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
114 | ||
115 | /* Proview AY765C */ | |
116 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
117 | ||
118 | /* Samsung SyncMaster 205BW. Note: irony */ | |
119 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, | |
120 | /* Samsung SyncMaster 22[5-6]BW */ | |
121 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, | |
122 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, | |
123 | }; | |
124 | ||
61e57a8d | 125 | /*** DDC fetch and block validation ***/ |
f453ba04 | 126 | |
083ae056 AJ |
127 | static const u8 edid_header[] = { |
128 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 | |
129 | }; | |
f453ba04 | 130 | |
051963d4 TR |
131 | /* |
132 | * Sanity check the header of the base EDID block. Return 8 if the header | |
133 | * is perfect, down to 0 if it's totally wrong. | |
134 | */ | |
135 | int drm_edid_header_is_valid(const u8 *raw_edid) | |
136 | { | |
137 | int i, score = 0; | |
138 | ||
139 | for (i = 0; i < sizeof(edid_header); i++) | |
140 | if (raw_edid[i] == edid_header[i]) | |
141 | score++; | |
142 | ||
143 | return score; | |
144 | } | |
145 | EXPORT_SYMBOL(drm_edid_header_is_valid); | |
146 | ||
147 | ||
61e57a8d AJ |
148 | /* |
149 | * Sanity check the EDID block (base or extension). Return 0 if the block | |
150 | * doesn't check out, or 1 if it's valid. | |
f453ba04 | 151 | */ |
da0df92b | 152 | bool drm_edid_block_valid(u8 *raw_edid) |
f453ba04 | 153 | { |
61e57a8d | 154 | int i; |
f453ba04 | 155 | u8 csum = 0; |
61e57a8d | 156 | struct edid *edid = (struct edid *)raw_edid; |
f453ba04 | 157 | |
61e57a8d | 158 | if (raw_edid[0] == 0x00) { |
051963d4 | 159 | int score = drm_edid_header_is_valid(raw_edid); |
61e57a8d AJ |
160 | if (score == 8) ; |
161 | else if (score >= 6) { | |
162 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); | |
163 | memcpy(raw_edid, edid_header, sizeof(edid_header)); | |
164 | } else { | |
165 | goto bad; | |
166 | } | |
167 | } | |
f453ba04 DA |
168 | |
169 | for (i = 0; i < EDID_LENGTH; i++) | |
170 | csum += raw_edid[i]; | |
171 | if (csum) { | |
172 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); | |
4a638b4e AJ |
173 | |
174 | /* allow CEA to slide through, switches mangle this */ | |
175 | if (raw_edid[0] != 0x02) | |
176 | goto bad; | |
f453ba04 DA |
177 | } |
178 | ||
61e57a8d AJ |
179 | /* per-block-type checks */ |
180 | switch (raw_edid[0]) { | |
181 | case 0: /* base */ | |
182 | if (edid->version != 1) { | |
183 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); | |
184 | goto bad; | |
185 | } | |
862b89c0 | 186 | |
61e57a8d AJ |
187 | if (edid->revision > 4) |
188 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); | |
189 | break; | |
862b89c0 | 190 | |
61e57a8d AJ |
191 | default: |
192 | break; | |
193 | } | |
47ee4ccf | 194 | |
f453ba04 DA |
195 | return 1; |
196 | ||
197 | bad: | |
198 | if (raw_edid) { | |
f49dadb8 | 199 | printk(KERN_ERR "Raw EDID:\n"); |
0aff47f2 TV |
200 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
201 | raw_edid, EDID_LENGTH, false); | |
f453ba04 DA |
202 | } |
203 | return 0; | |
204 | } | |
da0df92b | 205 | EXPORT_SYMBOL(drm_edid_block_valid); |
61e57a8d AJ |
206 | |
207 | /** | |
208 | * drm_edid_is_valid - sanity check EDID data | |
209 | * @edid: EDID data | |
210 | * | |
211 | * Sanity-check an entire EDID record (including extensions) | |
212 | */ | |
213 | bool drm_edid_is_valid(struct edid *edid) | |
214 | { | |
215 | int i; | |
216 | u8 *raw = (u8 *)edid; | |
217 | ||
218 | if (!edid) | |
219 | return false; | |
220 | ||
221 | for (i = 0; i <= edid->extensions; i++) | |
222 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH)) | |
223 | return false; | |
224 | ||
225 | return true; | |
226 | } | |
3c537889 | 227 | EXPORT_SYMBOL(drm_edid_is_valid); |
f453ba04 | 228 | |
61e57a8d AJ |
229 | #define DDC_SEGMENT_ADDR 0x30 |
230 | /** | |
231 | * Get EDID information via I2C. | |
232 | * | |
233 | * \param adapter : i2c device adaptor | |
234 | * \param buf : EDID data buffer to be filled | |
235 | * \param len : EDID data buffer length | |
236 | * \return 0 on success or -1 on failure. | |
237 | * | |
238 | * Try to fetch EDID information by calling i2c driver function. | |
239 | */ | |
240 | static int | |
241 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, | |
242 | int block, int len) | |
243 | { | |
244 | unsigned char start = block * EDID_LENGTH; | |
4819d2e4 CW |
245 | int ret, retries = 5; |
246 | ||
247 | /* The core i2c driver will automatically retry the transfer if the | |
248 | * adapter reports EAGAIN. However, we find that bit-banging transfers | |
249 | * are susceptible to errors under a heavily loaded machine and | |
250 | * generate spurious NAKs and timeouts. Retrying the transfer | |
251 | * of the individual block a few times seems to overcome this. | |
252 | */ | |
253 | do { | |
254 | struct i2c_msg msgs[] = { | |
255 | { | |
256 | .addr = DDC_ADDR, | |
257 | .flags = 0, | |
258 | .len = 1, | |
259 | .buf = &start, | |
260 | }, { | |
261 | .addr = DDC_ADDR, | |
262 | .flags = I2C_M_RD, | |
263 | .len = len, | |
264 | .buf = buf, | |
265 | } | |
266 | }; | |
267 | ret = i2c_transfer(adapter, msgs, 2); | |
9292f37e ED |
268 | if (ret == -ENXIO) { |
269 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", | |
270 | adapter->name); | |
271 | break; | |
272 | } | |
4819d2e4 CW |
273 | } while (ret != 2 && --retries); |
274 | ||
275 | return ret == 2 ? 0 : -1; | |
61e57a8d AJ |
276 | } |
277 | ||
4a9a8b71 DA |
278 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
279 | { | |
280 | int i; | |
281 | u32 *raw_edid = (u32 *)in_edid; | |
282 | ||
283 | for (i = 0; i < length / 4; i++) | |
284 | if (*(raw_edid + i) != 0) | |
285 | return false; | |
286 | return true; | |
287 | } | |
288 | ||
61e57a8d AJ |
289 | static u8 * |
290 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) | |
291 | { | |
0ea75e23 | 292 | int i, j = 0, valid_extensions = 0; |
61e57a8d AJ |
293 | u8 *block, *new; |
294 | ||
295 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) | |
296 | return NULL; | |
297 | ||
298 | /* base block fetch */ | |
299 | for (i = 0; i < 4; i++) { | |
300 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) | |
301 | goto out; | |
302 | if (drm_edid_block_valid(block)) | |
303 | break; | |
4a9a8b71 DA |
304 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
305 | connector->null_edid_counter++; | |
306 | goto carp; | |
307 | } | |
61e57a8d AJ |
308 | } |
309 | if (i == 4) | |
310 | goto carp; | |
311 | ||
312 | /* if there's no extensions, we're done */ | |
313 | if (block[0x7e] == 0) | |
314 | return block; | |
315 | ||
316 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); | |
317 | if (!new) | |
318 | goto out; | |
319 | block = new; | |
320 | ||
321 | for (j = 1; j <= block[0x7e]; j++) { | |
322 | for (i = 0; i < 4; i++) { | |
0ea75e23 ST |
323 | if (drm_do_probe_ddc_edid(adapter, |
324 | block + (valid_extensions + 1) * EDID_LENGTH, | |
325 | j, EDID_LENGTH)) | |
61e57a8d | 326 | goto out; |
0ea75e23 ST |
327 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) { |
328 | valid_extensions++; | |
61e57a8d | 329 | break; |
0ea75e23 | 330 | } |
61e57a8d AJ |
331 | } |
332 | if (i == 4) | |
0ea75e23 ST |
333 | dev_warn(connector->dev->dev, |
334 | "%s: Ignoring invalid EDID block %d.\n", | |
335 | drm_get_connector_name(connector), j); | |
336 | } | |
337 | ||
338 | if (valid_extensions != block[0x7e]) { | |
339 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; | |
340 | block[0x7e] = valid_extensions; | |
341 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); | |
342 | if (!new) | |
343 | goto out; | |
344 | block = new; | |
61e57a8d AJ |
345 | } |
346 | ||
347 | return block; | |
348 | ||
349 | carp: | |
dcdb1674 | 350 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
61e57a8d AJ |
351 | drm_get_connector_name(connector), j); |
352 | ||
353 | out: | |
354 | kfree(block); | |
355 | return NULL; | |
356 | } | |
357 | ||
358 | /** | |
359 | * Probe DDC presence. | |
360 | * | |
361 | * \param adapter : i2c device adaptor | |
362 | * \return 1 on success | |
363 | */ | |
364 | static bool | |
365 | drm_probe_ddc(struct i2c_adapter *adapter) | |
366 | { | |
367 | unsigned char out; | |
368 | ||
369 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); | |
370 | } | |
371 | ||
372 | /** | |
373 | * drm_get_edid - get EDID data, if available | |
374 | * @connector: connector we're probing | |
375 | * @adapter: i2c adapter to use for DDC | |
376 | * | |
377 | * Poke the given i2c channel to grab EDID data if possible. If found, | |
378 | * attach it to the connector. | |
379 | * | |
380 | * Return edid data or NULL if we couldn't find any. | |
381 | */ | |
382 | struct edid *drm_get_edid(struct drm_connector *connector, | |
383 | struct i2c_adapter *adapter) | |
384 | { | |
385 | struct edid *edid = NULL; | |
386 | ||
387 | if (drm_probe_ddc(adapter)) | |
388 | edid = (struct edid *)drm_do_get_edid(connector, adapter); | |
389 | ||
390 | connector->display_info.raw_edid = (char *)edid; | |
391 | ||
392 | return edid; | |
393 | ||
394 | } | |
395 | EXPORT_SYMBOL(drm_get_edid); | |
396 | ||
397 | /*** EDID parsing ***/ | |
398 | ||
f453ba04 DA |
399 | /** |
400 | * edid_vendor - match a string against EDID's obfuscated vendor field | |
401 | * @edid: EDID to match | |
402 | * @vendor: vendor string | |
403 | * | |
404 | * Returns true if @vendor is in @edid, false otherwise | |
405 | */ | |
406 | static bool edid_vendor(struct edid *edid, char *vendor) | |
407 | { | |
408 | char edid_vendor[3]; | |
409 | ||
410 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; | |
411 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | | |
412 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; | |
16456c87 | 413 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
f453ba04 DA |
414 | |
415 | return !strncmp(edid_vendor, vendor, 3); | |
416 | } | |
417 | ||
418 | /** | |
419 | * edid_get_quirks - return quirk flags for a given EDID | |
420 | * @edid: EDID to process | |
421 | * | |
422 | * This tells subsequent routines what fixes they need to apply. | |
423 | */ | |
424 | static u32 edid_get_quirks(struct edid *edid) | |
425 | { | |
426 | struct edid_quirk *quirk; | |
427 | int i; | |
428 | ||
429 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { | |
430 | quirk = &edid_quirk_list[i]; | |
431 | ||
432 | if (edid_vendor(edid, quirk->vendor) && | |
433 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) | |
434 | return quirk->quirks; | |
435 | } | |
436 | ||
437 | return 0; | |
438 | } | |
439 | ||
440 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) | |
441 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) | |
442 | ||
f453ba04 DA |
443 | /** |
444 | * edid_fixup_preferred - set preferred modes based on quirk list | |
445 | * @connector: has mode list to fix up | |
446 | * @quirks: quirks list | |
447 | * | |
448 | * Walk the mode list for @connector, clearing the preferred status | |
449 | * on existing modes and setting it anew for the right mode ala @quirks. | |
450 | */ | |
451 | static void edid_fixup_preferred(struct drm_connector *connector, | |
452 | u32 quirks) | |
453 | { | |
454 | struct drm_display_mode *t, *cur_mode, *preferred_mode; | |
f890607b | 455 | int target_refresh = 0; |
f453ba04 DA |
456 | |
457 | if (list_empty(&connector->probed_modes)) | |
458 | return; | |
459 | ||
460 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) | |
461 | target_refresh = 60; | |
462 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) | |
463 | target_refresh = 75; | |
464 | ||
465 | preferred_mode = list_first_entry(&connector->probed_modes, | |
466 | struct drm_display_mode, head); | |
467 | ||
468 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { | |
469 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; | |
470 | ||
471 | if (cur_mode == preferred_mode) | |
472 | continue; | |
473 | ||
474 | /* Largest mode is preferred */ | |
475 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) | |
476 | preferred_mode = cur_mode; | |
477 | ||
478 | /* At a given size, try to get closest to target refresh */ | |
479 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && | |
480 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < | |
481 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { | |
482 | preferred_mode = cur_mode; | |
483 | } | |
484 | } | |
485 | ||
486 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; | |
487 | } | |
488 | ||
1d42bbc8 DA |
489 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
490 | int hsize, int vsize, int fresh) | |
559ee21d | 491 | { |
b1f559ec | 492 | struct drm_display_mode *mode = NULL; |
07a5e632 | 493 | int i; |
559ee21d | 494 | |
07a5e632 | 495 | for (i = 0; i < drm_num_dmt_modes; i++) { |
b1f559ec | 496 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
559ee21d ZY |
497 | if (hsize == ptr->hdisplay && |
498 | vsize == ptr->vdisplay && | |
499 | fresh == drm_mode_vrefresh(ptr)) { | |
500 | /* get the expected default mode */ | |
501 | mode = drm_mode_duplicate(dev, ptr); | |
502 | break; | |
503 | } | |
504 | } | |
505 | return mode; | |
506 | } | |
1d42bbc8 | 507 | EXPORT_SYMBOL(drm_mode_find_dmt); |
23425cae | 508 | |
d1ff6409 AJ |
509 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
510 | ||
4d76a221 AJ |
511 | static void |
512 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
513 | { | |
514 | int i, n = 0; | |
4966b2a9 | 515 | u8 d = ext[0x02]; |
4d76a221 AJ |
516 | u8 *det_base = ext + d; |
517 | ||
4966b2a9 | 518 | n = (127 - d) / 18; |
4d76a221 AJ |
519 | for (i = 0; i < n; i++) |
520 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
521 | } | |
522 | ||
cbba98f8 AJ |
523 | static void |
524 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
525 | { | |
526 | unsigned int i, n = min((int)ext[0x02], 6); | |
527 | u8 *det_base = ext + 5; | |
528 | ||
529 | if (ext[0x01] != 1) | |
530 | return; /* unknown version */ | |
531 | ||
532 | for (i = 0; i < n; i++) | |
533 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
534 | } | |
535 | ||
d1ff6409 AJ |
536 | static void |
537 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) | |
538 | { | |
539 | int i; | |
540 | struct edid *edid = (struct edid *)raw_edid; | |
541 | ||
542 | if (edid == NULL) | |
543 | return; | |
544 | ||
545 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) | |
546 | cb(&(edid->detailed_timings[i]), closure); | |
547 | ||
4d76a221 AJ |
548 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
549 | u8 *ext = raw_edid + (i * EDID_LENGTH); | |
550 | switch (*ext) { | |
551 | case CEA_EXT: | |
552 | cea_for_each_detailed_block(ext, cb, closure); | |
553 | break; | |
cbba98f8 AJ |
554 | case VTB_EXT: |
555 | vtb_for_each_detailed_block(ext, cb, closure); | |
556 | break; | |
4d76a221 AJ |
557 | default: |
558 | break; | |
559 | } | |
560 | } | |
d1ff6409 AJ |
561 | } |
562 | ||
563 | static void | |
564 | is_rb(struct detailed_timing *t, void *data) | |
565 | { | |
566 | u8 *r = (u8 *)t; | |
567 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) | |
568 | if (r[15] & 0x10) | |
569 | *(bool *)data = true; | |
570 | } | |
571 | ||
572 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ | |
573 | static bool | |
574 | drm_monitor_supports_rb(struct edid *edid) | |
575 | { | |
576 | if (edid->revision >= 4) { | |
577 | bool ret; | |
578 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); | |
579 | return ret; | |
580 | } | |
581 | ||
582 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); | |
583 | } | |
584 | ||
7a374350 AJ |
585 | static void |
586 | find_gtf2(struct detailed_timing *t, void *data) | |
587 | { | |
588 | u8 *r = (u8 *)t; | |
589 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) | |
590 | *(u8 **)data = r; | |
591 | } | |
592 | ||
593 | /* Secondary GTF curve kicks in above some break frequency */ | |
594 | static int | |
595 | drm_gtf2_hbreak(struct edid *edid) | |
596 | { | |
597 | u8 *r = NULL; | |
598 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
599 | return r ? (r[12] * 2) : 0; | |
600 | } | |
601 | ||
602 | static int | |
603 | drm_gtf2_2c(struct edid *edid) | |
604 | { | |
605 | u8 *r = NULL; | |
606 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
607 | return r ? r[13] : 0; | |
608 | } | |
609 | ||
610 | static int | |
611 | drm_gtf2_m(struct edid *edid) | |
612 | { | |
613 | u8 *r = NULL; | |
614 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
615 | return r ? (r[15] << 8) + r[14] : 0; | |
616 | } | |
617 | ||
618 | static int | |
619 | drm_gtf2_k(struct edid *edid) | |
620 | { | |
621 | u8 *r = NULL; | |
622 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
623 | return r ? r[16] : 0; | |
624 | } | |
625 | ||
626 | static int | |
627 | drm_gtf2_2j(struct edid *edid) | |
628 | { | |
629 | u8 *r = NULL; | |
630 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
631 | return r ? r[17] : 0; | |
632 | } | |
633 | ||
634 | /** | |
635 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) | |
636 | * @edid: EDID block to scan | |
637 | */ | |
638 | static int standard_timing_level(struct edid *edid) | |
639 | { | |
640 | if (edid->revision >= 2) { | |
641 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) | |
642 | return LEVEL_CVT; | |
643 | if (drm_gtf2_hbreak(edid)) | |
644 | return LEVEL_GTF2; | |
645 | return LEVEL_GTF; | |
646 | } | |
647 | return LEVEL_DMT; | |
648 | } | |
649 | ||
23425cae AJ |
650 | /* |
651 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old | |
652 | * monitors fill with ascii space (0x20) instead. | |
653 | */ | |
654 | static int | |
655 | bad_std_timing(u8 a, u8 b) | |
656 | { | |
657 | return (a == 0x00 && b == 0x00) || | |
658 | (a == 0x01 && b == 0x01) || | |
659 | (a == 0x20 && b == 0x20); | |
660 | } | |
661 | ||
f453ba04 DA |
662 | /** |
663 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode | |
664 | * @t: standard timing params | |
5c61259e | 665 | * @timing_level: standard timing level |
f453ba04 DA |
666 | * |
667 | * Take the standard timing params (in this case width, aspect, and refresh) | |
5c61259e | 668 | * and convert them into a real mode using CVT/GTF/DMT. |
f453ba04 | 669 | */ |
7ca6adb3 | 670 | static struct drm_display_mode * |
7a374350 AJ |
671 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
672 | struct std_timing *t, int revision) | |
f453ba04 | 673 | { |
7ca6adb3 AJ |
674 | struct drm_device *dev = connector->dev; |
675 | struct drm_display_mode *m, *mode = NULL; | |
5c61259e ZY |
676 | int hsize, vsize; |
677 | int vrefresh_rate; | |
0454beab MD |
678 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
679 | >> EDID_TIMING_ASPECT_SHIFT; | |
5c61259e ZY |
680 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
681 | >> EDID_TIMING_VFREQ_SHIFT; | |
7a374350 | 682 | int timing_level = standard_timing_level(edid); |
5c61259e | 683 | |
23425cae AJ |
684 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
685 | return NULL; | |
686 | ||
5c61259e ZY |
687 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
688 | hsize = t->hsize * 8 + 248; | |
689 | /* vrefresh_rate = vfreq + 60 */ | |
690 | vrefresh_rate = vfreq + 60; | |
691 | /* the vdisplay is calculated based on the aspect ratio */ | |
f066a17d AJ |
692 | if (aspect_ratio == 0) { |
693 | if (revision < 3) | |
694 | vsize = hsize; | |
695 | else | |
696 | vsize = (hsize * 10) / 16; | |
697 | } else if (aspect_ratio == 1) | |
f453ba04 | 698 | vsize = (hsize * 3) / 4; |
0454beab | 699 | else if (aspect_ratio == 2) |
f453ba04 DA |
700 | vsize = (hsize * 4) / 5; |
701 | else | |
702 | vsize = (hsize * 9) / 16; | |
a0910c8e AJ |
703 | |
704 | /* HDTV hack, part 1 */ | |
705 | if (vrefresh_rate == 60 && | |
706 | ((hsize == 1360 && vsize == 765) || | |
707 | (hsize == 1368 && vsize == 769))) { | |
708 | hsize = 1366; | |
709 | vsize = 768; | |
710 | } | |
711 | ||
7ca6adb3 AJ |
712 | /* |
713 | * If this connector already has a mode for this size and refresh | |
714 | * rate (because it came from detailed or CVT info), use that | |
715 | * instead. This way we don't have to guess at interlace or | |
716 | * reduced blanking. | |
717 | */ | |
522032da | 718 | list_for_each_entry(m, &connector->probed_modes, head) |
7ca6adb3 AJ |
719 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
720 | drm_mode_vrefresh(m) == vrefresh_rate) | |
721 | return NULL; | |
722 | ||
a0910c8e AJ |
723 | /* HDTV hack, part 2 */ |
724 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { | |
725 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, | |
d50ba256 | 726 | false); |
559ee21d | 727 | mode->hdisplay = 1366; |
a4967de6 AJ |
728 | mode->hsync_start = mode->hsync_start - 1; |
729 | mode->hsync_end = mode->hsync_end - 1; | |
559ee21d ZY |
730 | return mode; |
731 | } | |
a0910c8e | 732 | |
559ee21d | 733 | /* check whether it can be found in default mode table */ |
1d42bbc8 | 734 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate); |
559ee21d ZY |
735 | if (mode) |
736 | return mode; | |
737 | ||
5c61259e ZY |
738 | switch (timing_level) { |
739 | case LEVEL_DMT: | |
5c61259e ZY |
740 | break; |
741 | case LEVEL_GTF: | |
742 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
743 | break; | |
7a374350 AJ |
744 | case LEVEL_GTF2: |
745 | /* | |
746 | * This is potentially wrong if there's ever a monitor with | |
747 | * more than one ranges section, each claiming a different | |
748 | * secondary GTF curve. Please don't do that. | |
749 | */ | |
750 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
751 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { | |
aefd330e | 752 | drm_mode_destroy(dev, mode); |
7a374350 AJ |
753 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
754 | vrefresh_rate, 0, 0, | |
755 | drm_gtf2_m(edid), | |
756 | drm_gtf2_2c(edid), | |
757 | drm_gtf2_k(edid), | |
758 | drm_gtf2_2j(edid)); | |
759 | } | |
760 | break; | |
5c61259e | 761 | case LEVEL_CVT: |
d50ba256 DA |
762 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
763 | false); | |
5c61259e ZY |
764 | break; |
765 | } | |
f453ba04 DA |
766 | return mode; |
767 | } | |
768 | ||
b58db2c6 AJ |
769 | /* |
770 | * EDID is delightfully ambiguous about how interlaced modes are to be | |
771 | * encoded. Our internal representation is of frame height, but some | |
772 | * HDTV detailed timings are encoded as field height. | |
773 | * | |
774 | * The format list here is from CEA, in frame size. Technically we | |
775 | * should be checking refresh rate too. Whatever. | |
776 | */ | |
777 | static void | |
778 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, | |
779 | struct detailed_pixel_timing *pt) | |
780 | { | |
781 | int i; | |
782 | static const struct { | |
783 | int w, h; | |
784 | } cea_interlaced[] = { | |
785 | { 1920, 1080 }, | |
786 | { 720, 480 }, | |
787 | { 1440, 480 }, | |
788 | { 2880, 480 }, | |
789 | { 720, 576 }, | |
790 | { 1440, 576 }, | |
791 | { 2880, 576 }, | |
792 | }; | |
b58db2c6 AJ |
793 | |
794 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) | |
795 | return; | |
796 | ||
3c581411 | 797 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
b58db2c6 AJ |
798 | if ((mode->hdisplay == cea_interlaced[i].w) && |
799 | (mode->vdisplay == cea_interlaced[i].h / 2)) { | |
800 | mode->vdisplay *= 2; | |
801 | mode->vsync_start *= 2; | |
802 | mode->vsync_end *= 2; | |
803 | mode->vtotal *= 2; | |
804 | mode->vtotal |= 1; | |
805 | } | |
806 | } | |
807 | ||
808 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
809 | } | |
810 | ||
f453ba04 DA |
811 | /** |
812 | * drm_mode_detailed - create a new mode from an EDID detailed timing section | |
813 | * @dev: DRM device (needed to create new mode) | |
814 | * @edid: EDID block | |
815 | * @timing: EDID detailed timing info | |
816 | * @quirks: quirks to apply | |
817 | * | |
818 | * An EDID detailed timing block contains enough info for us to create and | |
819 | * return a new struct drm_display_mode. | |
820 | */ | |
821 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |
822 | struct edid *edid, | |
823 | struct detailed_timing *timing, | |
824 | u32 quirks) | |
825 | { | |
826 | struct drm_display_mode *mode; | |
827 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; | |
0454beab MD |
828 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
829 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; | |
830 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; | |
831 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; | |
e14cbee4 MD |
832 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
833 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; | |
834 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; | |
835 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); | |
f453ba04 | 836 | |
fc438966 | 837 | /* ignore tiny modes */ |
0454beab | 838 | if (hactive < 64 || vactive < 64) |
fc438966 AJ |
839 | return NULL; |
840 | ||
0454beab | 841 | if (pt->misc & DRM_EDID_PT_STEREO) { |
f453ba04 DA |
842 | printk(KERN_WARNING "stereo mode not supported\n"); |
843 | return NULL; | |
844 | } | |
0454beab | 845 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
79b7dcb2 | 846 | printk(KERN_WARNING "composite sync not supported\n"); |
f453ba04 DA |
847 | } |
848 | ||
fcb45611 ZY |
849 | /* it is incorrect if hsync/vsync width is zero */ |
850 | if (!hsync_pulse_width || !vsync_pulse_width) { | |
851 | DRM_DEBUG_KMS("Incorrect Detailed timing. " | |
852 | "Wrong Hsync/Vsync pulse width\n"); | |
853 | return NULL; | |
854 | } | |
f453ba04 DA |
855 | mode = drm_mode_create(dev); |
856 | if (!mode) | |
857 | return NULL; | |
858 | ||
859 | mode->type = DRM_MODE_TYPE_DRIVER; | |
860 | ||
861 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) | |
0454beab MD |
862 | timing->pixel_clock = cpu_to_le16(1088); |
863 | ||
864 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; | |
865 | ||
866 | mode->hdisplay = hactive; | |
867 | mode->hsync_start = mode->hdisplay + hsync_offset; | |
868 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; | |
869 | mode->htotal = mode->hdisplay + hblank; | |
870 | ||
871 | mode->vdisplay = vactive; | |
872 | mode->vsync_start = mode->vdisplay + vsync_offset; | |
873 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; | |
874 | mode->vtotal = mode->vdisplay + vblank; | |
f453ba04 | 875 | |
7064fef5 JB |
876 | /* Some EDIDs have bogus h/vtotal values */ |
877 | if (mode->hsync_end > mode->htotal) | |
878 | mode->htotal = mode->hsync_end + 1; | |
879 | if (mode->vsync_end > mode->vtotal) | |
880 | mode->vtotal = mode->vsync_end + 1; | |
881 | ||
b58db2c6 | 882 | drm_mode_do_interlace_quirk(mode, pt); |
f453ba04 | 883 | |
171fdd89 AJ |
884 | drm_mode_set_name(mode); |
885 | ||
f453ba04 | 886 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
0454beab | 887 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
f453ba04 DA |
888 | } |
889 | ||
0454beab MD |
890 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
891 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; | |
892 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? | |
893 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; | |
f453ba04 | 894 | |
e14cbee4 MD |
895 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
896 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; | |
f453ba04 DA |
897 | |
898 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { | |
899 | mode->width_mm *= 10; | |
900 | mode->height_mm *= 10; | |
901 | } | |
902 | ||
903 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { | |
904 | mode->width_mm = edid->width_cm * 10; | |
905 | mode->height_mm = edid->height_cm * 10; | |
906 | } | |
907 | ||
908 | return mode; | |
909 | } | |
910 | ||
07a5e632 | 911 | static bool |
b1f559ec | 912 | mode_is_rb(const struct drm_display_mode *mode) |
07a5e632 | 913 | { |
b17e52ef AJ |
914 | return (mode->htotal - mode->hdisplay == 160) && |
915 | (mode->hsync_end - mode->hdisplay == 80) && | |
916 | (mode->hsync_end - mode->hsync_start == 32) && | |
917 | (mode->vsync_start - mode->vdisplay == 3); | |
918 | } | |
07a5e632 | 919 | |
b17e52ef | 920 | static bool |
b1f559ec CW |
921 | mode_in_hsync_range(const struct drm_display_mode *mode, |
922 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
923 | { |
924 | int hsync, hmin, hmax; | |
925 | ||
926 | hmin = t[7]; | |
927 | if (edid->revision >= 4) | |
928 | hmin += ((t[4] & 0x04) ? 255 : 0); | |
929 | hmax = t[8]; | |
930 | if (edid->revision >= 4) | |
931 | hmax += ((t[4] & 0x08) ? 255 : 0); | |
07a5e632 | 932 | hsync = drm_mode_hsync(mode); |
07a5e632 | 933 | |
b17e52ef AJ |
934 | return (hsync <= hmax && hsync >= hmin); |
935 | } | |
936 | ||
937 | static bool | |
b1f559ec CW |
938 | mode_in_vsync_range(const struct drm_display_mode *mode, |
939 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
940 | { |
941 | int vsync, vmin, vmax; | |
942 | ||
943 | vmin = t[5]; | |
944 | if (edid->revision >= 4) | |
945 | vmin += ((t[4] & 0x01) ? 255 : 0); | |
946 | vmax = t[6]; | |
947 | if (edid->revision >= 4) | |
948 | vmax += ((t[4] & 0x02) ? 255 : 0); | |
949 | vsync = drm_mode_vrefresh(mode); | |
950 | ||
951 | return (vsync <= vmax && vsync >= vmin); | |
952 | } | |
953 | ||
954 | static u32 | |
955 | range_pixel_clock(struct edid *edid, u8 *t) | |
956 | { | |
957 | /* unspecified */ | |
958 | if (t[9] == 0 || t[9] == 255) | |
959 | return 0; | |
960 | ||
961 | /* 1.4 with CVT support gives us real precision, yay */ | |
962 | if (edid->revision >= 4 && t[10] == 0x04) | |
963 | return (t[9] * 10000) - ((t[12] >> 2) * 250); | |
964 | ||
965 | /* 1.3 is pathetic, so fuzz up a bit */ | |
966 | return t[9] * 10000 + 5001; | |
967 | } | |
968 | ||
b17e52ef | 969 | static bool |
b1f559ec | 970 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
b17e52ef AJ |
971 | struct detailed_timing *timing) |
972 | { | |
973 | u32 max_clock; | |
974 | u8 *t = (u8 *)timing; | |
975 | ||
976 | if (!mode_in_hsync_range(mode, edid, t)) | |
07a5e632 AJ |
977 | return false; |
978 | ||
b17e52ef | 979 | if (!mode_in_vsync_range(mode, edid, t)) |
07a5e632 AJ |
980 | return false; |
981 | ||
b17e52ef | 982 | if ((max_clock = range_pixel_clock(edid, t))) |
07a5e632 AJ |
983 | if (mode->clock > max_clock) |
984 | return false; | |
b17e52ef AJ |
985 | |
986 | /* 1.4 max horizontal check */ | |
987 | if (edid->revision >= 4 && t[10] == 0x04) | |
988 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) | |
989 | return false; | |
990 | ||
991 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) | |
992 | return false; | |
07a5e632 AJ |
993 | |
994 | return true; | |
995 | } | |
996 | ||
997 | /* | |
998 | * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will | |
999 | * need to account for them. | |
1000 | */ | |
b17e52ef AJ |
1001 | static int |
1002 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1003 | struct detailed_timing *timing) | |
07a5e632 AJ |
1004 | { |
1005 | int i, modes = 0; | |
1006 | struct drm_display_mode *newmode; | |
1007 | struct drm_device *dev = connector->dev; | |
1008 | ||
1009 | for (i = 0; i < drm_num_dmt_modes; i++) { | |
b17e52ef | 1010 | if (mode_in_range(drm_dmt_modes + i, edid, timing)) { |
07a5e632 AJ |
1011 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1012 | if (newmode) { | |
1013 | drm_mode_probed_add(connector, newmode); | |
1014 | modes++; | |
1015 | } | |
1016 | } | |
1017 | } | |
1018 | ||
1019 | return modes; | |
1020 | } | |
1021 | ||
13931579 AJ |
1022 | static void |
1023 | do_inferred_modes(struct detailed_timing *timing, void *c) | |
9340d8cf | 1024 | { |
13931579 AJ |
1025 | struct detailed_mode_closure *closure = c; |
1026 | struct detailed_non_pixel *data = &timing->data.other_data; | |
1027 | int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); | |
9340d8cf | 1028 | |
13931579 AJ |
1029 | if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE) |
1030 | closure->modes += drm_gtf_modes_for_range(closure->connector, | |
1031 | closure->edid, | |
1032 | timing); | |
1033 | } | |
69da3015 | 1034 | |
13931579 AJ |
1035 | static int |
1036 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) | |
1037 | { | |
1038 | struct detailed_mode_closure closure = { | |
1039 | connector, edid, 0, 0, 0 | |
1040 | }; | |
9340d8cf | 1041 | |
13931579 AJ |
1042 | if (version_greater(edid, 1, 0)) |
1043 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, | |
1044 | &closure); | |
9340d8cf | 1045 | |
13931579 | 1046 | return closure.modes; |
9340d8cf AJ |
1047 | } |
1048 | ||
2255be14 AJ |
1049 | static int |
1050 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) | |
1051 | { | |
1052 | int i, j, m, modes = 0; | |
1053 | struct drm_display_mode *mode; | |
1054 | u8 *est = ((u8 *)timing) + 5; | |
1055 | ||
1056 | for (i = 0; i < 6; i++) { | |
1057 | for (j = 7; j > 0; j--) { | |
1058 | m = (i * 8) + (7 - j); | |
3c581411 | 1059 | if (m >= ARRAY_SIZE(est3_modes)) |
2255be14 AJ |
1060 | break; |
1061 | if (est[i] & (1 << j)) { | |
1d42bbc8 DA |
1062 | mode = drm_mode_find_dmt(connector->dev, |
1063 | est3_modes[m].w, | |
1064 | est3_modes[m].h, | |
1065 | est3_modes[m].r | |
1066 | /*, est3_modes[m].rb */); | |
2255be14 AJ |
1067 | if (mode) { |
1068 | drm_mode_probed_add(connector, mode); | |
1069 | modes++; | |
1070 | } | |
1071 | } | |
1072 | } | |
1073 | } | |
1074 | ||
1075 | return modes; | |
1076 | } | |
1077 | ||
13931579 AJ |
1078 | static void |
1079 | do_established_modes(struct detailed_timing *timing, void *c) | |
9cf00977 | 1080 | { |
13931579 | 1081 | struct detailed_mode_closure *closure = c; |
9cf00977 | 1082 | struct detailed_non_pixel *data = &timing->data.other_data; |
9cf00977 | 1083 | |
13931579 AJ |
1084 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
1085 | closure->modes += drm_est3_modes(closure->connector, timing); | |
1086 | } | |
9cf00977 | 1087 | |
13931579 AJ |
1088 | /** |
1089 | * add_established_modes - get est. modes from EDID and add them | |
1090 | * @edid: EDID block to scan | |
1091 | * | |
1092 | * Each EDID block contains a bitmap of the supported "established modes" list | |
1093 | * (defined above). Tease them out and add them to the global modes list. | |
1094 | */ | |
1095 | static int | |
1096 | add_established_modes(struct drm_connector *connector, struct edid *edid) | |
1097 | { | |
1098 | struct drm_device *dev = connector->dev; | |
1099 | unsigned long est_bits = edid->established_timings.t1 | | |
1100 | (edid->established_timings.t2 << 8) | | |
1101 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); | |
1102 | int i, modes = 0; | |
1103 | struct detailed_mode_closure closure = { | |
1104 | connector, edid, 0, 0, 0 | |
1105 | }; | |
9cf00977 | 1106 | |
13931579 AJ |
1107 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
1108 | if (est_bits & (1<<i)) { | |
1109 | struct drm_display_mode *newmode; | |
1110 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); | |
1111 | if (newmode) { | |
1112 | drm_mode_probed_add(connector, newmode); | |
1113 | modes++; | |
1114 | } | |
1115 | } | |
9cf00977 AJ |
1116 | } |
1117 | ||
13931579 AJ |
1118 | if (version_greater(edid, 1, 0)) |
1119 | drm_for_each_detailed_block((u8 *)edid, | |
1120 | do_established_modes, &closure); | |
1121 | ||
1122 | return modes + closure.modes; | |
1123 | } | |
1124 | ||
1125 | static void | |
1126 | do_standard_modes(struct detailed_timing *timing, void *c) | |
1127 | { | |
1128 | struct detailed_mode_closure *closure = c; | |
1129 | struct detailed_non_pixel *data = &timing->data.other_data; | |
1130 | struct drm_connector *connector = closure->connector; | |
1131 | struct edid *edid = closure->edid; | |
1132 | ||
1133 | if (data->type == EDID_DETAIL_STD_MODES) { | |
1134 | int i; | |
9cf00977 AJ |
1135 | for (i = 0; i < 6; i++) { |
1136 | struct std_timing *std; | |
1137 | struct drm_display_mode *newmode; | |
1138 | ||
1139 | std = &data->data.timings[i]; | |
7a374350 AJ |
1140 | newmode = drm_mode_std(connector, edid, std, |
1141 | edid->revision); | |
9cf00977 AJ |
1142 | if (newmode) { |
1143 | drm_mode_probed_add(connector, newmode); | |
13931579 | 1144 | closure->modes++; |
9cf00977 AJ |
1145 | } |
1146 | } | |
9cf00977 | 1147 | } |
9cf00977 AJ |
1148 | } |
1149 | ||
f453ba04 | 1150 | /** |
13931579 | 1151 | * add_standard_modes - get std. modes from EDID and add them |
f453ba04 | 1152 | * @edid: EDID block to scan |
f453ba04 | 1153 | * |
13931579 AJ |
1154 | * Standard modes can be calculated using the appropriate standard (DMT, |
1155 | * GTF or CVT. Grab them from @edid and add them to the list. | |
f453ba04 | 1156 | */ |
13931579 AJ |
1157 | static int |
1158 | add_standard_modes(struct drm_connector *connector, struct edid *edid) | |
f453ba04 | 1159 | { |
9cf00977 | 1160 | int i, modes = 0; |
13931579 AJ |
1161 | struct detailed_mode_closure closure = { |
1162 | connector, edid, 0, 0, 0 | |
1163 | }; | |
1164 | ||
1165 | for (i = 0; i < EDID_STD_TIMINGS; i++) { | |
1166 | struct drm_display_mode *newmode; | |
1167 | ||
1168 | newmode = drm_mode_std(connector, edid, | |
1169 | &edid->standard_timings[i], | |
1170 | edid->revision); | |
1171 | if (newmode) { | |
1172 | drm_mode_probed_add(connector, newmode); | |
1173 | modes++; | |
1174 | } | |
1175 | } | |
1176 | ||
1177 | if (version_greater(edid, 1, 0)) | |
1178 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, | |
1179 | &closure); | |
1180 | ||
1181 | /* XXX should also look for standard codes in VTB blocks */ | |
1182 | ||
1183 | return modes + closure.modes; | |
1184 | } | |
f453ba04 | 1185 | |
13931579 AJ |
1186 | static int drm_cvt_modes(struct drm_connector *connector, |
1187 | struct detailed_timing *timing) | |
1188 | { | |
1189 | int i, j, modes = 0; | |
1190 | struct drm_display_mode *newmode; | |
1191 | struct drm_device *dev = connector->dev; | |
1192 | struct cvt_timing *cvt; | |
1193 | const int rates[] = { 60, 85, 75, 60, 50 }; | |
1194 | const u8 empty[3] = { 0, 0, 0 }; | |
a327f6b8 | 1195 | |
13931579 AJ |
1196 | for (i = 0; i < 4; i++) { |
1197 | int uninitialized_var(width), height; | |
1198 | cvt = &(timing->data.other_data.data.cvt[i]); | |
f453ba04 | 1199 | |
13931579 | 1200 | if (!memcmp(cvt->code, empty, 3)) |
9cf00977 | 1201 | continue; |
f453ba04 | 1202 | |
13931579 AJ |
1203 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
1204 | switch (cvt->code[1] & 0x0c) { | |
1205 | case 0x00: | |
1206 | width = height * 4 / 3; | |
1207 | break; | |
1208 | case 0x04: | |
1209 | width = height * 16 / 9; | |
1210 | break; | |
1211 | case 0x08: | |
1212 | width = height * 16 / 10; | |
1213 | break; | |
1214 | case 0x0c: | |
1215 | width = height * 15 / 9; | |
1216 | break; | |
1217 | } | |
1218 | ||
1219 | for (j = 1; j < 5; j++) { | |
1220 | if (cvt->code[2] & (1 << j)) { | |
1221 | newmode = drm_cvt_mode(dev, width, height, | |
1222 | rates[j], j == 0, | |
1223 | false, false); | |
1224 | if (newmode) { | |
1225 | drm_mode_probed_add(connector, newmode); | |
1226 | modes++; | |
1227 | } | |
1228 | } | |
1229 | } | |
f453ba04 DA |
1230 | } |
1231 | ||
1232 | return modes; | |
1233 | } | |
9cf00977 | 1234 | |
13931579 AJ |
1235 | static void |
1236 | do_cvt_mode(struct detailed_timing *timing, void *c) | |
882f0219 | 1237 | { |
13931579 AJ |
1238 | struct detailed_mode_closure *closure = c; |
1239 | struct detailed_non_pixel *data = &timing->data.other_data; | |
882f0219 | 1240 | |
13931579 AJ |
1241 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
1242 | closure->modes += drm_cvt_modes(closure->connector, timing); | |
1243 | } | |
882f0219 | 1244 | |
13931579 AJ |
1245 | static int |
1246 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) | |
1247 | { | |
1248 | struct detailed_mode_closure closure = { | |
1249 | connector, edid, 0, 0, 0 | |
1250 | }; | |
882f0219 | 1251 | |
13931579 AJ |
1252 | if (version_greater(edid, 1, 2)) |
1253 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); | |
882f0219 | 1254 | |
13931579 | 1255 | /* XXX should also look for CVT codes in VTB blocks */ |
882f0219 | 1256 | |
13931579 AJ |
1257 | return closure.modes; |
1258 | } | |
1259 | ||
1260 | static void | |
1261 | do_detailed_mode(struct detailed_timing *timing, void *c) | |
1262 | { | |
1263 | struct detailed_mode_closure *closure = c; | |
1264 | struct drm_display_mode *newmode; | |
1265 | ||
1266 | if (timing->pixel_clock) { | |
1267 | newmode = drm_mode_detailed(closure->connector->dev, | |
1268 | closure->edid, timing, | |
1269 | closure->quirks); | |
1270 | if (!newmode) | |
1271 | return; | |
1272 | ||
1273 | if (closure->preferred) | |
1274 | newmode->type |= DRM_MODE_TYPE_PREFERRED; | |
1275 | ||
1276 | drm_mode_probed_add(closure->connector, newmode); | |
1277 | closure->modes++; | |
1278 | closure->preferred = 0; | |
882f0219 | 1279 | } |
13931579 | 1280 | } |
882f0219 | 1281 | |
13931579 AJ |
1282 | /* |
1283 | * add_detailed_modes - Add modes from detailed timings | |
1284 | * @connector: attached connector | |
1285 | * @edid: EDID block to scan | |
1286 | * @quirks: quirks to apply | |
1287 | */ | |
1288 | static int | |
1289 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, | |
1290 | u32 quirks) | |
1291 | { | |
1292 | struct detailed_mode_closure closure = { | |
1293 | connector, | |
1294 | edid, | |
1295 | 1, | |
1296 | quirks, | |
1297 | 0 | |
1298 | }; | |
1299 | ||
1300 | if (closure.preferred && !version_greater(edid, 1, 3)) | |
1301 | closure.preferred = | |
1302 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); | |
1303 | ||
1304 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); | |
1305 | ||
1306 | return closure.modes; | |
882f0219 | 1307 | } |
f453ba04 | 1308 | |
f23c20c8 | 1309 | #define HDMI_IDENTIFIER 0x000C03 |
8fe9790d | 1310 | #define AUDIO_BLOCK 0x01 |
54ac76f8 | 1311 | #define VIDEO_BLOCK 0x02 |
f23c20c8 | 1312 | #define VENDOR_BLOCK 0x03 |
76adaa34 | 1313 | #define SPEAKER_BLOCK 0x04 |
8fe9790d ZW |
1314 | #define EDID_BASIC_AUDIO (1 << 6) |
1315 | ||
f23c20c8 | 1316 | /** |
8fe9790d | 1317 | * Search EDID for CEA extension block. |
f23c20c8 | 1318 | */ |
eccaca28 | 1319 | u8 *drm_find_cea_extension(struct edid *edid) |
f23c20c8 | 1320 | { |
8fe9790d ZW |
1321 | u8 *edid_ext = NULL; |
1322 | int i; | |
f23c20c8 ML |
1323 | |
1324 | /* No EDID or EDID extensions */ | |
1325 | if (edid == NULL || edid->extensions == 0) | |
8fe9790d | 1326 | return NULL; |
f23c20c8 | 1327 | |
f23c20c8 | 1328 | /* Find CEA extension */ |
7466f4cc | 1329 | for (i = 0; i < edid->extensions; i++) { |
8fe9790d ZW |
1330 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
1331 | if (edid_ext[0] == CEA_EXT) | |
f23c20c8 ML |
1332 | break; |
1333 | } | |
1334 | ||
7466f4cc | 1335 | if (i == edid->extensions) |
8fe9790d ZW |
1336 | return NULL; |
1337 | ||
1338 | return edid_ext; | |
1339 | } | |
eccaca28 | 1340 | EXPORT_SYMBOL(drm_find_cea_extension); |
8fe9790d | 1341 | |
54ac76f8 CS |
1342 | static int |
1343 | do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) | |
1344 | { | |
1345 | struct drm_device *dev = connector->dev; | |
1346 | u8 * mode, cea_mode; | |
1347 | int modes = 0; | |
1348 | ||
1349 | for (mode = db; mode < db + len; mode++) { | |
1350 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ | |
1351 | if (cea_mode < drm_num_cea_modes) { | |
1352 | struct drm_display_mode *newmode; | |
1353 | newmode = drm_mode_duplicate(dev, | |
1354 | &edid_cea_modes[cea_mode]); | |
1355 | if (newmode) { | |
1356 | drm_mode_probed_add(connector, newmode); | |
1357 | modes++; | |
1358 | } | |
1359 | } | |
1360 | } | |
1361 | ||
1362 | return modes; | |
1363 | } | |
1364 | ||
1365 | static int | |
1366 | add_cea_modes(struct drm_connector *connector, struct edid *edid) | |
1367 | { | |
1368 | u8 * cea = drm_find_cea_extension(edid); | |
1369 | u8 * db, dbl; | |
1370 | int modes = 0; | |
1371 | ||
1372 | if (cea && cea[1] >= 3) { | |
1373 | for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) { | |
1374 | dbl = db[0] & 0x1f; | |
1375 | if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK) | |
1376 | modes += do_cea_modes (connector, db+1, dbl); | |
1377 | } | |
1378 | } | |
1379 | ||
1380 | return modes; | |
1381 | } | |
1382 | ||
76adaa34 WF |
1383 | static void |
1384 | parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db) | |
1385 | { | |
1386 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ | |
1387 | ||
1388 | connector->dvi_dual = db[6] & 1; | |
1389 | connector->max_tmds_clock = db[7] * 5; | |
1390 | ||
1391 | connector->latency_present[0] = db[8] >> 7; | |
1392 | connector->latency_present[1] = (db[8] >> 6) & 1; | |
1393 | connector->video_latency[0] = db[9]; | |
1394 | connector->audio_latency[0] = db[10]; | |
1395 | connector->video_latency[1] = db[11]; | |
1396 | connector->audio_latency[1] = db[12]; | |
1397 | ||
1398 | DRM_LOG_KMS("HDMI: DVI dual %d, " | |
1399 | "max TMDS clock %d, " | |
1400 | "latency present %d %d, " | |
1401 | "video latency %d %d, " | |
1402 | "audio latency %d %d\n", | |
1403 | connector->dvi_dual, | |
1404 | connector->max_tmds_clock, | |
1405 | (int) connector->latency_present[0], | |
1406 | (int) connector->latency_present[1], | |
1407 | connector->video_latency[0], | |
1408 | connector->video_latency[1], | |
1409 | connector->audio_latency[0], | |
1410 | connector->audio_latency[1]); | |
1411 | } | |
1412 | ||
1413 | static void | |
1414 | monitor_name(struct detailed_timing *t, void *data) | |
1415 | { | |
1416 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) | |
1417 | *(u8 **)data = t->data.other_data.data.str.str; | |
1418 | } | |
1419 | ||
1420 | /** | |
1421 | * drm_edid_to_eld - build ELD from EDID | |
1422 | * @connector: connector corresponding to the HDMI/DP sink | |
1423 | * @edid: EDID to parse | |
1424 | * | |
1425 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. | |
1426 | * Some ELD fields are left to the graphics driver caller: | |
1427 | * - Conn_Type | |
1428 | * - HDCP | |
1429 | * - Port_ID | |
1430 | */ | |
1431 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) | |
1432 | { | |
1433 | uint8_t *eld = connector->eld; | |
1434 | u8 *cea; | |
1435 | u8 *name; | |
1436 | u8 *db; | |
1437 | int sad_count = 0; | |
1438 | int mnl; | |
1439 | int dbl; | |
1440 | ||
1441 | memset(eld, 0, sizeof(connector->eld)); | |
1442 | ||
1443 | cea = drm_find_cea_extension(edid); | |
1444 | if (!cea) { | |
1445 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); | |
1446 | return; | |
1447 | } | |
1448 | ||
1449 | name = NULL; | |
1450 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); | |
1451 | for (mnl = 0; name && mnl < 13; mnl++) { | |
1452 | if (name[mnl] == 0x0a) | |
1453 | break; | |
1454 | eld[20 + mnl] = name[mnl]; | |
1455 | } | |
1456 | eld[4] = (cea[1] << 5) | mnl; | |
1457 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); | |
1458 | ||
1459 | eld[0] = 2 << 3; /* ELD version: 2 */ | |
1460 | ||
1461 | eld[16] = edid->mfg_id[0]; | |
1462 | eld[17] = edid->mfg_id[1]; | |
1463 | eld[18] = edid->prod_code[0]; | |
1464 | eld[19] = edid->prod_code[1]; | |
1465 | ||
a0ab734d CS |
1466 | if (cea[1] >= 3) |
1467 | for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) { | |
1468 | dbl = db[0] & 0x1f; | |
1469 | ||
1470 | switch ((db[0] & 0xe0) >> 5) { | |
1471 | case AUDIO_BLOCK: | |
1472 | /* Audio Data Block, contains SADs */ | |
1473 | sad_count = dbl / 3; | |
1474 | memcpy(eld + 20 + mnl, &db[1], dbl); | |
1475 | break; | |
1476 | case SPEAKER_BLOCK: | |
1477 | /* Speaker Allocation Data Block */ | |
1478 | eld[7] = db[1]; | |
1479 | break; | |
1480 | case VENDOR_BLOCK: | |
1481 | /* HDMI Vendor-Specific Data Block */ | |
1482 | if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0) | |
1483 | parse_hdmi_vsdb(connector, db); | |
1484 | break; | |
1485 | default: | |
1486 | break; | |
1487 | } | |
76adaa34 | 1488 | } |
76adaa34 WF |
1489 | eld[5] |= sad_count << 4; |
1490 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; | |
1491 | ||
1492 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); | |
1493 | } | |
1494 | EXPORT_SYMBOL(drm_edid_to_eld); | |
1495 | ||
1496 | /** | |
1497 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond | |
1498 | * @connector: connector associated with the HDMI/DP sink | |
1499 | * @mode: the display mode | |
1500 | */ | |
1501 | int drm_av_sync_delay(struct drm_connector *connector, | |
1502 | struct drm_display_mode *mode) | |
1503 | { | |
1504 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); | |
1505 | int a, v; | |
1506 | ||
1507 | if (!connector->latency_present[0]) | |
1508 | return 0; | |
1509 | if (!connector->latency_present[1]) | |
1510 | i = 0; | |
1511 | ||
1512 | a = connector->audio_latency[i]; | |
1513 | v = connector->video_latency[i]; | |
1514 | ||
1515 | /* | |
1516 | * HDMI/DP sink doesn't support audio or video? | |
1517 | */ | |
1518 | if (a == 255 || v == 255) | |
1519 | return 0; | |
1520 | ||
1521 | /* | |
1522 | * Convert raw EDID values to millisecond. | |
1523 | * Treat unknown latency as 0ms. | |
1524 | */ | |
1525 | if (a) | |
1526 | a = min(2 * (a - 1), 500); | |
1527 | if (v) | |
1528 | v = min(2 * (v - 1), 500); | |
1529 | ||
1530 | return max(v - a, 0); | |
1531 | } | |
1532 | EXPORT_SYMBOL(drm_av_sync_delay); | |
1533 | ||
1534 | /** | |
1535 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks | |
1536 | * @encoder: the encoder just changed display mode | |
1537 | * @mode: the adjusted display mode | |
1538 | * | |
1539 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. | |
1540 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. | |
1541 | */ | |
1542 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, | |
1543 | struct drm_display_mode *mode) | |
1544 | { | |
1545 | struct drm_connector *connector; | |
1546 | struct drm_device *dev = encoder->dev; | |
1547 | ||
1548 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) | |
1549 | if (connector->encoder == encoder && connector->eld[0]) | |
1550 | return connector; | |
1551 | ||
1552 | return NULL; | |
1553 | } | |
1554 | EXPORT_SYMBOL(drm_select_eld); | |
1555 | ||
8fe9790d ZW |
1556 | /** |
1557 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. | |
1558 | * @edid: monitor EDID information | |
1559 | * | |
1560 | * Parse the CEA extension according to CEA-861-B. | |
1561 | * Return true if HDMI, false if not or unknown. | |
1562 | */ | |
1563 | bool drm_detect_hdmi_monitor(struct edid *edid) | |
1564 | { | |
1565 | u8 *edid_ext; | |
1566 | int i, hdmi_id; | |
1567 | int start_offset, end_offset; | |
1568 | bool is_hdmi = false; | |
1569 | ||
1570 | edid_ext = drm_find_cea_extension(edid); | |
1571 | if (!edid_ext) | |
f23c20c8 ML |
1572 | goto end; |
1573 | ||
1574 | /* Data block offset in CEA extension block */ | |
1575 | start_offset = 4; | |
1576 | end_offset = edid_ext[2]; | |
1577 | ||
1578 | /* | |
1579 | * Because HDMI identifier is in Vendor Specific Block, | |
1580 | * search it from all data blocks of CEA extension. | |
1581 | */ | |
1582 | for (i = start_offset; i < end_offset; | |
1583 | /* Increased by data block len */ | |
1584 | i += ((edid_ext[i] & 0x1f) + 1)) { | |
1585 | /* Find vendor specific block */ | |
1586 | if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { | |
1587 | hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | | |
1588 | edid_ext[i + 3] << 16; | |
1589 | /* Find HDMI identifier */ | |
1590 | if (hdmi_id == HDMI_IDENTIFIER) | |
1591 | is_hdmi = true; | |
1592 | break; | |
1593 | } | |
1594 | } | |
1595 | ||
1596 | end: | |
1597 | return is_hdmi; | |
1598 | } | |
1599 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); | |
1600 | ||
8fe9790d ZW |
1601 | /** |
1602 | * drm_detect_monitor_audio - check monitor audio capability | |
1603 | * | |
1604 | * Monitor should have CEA extension block. | |
1605 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic | |
1606 | * audio' only. If there is any audio extension block and supported | |
1607 | * audio format, assume at least 'basic audio' support, even if 'basic | |
1608 | * audio' is not defined in EDID. | |
1609 | * | |
1610 | */ | |
1611 | bool drm_detect_monitor_audio(struct edid *edid) | |
1612 | { | |
1613 | u8 *edid_ext; | |
1614 | int i, j; | |
1615 | bool has_audio = false; | |
1616 | int start_offset, end_offset; | |
1617 | ||
1618 | edid_ext = drm_find_cea_extension(edid); | |
1619 | if (!edid_ext) | |
1620 | goto end; | |
1621 | ||
1622 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); | |
1623 | ||
1624 | if (has_audio) { | |
1625 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); | |
1626 | goto end; | |
1627 | } | |
1628 | ||
1629 | /* Data block offset in CEA extension block */ | |
1630 | start_offset = 4; | |
1631 | end_offset = edid_ext[2]; | |
1632 | ||
1633 | for (i = start_offset; i < end_offset; | |
1634 | i += ((edid_ext[i] & 0x1f) + 1)) { | |
1635 | if ((edid_ext[i] >> 5) == AUDIO_BLOCK) { | |
1636 | has_audio = true; | |
1637 | for (j = 1; j < (edid_ext[i] & 0x1f); j += 3) | |
1638 | DRM_DEBUG_KMS("CEA audio format %d\n", | |
1639 | (edid_ext[i + j] >> 3) & 0xf); | |
1640 | goto end; | |
1641 | } | |
1642 | } | |
1643 | end: | |
1644 | return has_audio; | |
1645 | } | |
1646 | EXPORT_SYMBOL(drm_detect_monitor_audio); | |
1647 | ||
3b11228b JB |
1648 | /** |
1649 | * drm_add_display_info - pull display info out if present | |
1650 | * @edid: EDID data | |
1651 | * @info: display info (attached to connector) | |
1652 | * | |
1653 | * Grab any available display info and stuff it into the drm_display_info | |
1654 | * structure that's part of the connector. Useful for tracking bpp and | |
1655 | * color spaces. | |
1656 | */ | |
1657 | static void drm_add_display_info(struct edid *edid, | |
1658 | struct drm_display_info *info) | |
1659 | { | |
ebec9a7b JB |
1660 | u8 *edid_ext; |
1661 | ||
3b11228b JB |
1662 | info->width_mm = edid->width_cm * 10; |
1663 | info->height_mm = edid->height_cm * 10; | |
1664 | ||
1665 | /* driver figures it out in this case */ | |
1666 | info->bpc = 0; | |
da05a5a7 | 1667 | info->color_formats = 0; |
3b11228b JB |
1668 | |
1669 | /* Only defined for 1.4 with digital displays */ | |
1670 | if (edid->revision < 4) | |
1671 | return; | |
1672 | ||
1673 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) | |
1674 | return; | |
1675 | ||
1676 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { | |
1677 | case DRM_EDID_DIGITAL_DEPTH_6: | |
1678 | info->bpc = 6; | |
1679 | break; | |
1680 | case DRM_EDID_DIGITAL_DEPTH_8: | |
1681 | info->bpc = 8; | |
1682 | break; | |
1683 | case DRM_EDID_DIGITAL_DEPTH_10: | |
1684 | info->bpc = 10; | |
1685 | break; | |
1686 | case DRM_EDID_DIGITAL_DEPTH_12: | |
1687 | info->bpc = 12; | |
1688 | break; | |
1689 | case DRM_EDID_DIGITAL_DEPTH_14: | |
1690 | info->bpc = 14; | |
1691 | break; | |
1692 | case DRM_EDID_DIGITAL_DEPTH_16: | |
1693 | info->bpc = 16; | |
1694 | break; | |
1695 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: | |
1696 | default: | |
1697 | info->bpc = 0; | |
1698 | break; | |
1699 | } | |
da05a5a7 JB |
1700 | |
1701 | info->color_formats = DRM_COLOR_FORMAT_RGB444; | |
1702 | if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444) | |
1703 | info->color_formats = DRM_COLOR_FORMAT_YCRCB444; | |
1704 | if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422) | |
1705 | info->color_formats = DRM_COLOR_FORMAT_YCRCB422; | |
ebec9a7b JB |
1706 | |
1707 | /* Get data from CEA blocks if present */ | |
1708 | edid_ext = drm_find_cea_extension(edid); | |
1709 | if (!edid_ext) | |
1710 | return; | |
1711 | ||
1712 | info->cea_rev = edid_ext[1]; | |
3b11228b JB |
1713 | } |
1714 | ||
f453ba04 DA |
1715 | /** |
1716 | * drm_add_edid_modes - add modes from EDID data, if available | |
1717 | * @connector: connector we're probing | |
1718 | * @edid: edid data | |
1719 | * | |
1720 | * Add the specified modes to the connector's mode list. | |
1721 | * | |
1722 | * Return number of modes added or 0 if we couldn't find any. | |
1723 | */ | |
1724 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) | |
1725 | { | |
1726 | int num_modes = 0; | |
1727 | u32 quirks; | |
1728 | ||
1729 | if (edid == NULL) { | |
1730 | return 0; | |
1731 | } | |
3c537889 | 1732 | if (!drm_edid_is_valid(edid)) { |
dcdb1674 | 1733 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
f453ba04 DA |
1734 | drm_get_connector_name(connector)); |
1735 | return 0; | |
1736 | } | |
1737 | ||
1738 | quirks = edid_get_quirks(edid); | |
1739 | ||
c867df70 AJ |
1740 | /* |
1741 | * EDID spec says modes should be preferred in this order: | |
1742 | * - preferred detailed mode | |
1743 | * - other detailed modes from base block | |
1744 | * - detailed modes from extension blocks | |
1745 | * - CVT 3-byte code modes | |
1746 | * - standard timing codes | |
1747 | * - established timing codes | |
1748 | * - modes inferred from GTF or CVT range information | |
1749 | * | |
13931579 | 1750 | * We get this pretty much right. |
c867df70 AJ |
1751 | * |
1752 | * XXX order for additional mode types in extension blocks? | |
1753 | */ | |
13931579 AJ |
1754 | num_modes += add_detailed_modes(connector, edid, quirks); |
1755 | num_modes += add_cvt_modes(connector, edid); | |
c867df70 AJ |
1756 | num_modes += add_standard_modes(connector, edid); |
1757 | num_modes += add_established_modes(connector, edid); | |
13931579 | 1758 | num_modes += add_inferred_modes(connector, edid); |
54ac76f8 | 1759 | num_modes += add_cea_modes(connector, edid); |
f453ba04 DA |
1760 | |
1761 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) | |
1762 | edid_fixup_preferred(connector, quirks); | |
1763 | ||
3b11228b | 1764 | drm_add_display_info(edid, &connector->display_info); |
f453ba04 DA |
1765 | |
1766 | return num_modes; | |
1767 | } | |
1768 | EXPORT_SYMBOL(drm_add_edid_modes); | |
f0fda0a4 ZY |
1769 | |
1770 | /** | |
1771 | * drm_add_modes_noedid - add modes for the connectors without EDID | |
1772 | * @connector: connector we're probing | |
1773 | * @hdisplay: the horizontal display limit | |
1774 | * @vdisplay: the vertical display limit | |
1775 | * | |
1776 | * Add the specified modes to the connector's mode list. Only when the | |
1777 | * hdisplay/vdisplay is not beyond the given limit, it will be added. | |
1778 | * | |
1779 | * Return number of modes added or 0 if we couldn't find any. | |
1780 | */ | |
1781 | int drm_add_modes_noedid(struct drm_connector *connector, | |
1782 | int hdisplay, int vdisplay) | |
1783 | { | |
1784 | int i, count, num_modes = 0; | |
b1f559ec | 1785 | struct drm_display_mode *mode; |
f0fda0a4 ZY |
1786 | struct drm_device *dev = connector->dev; |
1787 | ||
1788 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); | |
1789 | if (hdisplay < 0) | |
1790 | hdisplay = 0; | |
1791 | if (vdisplay < 0) | |
1792 | vdisplay = 0; | |
1793 | ||
1794 | for (i = 0; i < count; i++) { | |
b1f559ec | 1795 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f0fda0a4 ZY |
1796 | if (hdisplay && vdisplay) { |
1797 | /* | |
1798 | * Only when two are valid, they will be used to check | |
1799 | * whether the mode should be added to the mode list of | |
1800 | * the connector. | |
1801 | */ | |
1802 | if (ptr->hdisplay > hdisplay || | |
1803 | ptr->vdisplay > vdisplay) | |
1804 | continue; | |
1805 | } | |
f985dedb AJ |
1806 | if (drm_mode_vrefresh(ptr) > 61) |
1807 | continue; | |
f0fda0a4 ZY |
1808 | mode = drm_mode_duplicate(dev, ptr); |
1809 | if (mode) { | |
1810 | drm_mode_probed_add(connector, mode); | |
1811 | num_modes++; | |
1812 | } | |
1813 | } | |
1814 | return num_modes; | |
1815 | } | |
1816 | EXPORT_SYMBOL(drm_add_modes_noedid); |