drm: fix compile failure by including <linux/swiotlb.h>
[deliverable/linux.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
47819ba2 33#include <linux/module.h>
760285e7
DH
34#include <drm/drmP.h>
35#include <drm/drm_edid.h>
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
d1ff6409
AJ
42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
DA
45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
bc42aabc
AJ
69/* Force reduced-blanking timings for detailed modes */
70#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
3c537889 71
13931579
AJ
72struct detailed_mode_closure {
73 struct drm_connector *connector;
74 struct edid *edid;
75 bool preferred;
76 u32 quirks;
77 int modes;
78};
f453ba04 79
5c61259e
ZY
80#define LEVEL_DMT 0
81#define LEVEL_GTF 1
7a374350
AJ
82#define LEVEL_GTF2 2
83#define LEVEL_CVT 3
5c61259e 84
f453ba04 85static struct edid_quirk {
c51a3fd6 86 char vendor[4];
f453ba04
DA
87 int product_id;
88 u32 quirks;
89} edid_quirk_list[] = {
90 /* Acer AL1706 */
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Acer F51 */
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
94 /* Unknown Acer */
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
96
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
100
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
ba1163de
AJ
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
105
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
109
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
113
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
116
117 /* Proview AY765C */
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
119
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
bc42aabc
AJ
125
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
f453ba04
DA
128};
129
61e57a8d 130/*** DDC fetch and block validation ***/
f453ba04 131
083ae056
AJ
132static const u8 edid_header[] = {
133 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
134};
f453ba04 135
051963d4
TR
136 /*
137 * Sanity check the header of the base EDID block. Return 8 if the header
138 * is perfect, down to 0 if it's totally wrong.
139 */
140int drm_edid_header_is_valid(const u8 *raw_edid)
141{
142 int i, score = 0;
143
144 for (i = 0; i < sizeof(edid_header); i++)
145 if (raw_edid[i] == edid_header[i])
146 score++;
147
148 return score;
149}
150EXPORT_SYMBOL(drm_edid_header_is_valid);
151
47819ba2
AJ
152static int edid_fixup __read_mostly = 6;
153module_param_named(edid_fixup, edid_fixup, int, 0400);
154MODULE_PARM_DESC(edid_fixup,
155 "Minimum number of valid EDID header bytes (0-8, default 6)");
051963d4 156
61e57a8d
AJ
157/*
158 * Sanity check the EDID block (base or extension). Return 0 if the block
159 * doesn't check out, or 1 if it's valid.
f453ba04 160 */
0b2443ed 161bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
f453ba04 162{
61e57a8d 163 int i;
f453ba04 164 u8 csum = 0;
61e57a8d 165 struct edid *edid = (struct edid *)raw_edid;
f453ba04 166
47819ba2
AJ
167 if (edid_fixup > 8 || edid_fixup < 0)
168 edid_fixup = 6;
169
f89ec8a4 170 if (block == 0) {
051963d4 171 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d 172 if (score == 8) ;
47819ba2 173 else if (score >= edid_fixup) {
61e57a8d
AJ
174 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
175 memcpy(raw_edid, edid_header, sizeof(edid_header));
176 } else {
177 goto bad;
178 }
179 }
f453ba04
DA
180
181 for (i = 0; i < EDID_LENGTH; i++)
182 csum += raw_edid[i];
183 if (csum) {
0b2443ed
JG
184 if (print_bad_edid) {
185 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
186 }
4a638b4e
AJ
187
188 /* allow CEA to slide through, switches mangle this */
189 if (raw_edid[0] != 0x02)
190 goto bad;
f453ba04
DA
191 }
192
61e57a8d
AJ
193 /* per-block-type checks */
194 switch (raw_edid[0]) {
195 case 0: /* base */
196 if (edid->version != 1) {
197 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
198 goto bad;
199 }
862b89c0 200
61e57a8d
AJ
201 if (edid->revision > 4)
202 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
203 break;
862b89c0 204
61e57a8d
AJ
205 default:
206 break;
207 }
47ee4ccf 208
f453ba04
DA
209 return 1;
210
211bad:
0b2443ed 212 if (raw_edid && print_bad_edid) {
f49dadb8 213 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
214 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
215 raw_edid, EDID_LENGTH, false);
f453ba04
DA
216 }
217 return 0;
218}
da0df92b 219EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
AJ
220
221/**
222 * drm_edid_is_valid - sanity check EDID data
223 * @edid: EDID data
224 *
225 * Sanity-check an entire EDID record (including extensions)
226 */
227bool drm_edid_is_valid(struct edid *edid)
228{
229 int i;
230 u8 *raw = (u8 *)edid;
231
232 if (!edid)
233 return false;
234
235 for (i = 0; i <= edid->extensions; i++)
0b2443ed 236 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
61e57a8d
AJ
237 return false;
238
239 return true;
240}
3c537889 241EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 242
61e57a8d
AJ
243#define DDC_SEGMENT_ADDR 0x30
244/**
245 * Get EDID information via I2C.
246 *
247 * \param adapter : i2c device adaptor
248 * \param buf : EDID data buffer to be filled
249 * \param len : EDID data buffer length
250 * \return 0 on success or -1 on failure.
251 *
252 * Try to fetch EDID information by calling i2c driver function.
253 */
254static int
255drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
256 int block, int len)
257{
258 unsigned char start = block * EDID_LENGTH;
cd004b3f
S
259 unsigned char segment = block >> 1;
260 unsigned char xfers = segment ? 3 : 2;
4819d2e4
CW
261 int ret, retries = 5;
262
263 /* The core i2c driver will automatically retry the transfer if the
264 * adapter reports EAGAIN. However, we find that bit-banging transfers
265 * are susceptible to errors under a heavily loaded machine and
266 * generate spurious NAKs and timeouts. Retrying the transfer
267 * of the individual block a few times seems to overcome this.
268 */
269 do {
270 struct i2c_msg msgs[] = {
271 {
cd004b3f
S
272 .addr = DDC_SEGMENT_ADDR,
273 .flags = 0,
274 .len = 1,
275 .buf = &segment,
276 }, {
4819d2e4
CW
277 .addr = DDC_ADDR,
278 .flags = 0,
279 .len = 1,
280 .buf = &start,
281 }, {
282 .addr = DDC_ADDR,
283 .flags = I2C_M_RD,
284 .len = len,
285 .buf = buf,
286 }
287 };
cd004b3f
S
288
289 /*
290 * Avoid sending the segment addr to not upset non-compliant ddc
291 * monitors.
292 */
293 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
294
9292f37e
ED
295 if (ret == -ENXIO) {
296 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
297 adapter->name);
298 break;
299 }
cd004b3f 300 } while (ret != xfers && --retries);
4819d2e4 301
cd004b3f 302 return ret == xfers ? 0 : -1;
61e57a8d
AJ
303}
304
4a9a8b71
DA
305static bool drm_edid_is_zero(u8 *in_edid, int length)
306{
6311803b
AM
307 if (memchr_inv(in_edid, 0, length))
308 return false;
4a9a8b71 309
4a9a8b71
DA
310 return true;
311}
312
61e57a8d
AJ
313static u8 *
314drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
315{
0ea75e23 316 int i, j = 0, valid_extensions = 0;
61e57a8d 317 u8 *block, *new;
0b2443ed 318 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
61e57a8d
AJ
319
320 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
321 return NULL;
322
323 /* base block fetch */
324 for (i = 0; i < 4; i++) {
325 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
326 goto out;
0b2443ed 327 if (drm_edid_block_valid(block, 0, print_bad_edid))
61e57a8d 328 break;
4a9a8b71
DA
329 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
330 connector->null_edid_counter++;
331 goto carp;
332 }
61e57a8d
AJ
333 }
334 if (i == 4)
335 goto carp;
336
337 /* if there's no extensions, we're done */
338 if (block[0x7e] == 0)
339 return block;
340
341 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
342 if (!new)
343 goto out;
344 block = new;
345
346 for (j = 1; j <= block[0x7e]; j++) {
347 for (i = 0; i < 4; i++) {
0ea75e23
ST
348 if (drm_do_probe_ddc_edid(adapter,
349 block + (valid_extensions + 1) * EDID_LENGTH,
350 j, EDID_LENGTH))
61e57a8d 351 goto out;
0b2443ed 352 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
0ea75e23 353 valid_extensions++;
61e57a8d 354 break;
0ea75e23 355 }
61e57a8d
AJ
356 }
357 if (i == 4)
0ea75e23
ST
358 dev_warn(connector->dev->dev,
359 "%s: Ignoring invalid EDID block %d.\n",
360 drm_get_connector_name(connector), j);
361 }
362
363 if (valid_extensions != block[0x7e]) {
364 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
365 block[0x7e] = valid_extensions;
366 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
367 if (!new)
368 goto out;
369 block = new;
61e57a8d
AJ
370 }
371
372 return block;
373
374carp:
0b2443ed
JG
375 if (print_bad_edid) {
376 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
377 drm_get_connector_name(connector), j);
378 }
379 connector->bad_edid_counter++;
61e57a8d
AJ
380
381out:
382 kfree(block);
383 return NULL;
384}
385
386/**
387 * Probe DDC presence.
388 *
389 * \param adapter : i2c device adaptor
390 * \return 1 on success
391 */
fbff4690 392bool
61e57a8d
AJ
393drm_probe_ddc(struct i2c_adapter *adapter)
394{
395 unsigned char out;
396
397 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
398}
fbff4690 399EXPORT_SYMBOL(drm_probe_ddc);
61e57a8d
AJ
400
401/**
402 * drm_get_edid - get EDID data, if available
403 * @connector: connector we're probing
404 * @adapter: i2c adapter to use for DDC
405 *
406 * Poke the given i2c channel to grab EDID data if possible. If found,
407 * attach it to the connector.
408 *
409 * Return edid data or NULL if we couldn't find any.
410 */
411struct edid *drm_get_edid(struct drm_connector *connector,
412 struct i2c_adapter *adapter)
413{
414 struct edid *edid = NULL;
415
416 if (drm_probe_ddc(adapter))
417 edid = (struct edid *)drm_do_get_edid(connector, adapter);
418
61e57a8d 419 return edid;
61e57a8d
AJ
420}
421EXPORT_SYMBOL(drm_get_edid);
422
423/*** EDID parsing ***/
424
f453ba04
DA
425/**
426 * edid_vendor - match a string against EDID's obfuscated vendor field
427 * @edid: EDID to match
428 * @vendor: vendor string
429 *
430 * Returns true if @vendor is in @edid, false otherwise
431 */
432static bool edid_vendor(struct edid *edid, char *vendor)
433{
434 char edid_vendor[3];
435
436 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
437 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
438 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 439 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
440
441 return !strncmp(edid_vendor, vendor, 3);
442}
443
444/**
445 * edid_get_quirks - return quirk flags for a given EDID
446 * @edid: EDID to process
447 *
448 * This tells subsequent routines what fixes they need to apply.
449 */
450static u32 edid_get_quirks(struct edid *edid)
451{
452 struct edid_quirk *quirk;
453 int i;
454
455 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
456 quirk = &edid_quirk_list[i];
457
458 if (edid_vendor(edid, quirk->vendor) &&
459 (EDID_PRODUCT_ID(edid) == quirk->product_id))
460 return quirk->quirks;
461 }
462
463 return 0;
464}
465
466#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
467#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
468
f453ba04
DA
469/**
470 * edid_fixup_preferred - set preferred modes based on quirk list
471 * @connector: has mode list to fix up
472 * @quirks: quirks list
473 *
474 * Walk the mode list for @connector, clearing the preferred status
475 * on existing modes and setting it anew for the right mode ala @quirks.
476 */
477static void edid_fixup_preferred(struct drm_connector *connector,
478 u32 quirks)
479{
480 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 481 int target_refresh = 0;
f453ba04
DA
482
483 if (list_empty(&connector->probed_modes))
484 return;
485
486 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
487 target_refresh = 60;
488 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
489 target_refresh = 75;
490
491 preferred_mode = list_first_entry(&connector->probed_modes,
492 struct drm_display_mode, head);
493
494 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
495 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
496
497 if (cur_mode == preferred_mode)
498 continue;
499
500 /* Largest mode is preferred */
501 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
502 preferred_mode = cur_mode;
503
504 /* At a given size, try to get closest to target refresh */
505 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
506 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
507 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
508 preferred_mode = cur_mode;
509 }
510 }
511
512 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
513}
514
f6e252ba
AJ
515static bool
516mode_is_rb(const struct drm_display_mode *mode)
517{
518 return (mode->htotal - mode->hdisplay == 160) &&
519 (mode->hsync_end - mode->hdisplay == 80) &&
520 (mode->hsync_end - mode->hsync_start == 32) &&
521 (mode->vsync_start - mode->vdisplay == 3);
522}
523
33c7531d
AJ
524/*
525 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
526 * @dev: Device to duplicate against
527 * @hsize: Mode width
528 * @vsize: Mode height
529 * @fresh: Mode refresh rate
f6e252ba 530 * @rb: Mode reduced-blanking-ness
33c7531d
AJ
531 *
532 * Walk the DMT mode list looking for a match for the given parameters.
533 * Return a newly allocated copy of the mode, or NULL if not found.
534 */
1d42bbc8 535struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
f6e252ba
AJ
536 int hsize, int vsize, int fresh,
537 bool rb)
559ee21d 538{
07a5e632 539 int i;
559ee21d 540
07a5e632 541 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 542 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f8b46a05
AJ
543 if (hsize != ptr->hdisplay)
544 continue;
545 if (vsize != ptr->vdisplay)
546 continue;
547 if (fresh != drm_mode_vrefresh(ptr))
548 continue;
f6e252ba
AJ
549 if (rb != mode_is_rb(ptr))
550 continue;
f8b46a05
AJ
551
552 return drm_mode_duplicate(dev, ptr);
559ee21d 553 }
f8b46a05
AJ
554
555 return NULL;
559ee21d 556}
1d42bbc8 557EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 558
d1ff6409
AJ
559typedef void detailed_cb(struct detailed_timing *timing, void *closure);
560
4d76a221
AJ
561static void
562cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
563{
564 int i, n = 0;
4966b2a9 565 u8 d = ext[0x02];
4d76a221
AJ
566 u8 *det_base = ext + d;
567
4966b2a9 568 n = (127 - d) / 18;
4d76a221
AJ
569 for (i = 0; i < n; i++)
570 cb((struct detailed_timing *)(det_base + 18 * i), closure);
571}
572
cbba98f8
AJ
573static void
574vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
575{
576 unsigned int i, n = min((int)ext[0x02], 6);
577 u8 *det_base = ext + 5;
578
579 if (ext[0x01] != 1)
580 return; /* unknown version */
581
582 for (i = 0; i < n; i++)
583 cb((struct detailed_timing *)(det_base + 18 * i), closure);
584}
585
d1ff6409
AJ
586static void
587drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
588{
589 int i;
590 struct edid *edid = (struct edid *)raw_edid;
591
592 if (edid == NULL)
593 return;
594
595 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
596 cb(&(edid->detailed_timings[i]), closure);
597
4d76a221
AJ
598 for (i = 1; i <= raw_edid[0x7e]; i++) {
599 u8 *ext = raw_edid + (i * EDID_LENGTH);
600 switch (*ext) {
601 case CEA_EXT:
602 cea_for_each_detailed_block(ext, cb, closure);
603 break;
cbba98f8
AJ
604 case VTB_EXT:
605 vtb_for_each_detailed_block(ext, cb, closure);
606 break;
4d76a221
AJ
607 default:
608 break;
609 }
610 }
d1ff6409
AJ
611}
612
613static void
614is_rb(struct detailed_timing *t, void *data)
615{
616 u8 *r = (u8 *)t;
617 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
618 if (r[15] & 0x10)
619 *(bool *)data = true;
620}
621
622/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
623static bool
624drm_monitor_supports_rb(struct edid *edid)
625{
626 if (edid->revision >= 4) {
b196a498 627 bool ret = false;
d1ff6409
AJ
628 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
629 return ret;
630 }
631
632 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
633}
634
7a374350
AJ
635static void
636find_gtf2(struct detailed_timing *t, void *data)
637{
638 u8 *r = (u8 *)t;
639 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
640 *(u8 **)data = r;
641}
642
643/* Secondary GTF curve kicks in above some break frequency */
644static int
645drm_gtf2_hbreak(struct edid *edid)
646{
647 u8 *r = NULL;
648 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
649 return r ? (r[12] * 2) : 0;
650}
651
652static int
653drm_gtf2_2c(struct edid *edid)
654{
655 u8 *r = NULL;
656 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
657 return r ? r[13] : 0;
658}
659
660static int
661drm_gtf2_m(struct edid *edid)
662{
663 u8 *r = NULL;
664 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
665 return r ? (r[15] << 8) + r[14] : 0;
666}
667
668static int
669drm_gtf2_k(struct edid *edid)
670{
671 u8 *r = NULL;
672 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
673 return r ? r[16] : 0;
674}
675
676static int
677drm_gtf2_2j(struct edid *edid)
678{
679 u8 *r = NULL;
680 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
681 return r ? r[17] : 0;
682}
683
684/**
685 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
686 * @edid: EDID block to scan
687 */
688static int standard_timing_level(struct edid *edid)
689{
690 if (edid->revision >= 2) {
691 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
692 return LEVEL_CVT;
693 if (drm_gtf2_hbreak(edid))
694 return LEVEL_GTF2;
695 return LEVEL_GTF;
696 }
697 return LEVEL_DMT;
698}
699
23425cae
AJ
700/*
701 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
702 * monitors fill with ascii space (0x20) instead.
703 */
704static int
705bad_std_timing(u8 a, u8 b)
706{
707 return (a == 0x00 && b == 0x00) ||
708 (a == 0x01 && b == 0x01) ||
709 (a == 0x20 && b == 0x20);
710}
711
f453ba04
DA
712/**
713 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
714 * @t: standard timing params
5c61259e 715 * @timing_level: standard timing level
f453ba04
DA
716 *
717 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 718 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 719 */
7ca6adb3 720static struct drm_display_mode *
7a374350
AJ
721drm_mode_std(struct drm_connector *connector, struct edid *edid,
722 struct std_timing *t, int revision)
f453ba04 723{
7ca6adb3
AJ
724 struct drm_device *dev = connector->dev;
725 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
726 int hsize, vsize;
727 int vrefresh_rate;
0454beab
MD
728 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
729 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
730 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
731 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 732 int timing_level = standard_timing_level(edid);
5c61259e 733
23425cae
AJ
734 if (bad_std_timing(t->hsize, t->vfreq_aspect))
735 return NULL;
736
5c61259e
ZY
737 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
738 hsize = t->hsize * 8 + 248;
739 /* vrefresh_rate = vfreq + 60 */
740 vrefresh_rate = vfreq + 60;
741 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
742 if (aspect_ratio == 0) {
743 if (revision < 3)
744 vsize = hsize;
745 else
746 vsize = (hsize * 10) / 16;
747 } else if (aspect_ratio == 1)
f453ba04 748 vsize = (hsize * 3) / 4;
0454beab 749 else if (aspect_ratio == 2)
f453ba04
DA
750 vsize = (hsize * 4) / 5;
751 else
752 vsize = (hsize * 9) / 16;
a0910c8e
AJ
753
754 /* HDTV hack, part 1 */
755 if (vrefresh_rate == 60 &&
756 ((hsize == 1360 && vsize == 765) ||
757 (hsize == 1368 && vsize == 769))) {
758 hsize = 1366;
759 vsize = 768;
760 }
761
7ca6adb3
AJ
762 /*
763 * If this connector already has a mode for this size and refresh
764 * rate (because it came from detailed or CVT info), use that
765 * instead. This way we don't have to guess at interlace or
766 * reduced blanking.
767 */
522032da 768 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
769 if (m->hdisplay == hsize && m->vdisplay == vsize &&
770 drm_mode_vrefresh(m) == vrefresh_rate)
771 return NULL;
772
a0910c8e
AJ
773 /* HDTV hack, part 2 */
774 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
775 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 776 false);
559ee21d 777 mode->hdisplay = 1366;
a4967de6
AJ
778 mode->hsync_start = mode->hsync_start - 1;
779 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
780 return mode;
781 }
a0910c8e 782
559ee21d 783 /* check whether it can be found in default mode table */
f6e252ba
AJ
784 if (drm_monitor_supports_rb(edid)) {
785 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
786 true);
787 if (mode)
788 return mode;
789 }
790 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
559ee21d
ZY
791 if (mode)
792 return mode;
793
f6e252ba 794 /* okay, generate it */
5c61259e
ZY
795 switch (timing_level) {
796 case LEVEL_DMT:
5c61259e
ZY
797 break;
798 case LEVEL_GTF:
799 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
800 break;
7a374350
AJ
801 case LEVEL_GTF2:
802 /*
803 * This is potentially wrong if there's ever a monitor with
804 * more than one ranges section, each claiming a different
805 * secondary GTF curve. Please don't do that.
806 */
807 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
fc48f169
TI
808 if (!mode)
809 return NULL;
7a374350 810 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 811 drm_mode_destroy(dev, mode);
7a374350
AJ
812 mode = drm_gtf_mode_complex(dev, hsize, vsize,
813 vrefresh_rate, 0, 0,
814 drm_gtf2_m(edid),
815 drm_gtf2_2c(edid),
816 drm_gtf2_k(edid),
817 drm_gtf2_2j(edid));
818 }
819 break;
5c61259e 820 case LEVEL_CVT:
d50ba256
DA
821 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
822 false);
5c61259e
ZY
823 break;
824 }
f453ba04
DA
825 return mode;
826}
827
b58db2c6
AJ
828/*
829 * EDID is delightfully ambiguous about how interlaced modes are to be
830 * encoded. Our internal representation is of frame height, but some
831 * HDTV detailed timings are encoded as field height.
832 *
833 * The format list here is from CEA, in frame size. Technically we
834 * should be checking refresh rate too. Whatever.
835 */
836static void
837drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
838 struct detailed_pixel_timing *pt)
839{
840 int i;
841 static const struct {
842 int w, h;
843 } cea_interlaced[] = {
844 { 1920, 1080 },
845 { 720, 480 },
846 { 1440, 480 },
847 { 2880, 480 },
848 { 720, 576 },
849 { 1440, 576 },
850 { 2880, 576 },
851 };
b58db2c6
AJ
852
853 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
854 return;
855
3c581411 856 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
857 if ((mode->hdisplay == cea_interlaced[i].w) &&
858 (mode->vdisplay == cea_interlaced[i].h / 2)) {
859 mode->vdisplay *= 2;
860 mode->vsync_start *= 2;
861 mode->vsync_end *= 2;
862 mode->vtotal *= 2;
863 mode->vtotal |= 1;
864 }
865 }
866
867 mode->flags |= DRM_MODE_FLAG_INTERLACE;
868}
869
f453ba04
DA
870/**
871 * drm_mode_detailed - create a new mode from an EDID detailed timing section
872 * @dev: DRM device (needed to create new mode)
873 * @edid: EDID block
874 * @timing: EDID detailed timing info
875 * @quirks: quirks to apply
876 *
877 * An EDID detailed timing block contains enough info for us to create and
878 * return a new struct drm_display_mode.
879 */
880static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
881 struct edid *edid,
882 struct detailed_timing *timing,
883 u32 quirks)
884{
885 struct drm_display_mode *mode;
886 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
887 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
888 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
889 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
890 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
891 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
892 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
893 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
894 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 895
fc438966 896 /* ignore tiny modes */
0454beab 897 if (hactive < 64 || vactive < 64)
fc438966
AJ
898 return NULL;
899
0454beab 900 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
901 printk(KERN_WARNING "stereo mode not supported\n");
902 return NULL;
903 }
0454beab 904 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 905 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
906 }
907
fcb45611
ZY
908 /* it is incorrect if hsync/vsync width is zero */
909 if (!hsync_pulse_width || !vsync_pulse_width) {
910 DRM_DEBUG_KMS("Incorrect Detailed timing. "
911 "Wrong Hsync/Vsync pulse width\n");
912 return NULL;
913 }
bc42aabc
AJ
914
915 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
916 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
917 if (!mode)
918 return NULL;
919
920 goto set_size;
921 }
922
f453ba04
DA
923 mode = drm_mode_create(dev);
924 if (!mode)
925 return NULL;
926
f453ba04 927 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
928 timing->pixel_clock = cpu_to_le16(1088);
929
930 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
931
932 mode->hdisplay = hactive;
933 mode->hsync_start = mode->hdisplay + hsync_offset;
934 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
935 mode->htotal = mode->hdisplay + hblank;
936
937 mode->vdisplay = vactive;
938 mode->vsync_start = mode->vdisplay + vsync_offset;
939 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
940 mode->vtotal = mode->vdisplay + vblank;
f453ba04 941
7064fef5
JB
942 /* Some EDIDs have bogus h/vtotal values */
943 if (mode->hsync_end > mode->htotal)
944 mode->htotal = mode->hsync_end + 1;
945 if (mode->vsync_end > mode->vtotal)
946 mode->vtotal = mode->vsync_end + 1;
947
b58db2c6 948 drm_mode_do_interlace_quirk(mode, pt);
f453ba04
DA
949
950 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 951 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
952 }
953
0454beab
MD
954 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
955 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
956 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
957 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 958
bc42aabc 959set_size:
e14cbee4
MD
960 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
961 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
962
963 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
964 mode->width_mm *= 10;
965 mode->height_mm *= 10;
966 }
967
968 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
969 mode->width_mm = edid->width_cm * 10;
970 mode->height_mm = edid->height_cm * 10;
971 }
972
bc42aabc
AJ
973 mode->type = DRM_MODE_TYPE_DRIVER;
974 drm_mode_set_name(mode);
975
f453ba04
DA
976 return mode;
977}
978
b17e52ef 979static bool
b1f559ec
CW
980mode_in_hsync_range(const struct drm_display_mode *mode,
981 struct edid *edid, u8 *t)
b17e52ef
AJ
982{
983 int hsync, hmin, hmax;
984
985 hmin = t[7];
986 if (edid->revision >= 4)
987 hmin += ((t[4] & 0x04) ? 255 : 0);
988 hmax = t[8];
989 if (edid->revision >= 4)
990 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 991 hsync = drm_mode_hsync(mode);
07a5e632 992
b17e52ef
AJ
993 return (hsync <= hmax && hsync >= hmin);
994}
995
996static bool
b1f559ec
CW
997mode_in_vsync_range(const struct drm_display_mode *mode,
998 struct edid *edid, u8 *t)
b17e52ef
AJ
999{
1000 int vsync, vmin, vmax;
1001
1002 vmin = t[5];
1003 if (edid->revision >= 4)
1004 vmin += ((t[4] & 0x01) ? 255 : 0);
1005 vmax = t[6];
1006 if (edid->revision >= 4)
1007 vmax += ((t[4] & 0x02) ? 255 : 0);
1008 vsync = drm_mode_vrefresh(mode);
1009
1010 return (vsync <= vmax && vsync >= vmin);
1011}
1012
1013static u32
1014range_pixel_clock(struct edid *edid, u8 *t)
1015{
1016 /* unspecified */
1017 if (t[9] == 0 || t[9] == 255)
1018 return 0;
1019
1020 /* 1.4 with CVT support gives us real precision, yay */
1021 if (edid->revision >= 4 && t[10] == 0x04)
1022 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1023
1024 /* 1.3 is pathetic, so fuzz up a bit */
1025 return t[9] * 10000 + 5001;
1026}
1027
b17e52ef 1028static bool
b1f559ec 1029mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
1030 struct detailed_timing *timing)
1031{
1032 u32 max_clock;
1033 u8 *t = (u8 *)timing;
1034
1035 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
1036 return false;
1037
b17e52ef 1038 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
1039 return false;
1040
b17e52ef 1041 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
1042 if (mode->clock > max_clock)
1043 return false;
b17e52ef
AJ
1044
1045 /* 1.4 max horizontal check */
1046 if (edid->revision >= 4 && t[10] == 0x04)
1047 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1048 return false;
1049
1050 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1051 return false;
07a5e632
AJ
1052
1053 return true;
1054}
1055
7b668ebe
TI
1056static bool valid_inferred_mode(const struct drm_connector *connector,
1057 const struct drm_display_mode *mode)
1058{
1059 struct drm_display_mode *m;
1060 bool ok = false;
1061
1062 list_for_each_entry(m, &connector->probed_modes, head) {
1063 if (mode->hdisplay == m->hdisplay &&
1064 mode->vdisplay == m->vdisplay &&
1065 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1066 return false; /* duplicated */
1067 if (mode->hdisplay <= m->hdisplay &&
1068 mode->vdisplay <= m->vdisplay)
1069 ok = true;
1070 }
1071 return ok;
1072}
1073
b17e52ef 1074static int
cd4cd3de 1075drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
b17e52ef 1076 struct detailed_timing *timing)
07a5e632
AJ
1077{
1078 int i, modes = 0;
1079 struct drm_display_mode *newmode;
1080 struct drm_device *dev = connector->dev;
1081
1082 for (i = 0; i < drm_num_dmt_modes; i++) {
7b668ebe
TI
1083 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1084 valid_inferred_mode(connector, drm_dmt_modes + i)) {
07a5e632
AJ
1085 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1086 if (newmode) {
1087 drm_mode_probed_add(connector, newmode);
1088 modes++;
1089 }
1090 }
1091 }
1092
1093 return modes;
1094}
1095
c09dedb7
TI
1096/* fix up 1366x768 mode from 1368x768;
1097 * GFT/CVT can't express 1366 width which isn't dividable by 8
1098 */
1099static void fixup_mode_1366x768(struct drm_display_mode *mode)
1100{
1101 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1102 mode->hdisplay = 1366;
1103 mode->hsync_start--;
1104 mode->hsync_end--;
1105 drm_mode_set_name(mode);
1106 }
1107}
1108
b309bd37
AJ
1109static int
1110drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1111 struct detailed_timing *timing)
1112{
1113 int i, modes = 0;
1114 struct drm_display_mode *newmode;
1115 struct drm_device *dev = connector->dev;
1116
1117 for (i = 0; i < num_extra_modes; i++) {
1118 const struct minimode *m = &extra_modes[i];
1119 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
fc48f169
TI
1120 if (!newmode)
1121 return modes;
b309bd37 1122
c09dedb7 1123 fixup_mode_1366x768(newmode);
7b668ebe
TI
1124 if (!mode_in_range(newmode, edid, timing) ||
1125 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1126 drm_mode_destroy(dev, newmode);
1127 continue;
1128 }
1129
1130 drm_mode_probed_add(connector, newmode);
1131 modes++;
1132 }
1133
1134 return modes;
1135}
1136
1137static int
1138drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1139 struct detailed_timing *timing)
1140{
1141 int i, modes = 0;
1142 struct drm_display_mode *newmode;
1143 struct drm_device *dev = connector->dev;
1144 bool rb = drm_monitor_supports_rb(edid);
1145
1146 for (i = 0; i < num_extra_modes; i++) {
1147 const struct minimode *m = &extra_modes[i];
1148 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
fc48f169
TI
1149 if (!newmode)
1150 return modes;
b309bd37 1151
c09dedb7 1152 fixup_mode_1366x768(newmode);
7b668ebe
TI
1153 if (!mode_in_range(newmode, edid, timing) ||
1154 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1155 drm_mode_destroy(dev, newmode);
1156 continue;
1157 }
1158
1159 drm_mode_probed_add(connector, newmode);
1160 modes++;
1161 }
1162
1163 return modes;
1164}
1165
13931579
AJ
1166static void
1167do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1168{
13931579
AJ
1169 struct detailed_mode_closure *closure = c;
1170 struct detailed_non_pixel *data = &timing->data.other_data;
b309bd37 1171 struct detailed_data_monitor_range *range = &data->data.range;
9340d8cf 1172
cb21aafe
AJ
1173 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1174 return;
1175
1176 closure->modes += drm_dmt_modes_for_range(closure->connector,
1177 closure->edid,
1178 timing);
b309bd37
AJ
1179
1180 if (!version_greater(closure->edid, 1, 1))
1181 return; /* GTF not defined yet */
1182
1183 switch (range->flags) {
1184 case 0x02: /* secondary gtf, XXX could do more */
1185 case 0x00: /* default gtf */
1186 closure->modes += drm_gtf_modes_for_range(closure->connector,
1187 closure->edid,
1188 timing);
1189 break;
1190 case 0x04: /* cvt, only in 1.4+ */
1191 if (!version_greater(closure->edid, 1, 3))
1192 break;
1193
1194 closure->modes += drm_cvt_modes_for_range(closure->connector,
1195 closure->edid,
1196 timing);
1197 break;
1198 case 0x01: /* just the ranges, no formula */
1199 default:
1200 break;
1201 }
13931579 1202}
69da3015 1203
13931579
AJ
1204static int
1205add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1206{
1207 struct detailed_mode_closure closure = {
1208 connector, edid, 0, 0, 0
1209 };
9340d8cf 1210
13931579
AJ
1211 if (version_greater(edid, 1, 0))
1212 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1213 &closure);
9340d8cf 1214
13931579 1215 return closure.modes;
9340d8cf
AJ
1216}
1217
2255be14
AJ
1218static int
1219drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1220{
1221 int i, j, m, modes = 0;
1222 struct drm_display_mode *mode;
1223 u8 *est = ((u8 *)timing) + 5;
1224
1225 for (i = 0; i < 6; i++) {
1226 for (j = 7; j > 0; j--) {
1227 m = (i * 8) + (7 - j);
3c581411 1228 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1229 break;
1230 if (est[i] & (1 << j)) {
1d42bbc8
DA
1231 mode = drm_mode_find_dmt(connector->dev,
1232 est3_modes[m].w,
1233 est3_modes[m].h,
f6e252ba
AJ
1234 est3_modes[m].r,
1235 est3_modes[m].rb);
2255be14
AJ
1236 if (mode) {
1237 drm_mode_probed_add(connector, mode);
1238 modes++;
1239 }
1240 }
1241 }
1242 }
1243
1244 return modes;
1245}
1246
13931579
AJ
1247static void
1248do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1249{
13931579 1250 struct detailed_mode_closure *closure = c;
9cf00977 1251 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1252
13931579
AJ
1253 if (data->type == EDID_DETAIL_EST_TIMINGS)
1254 closure->modes += drm_est3_modes(closure->connector, timing);
1255}
9cf00977 1256
13931579
AJ
1257/**
1258 * add_established_modes - get est. modes from EDID and add them
1259 * @edid: EDID block to scan
1260 *
1261 * Each EDID block contains a bitmap of the supported "established modes" list
1262 * (defined above). Tease them out and add them to the global modes list.
1263 */
1264static int
1265add_established_modes(struct drm_connector *connector, struct edid *edid)
1266{
1267 struct drm_device *dev = connector->dev;
1268 unsigned long est_bits = edid->established_timings.t1 |
1269 (edid->established_timings.t2 << 8) |
1270 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1271 int i, modes = 0;
1272 struct detailed_mode_closure closure = {
1273 connector, edid, 0, 0, 0
1274 };
9cf00977 1275
13931579
AJ
1276 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1277 if (est_bits & (1<<i)) {
1278 struct drm_display_mode *newmode;
1279 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1280 if (newmode) {
1281 drm_mode_probed_add(connector, newmode);
1282 modes++;
1283 }
1284 }
9cf00977
AJ
1285 }
1286
13931579
AJ
1287 if (version_greater(edid, 1, 0))
1288 drm_for_each_detailed_block((u8 *)edid,
1289 do_established_modes, &closure);
1290
1291 return modes + closure.modes;
1292}
1293
1294static void
1295do_standard_modes(struct detailed_timing *timing, void *c)
1296{
1297 struct detailed_mode_closure *closure = c;
1298 struct detailed_non_pixel *data = &timing->data.other_data;
1299 struct drm_connector *connector = closure->connector;
1300 struct edid *edid = closure->edid;
1301
1302 if (data->type == EDID_DETAIL_STD_MODES) {
1303 int i;
9cf00977
AJ
1304 for (i = 0; i < 6; i++) {
1305 struct std_timing *std;
1306 struct drm_display_mode *newmode;
1307
1308 std = &data->data.timings[i];
7a374350
AJ
1309 newmode = drm_mode_std(connector, edid, std,
1310 edid->revision);
9cf00977
AJ
1311 if (newmode) {
1312 drm_mode_probed_add(connector, newmode);
13931579 1313 closure->modes++;
9cf00977
AJ
1314 }
1315 }
9cf00977 1316 }
9cf00977
AJ
1317}
1318
f453ba04 1319/**
13931579 1320 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1321 * @edid: EDID block to scan
f453ba04 1322 *
13931579
AJ
1323 * Standard modes can be calculated using the appropriate standard (DMT,
1324 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1325 */
13931579
AJ
1326static int
1327add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1328{
9cf00977 1329 int i, modes = 0;
13931579
AJ
1330 struct detailed_mode_closure closure = {
1331 connector, edid, 0, 0, 0
1332 };
1333
1334 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1335 struct drm_display_mode *newmode;
1336
1337 newmode = drm_mode_std(connector, edid,
1338 &edid->standard_timings[i],
1339 edid->revision);
1340 if (newmode) {
1341 drm_mode_probed_add(connector, newmode);
1342 modes++;
1343 }
1344 }
1345
1346 if (version_greater(edid, 1, 0))
1347 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1348 &closure);
1349
1350 /* XXX should also look for standard codes in VTB blocks */
1351
1352 return modes + closure.modes;
1353}
f453ba04 1354
13931579
AJ
1355static int drm_cvt_modes(struct drm_connector *connector,
1356 struct detailed_timing *timing)
1357{
1358 int i, j, modes = 0;
1359 struct drm_display_mode *newmode;
1360 struct drm_device *dev = connector->dev;
1361 struct cvt_timing *cvt;
1362 const int rates[] = { 60, 85, 75, 60, 50 };
1363 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1364
13931579
AJ
1365 for (i = 0; i < 4; i++) {
1366 int uninitialized_var(width), height;
1367 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1368
13931579 1369 if (!memcmp(cvt->code, empty, 3))
9cf00977 1370 continue;
f453ba04 1371
13931579
AJ
1372 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1373 switch (cvt->code[1] & 0x0c) {
1374 case 0x00:
1375 width = height * 4 / 3;
1376 break;
1377 case 0x04:
1378 width = height * 16 / 9;
1379 break;
1380 case 0x08:
1381 width = height * 16 / 10;
1382 break;
1383 case 0x0c:
1384 width = height * 15 / 9;
1385 break;
1386 }
1387
1388 for (j = 1; j < 5; j++) {
1389 if (cvt->code[2] & (1 << j)) {
1390 newmode = drm_cvt_mode(dev, width, height,
1391 rates[j], j == 0,
1392 false, false);
1393 if (newmode) {
1394 drm_mode_probed_add(connector, newmode);
1395 modes++;
1396 }
1397 }
1398 }
f453ba04
DA
1399 }
1400
1401 return modes;
1402}
9cf00977 1403
13931579
AJ
1404static void
1405do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1406{
13931579
AJ
1407 struct detailed_mode_closure *closure = c;
1408 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1409
13931579
AJ
1410 if (data->type == EDID_DETAIL_CVT_3BYTE)
1411 closure->modes += drm_cvt_modes(closure->connector, timing);
1412}
882f0219 1413
13931579
AJ
1414static int
1415add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1416{
1417 struct detailed_mode_closure closure = {
1418 connector, edid, 0, 0, 0
1419 };
882f0219 1420
13931579
AJ
1421 if (version_greater(edid, 1, 2))
1422 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1423
13931579 1424 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1425
13931579
AJ
1426 return closure.modes;
1427}
1428
1429static void
1430do_detailed_mode(struct detailed_timing *timing, void *c)
1431{
1432 struct detailed_mode_closure *closure = c;
1433 struct drm_display_mode *newmode;
1434
1435 if (timing->pixel_clock) {
1436 newmode = drm_mode_detailed(closure->connector->dev,
1437 closure->edid, timing,
1438 closure->quirks);
1439 if (!newmode)
1440 return;
1441
1442 if (closure->preferred)
1443 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1444
1445 drm_mode_probed_add(closure->connector, newmode);
1446 closure->modes++;
1447 closure->preferred = 0;
882f0219 1448 }
13931579 1449}
882f0219 1450
13931579
AJ
1451/*
1452 * add_detailed_modes - Add modes from detailed timings
1453 * @connector: attached connector
1454 * @edid: EDID block to scan
1455 * @quirks: quirks to apply
1456 */
1457static int
1458add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1459 u32 quirks)
1460{
1461 struct detailed_mode_closure closure = {
1462 connector,
1463 edid,
1464 1,
1465 quirks,
1466 0
1467 };
1468
1469 if (closure.preferred && !version_greater(edid, 1, 3))
1470 closure.preferred =
1471 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1472
1473 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1474
1475 return closure.modes;
882f0219 1476}
f453ba04 1477
f23c20c8 1478#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1479#define AUDIO_BLOCK 0x01
54ac76f8 1480#define VIDEO_BLOCK 0x02
f23c20c8 1481#define VENDOR_BLOCK 0x03
76adaa34 1482#define SPEAKER_BLOCK 0x04
b1edd6a6 1483#define VIDEO_CAPABILITY_BLOCK 0x07
8fe9790d 1484#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1485#define EDID_CEA_YCRCB444 (1 << 5)
1486#define EDID_CEA_YCRCB422 (1 << 4)
b1edd6a6 1487#define EDID_CEA_VCDB_QS (1 << 6)
8fe9790d 1488
f23c20c8 1489/**
8fe9790d 1490 * Search EDID for CEA extension block.
f23c20c8 1491 */
eccaca28 1492u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1493{
8fe9790d
ZW
1494 u8 *edid_ext = NULL;
1495 int i;
f23c20c8
ML
1496
1497 /* No EDID or EDID extensions */
1498 if (edid == NULL || edid->extensions == 0)
8fe9790d 1499 return NULL;
f23c20c8 1500
f23c20c8 1501 /* Find CEA extension */
7466f4cc 1502 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1503 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1504 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1505 break;
1506 }
1507
7466f4cc 1508 if (i == edid->extensions)
8fe9790d
ZW
1509 return NULL;
1510
1511 return edid_ext;
1512}
eccaca28 1513EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1514
a4799037
SM
1515/*
1516 * Looks for a CEA mode matching given drm_display_mode.
1517 * Returns its CEA Video ID code, or 0 if not found.
1518 */
1519u8 drm_match_cea_mode(struct drm_display_mode *to_match)
1520{
1521 struct drm_display_mode *cea_mode;
1522 u8 mode;
1523
1524 for (mode = 0; mode < drm_num_cea_modes; mode++) {
1525 cea_mode = (struct drm_display_mode *)&edid_cea_modes[mode];
1526
1527 if (drm_mode_equal(to_match, cea_mode))
1528 return mode + 1;
1529 }
1530 return 0;
1531}
1532EXPORT_SYMBOL(drm_match_cea_mode);
1533
1534
54ac76f8
CS
1535static int
1536do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1537{
1538 struct drm_device *dev = connector->dev;
1539 u8 * mode, cea_mode;
1540 int modes = 0;
1541
1542 for (mode = db; mode < db + len; mode++) {
1543 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1544 if (cea_mode < drm_num_cea_modes) {
1545 struct drm_display_mode *newmode;
1546 newmode = drm_mode_duplicate(dev,
1547 &edid_cea_modes[cea_mode]);
1548 if (newmode) {
1549 drm_mode_probed_add(connector, newmode);
1550 modes++;
1551 }
1552 }
1553 }
1554
1555 return modes;
1556}
1557
9e50b9d5
VS
1558static int
1559cea_db_payload_len(const u8 *db)
1560{
1561 return db[0] & 0x1f;
1562}
1563
1564static int
1565cea_db_tag(const u8 *db)
1566{
1567 return db[0] >> 5;
1568}
1569
1570static int
1571cea_revision(const u8 *cea)
1572{
1573 return cea[1];
1574}
1575
1576static int
1577cea_db_offsets(const u8 *cea, int *start, int *end)
1578{
1579 /* Data block offset in CEA extension block */
1580 *start = 4;
1581 *end = cea[2];
1582 if (*end == 0)
1583 *end = 127;
1584 if (*end < 4 || *end > 127)
1585 return -ERANGE;
1586 return 0;
1587}
1588
1589#define for_each_cea_db(cea, i, start, end) \
1590 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
1591
54ac76f8
CS
1592static int
1593add_cea_modes(struct drm_connector *connector, struct edid *edid)
1594{
1595 u8 * cea = drm_find_cea_extension(edid);
1596 u8 * db, dbl;
1597 int modes = 0;
1598
9e50b9d5
VS
1599 if (cea && cea_revision(cea) >= 3) {
1600 int i, start, end;
1601
1602 if (cea_db_offsets(cea, &start, &end))
1603 return 0;
1604
1605 for_each_cea_db(cea, i, start, end) {
1606 db = &cea[i];
1607 dbl = cea_db_payload_len(db);
1608
1609 if (cea_db_tag(db) == VIDEO_BLOCK)
54ac76f8
CS
1610 modes += do_cea_modes (connector, db+1, dbl);
1611 }
1612 }
1613
1614 return modes;
1615}
1616
76adaa34 1617static void
8504072a 1618parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
76adaa34 1619{
8504072a 1620 u8 len = cea_db_payload_len(db);
76adaa34 1621
8504072a
VS
1622 if (len >= 6) {
1623 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1624 connector->dvi_dual = db[6] & 1;
1625 }
1626 if (len >= 7)
1627 connector->max_tmds_clock = db[7] * 5;
1628 if (len >= 8) {
1629 connector->latency_present[0] = db[8] >> 7;
1630 connector->latency_present[1] = (db[8] >> 6) & 1;
1631 }
1632 if (len >= 9)
1633 connector->video_latency[0] = db[9];
1634 if (len >= 10)
1635 connector->audio_latency[0] = db[10];
1636 if (len >= 11)
1637 connector->video_latency[1] = db[11];
1638 if (len >= 12)
1639 connector->audio_latency[1] = db[12];
76adaa34 1640
670c1ef6 1641 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
76adaa34
WF
1642 "max TMDS clock %d, "
1643 "latency present %d %d, "
1644 "video latency %d %d, "
1645 "audio latency %d %d\n",
1646 connector->dvi_dual,
1647 connector->max_tmds_clock,
1648 (int) connector->latency_present[0],
1649 (int) connector->latency_present[1],
1650 connector->video_latency[0],
1651 connector->video_latency[1],
1652 connector->audio_latency[0],
1653 connector->audio_latency[1]);
1654}
1655
1656static void
1657monitor_name(struct detailed_timing *t, void *data)
1658{
1659 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1660 *(u8 **)data = t->data.other_data.data.str.str;
1661}
1662
14f77fdd
VS
1663static bool cea_db_is_hdmi_vsdb(const u8 *db)
1664{
1665 int hdmi_id;
1666
1667 if (cea_db_tag(db) != VENDOR_BLOCK)
1668 return false;
1669
1670 if (cea_db_payload_len(db) < 5)
1671 return false;
1672
1673 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
1674
1675 return hdmi_id == HDMI_IDENTIFIER;
1676}
1677
76adaa34
WF
1678/**
1679 * drm_edid_to_eld - build ELD from EDID
1680 * @connector: connector corresponding to the HDMI/DP sink
1681 * @edid: EDID to parse
1682 *
1683 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1684 * Some ELD fields are left to the graphics driver caller:
1685 * - Conn_Type
1686 * - HDCP
1687 * - Port_ID
1688 */
1689void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1690{
1691 uint8_t *eld = connector->eld;
1692 u8 *cea;
1693 u8 *name;
1694 u8 *db;
1695 int sad_count = 0;
1696 int mnl;
1697 int dbl;
1698
1699 memset(eld, 0, sizeof(connector->eld));
1700
1701 cea = drm_find_cea_extension(edid);
1702 if (!cea) {
1703 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1704 return;
1705 }
1706
1707 name = NULL;
1708 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1709 for (mnl = 0; name && mnl < 13; mnl++) {
1710 if (name[mnl] == 0x0a)
1711 break;
1712 eld[20 + mnl] = name[mnl];
1713 }
1714 eld[4] = (cea[1] << 5) | mnl;
1715 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1716
1717 eld[0] = 2 << 3; /* ELD version: 2 */
1718
1719 eld[16] = edid->mfg_id[0];
1720 eld[17] = edid->mfg_id[1];
1721 eld[18] = edid->prod_code[0];
1722 eld[19] = edid->prod_code[1];
1723
9e50b9d5
VS
1724 if (cea_revision(cea) >= 3) {
1725 int i, start, end;
1726
1727 if (cea_db_offsets(cea, &start, &end)) {
1728 start = 0;
1729 end = 0;
1730 }
1731
1732 for_each_cea_db(cea, i, start, end) {
1733 db = &cea[i];
1734 dbl = cea_db_payload_len(db);
1735
1736 switch (cea_db_tag(db)) {
a0ab734d
CS
1737 case AUDIO_BLOCK:
1738 /* Audio Data Block, contains SADs */
1739 sad_count = dbl / 3;
9e50b9d5
VS
1740 if (dbl >= 1)
1741 memcpy(eld + 20 + mnl, &db[1], dbl);
a0ab734d
CS
1742 break;
1743 case SPEAKER_BLOCK:
9e50b9d5
VS
1744 /* Speaker Allocation Data Block */
1745 if (dbl >= 1)
1746 eld[7] = db[1];
a0ab734d
CS
1747 break;
1748 case VENDOR_BLOCK:
1749 /* HDMI Vendor-Specific Data Block */
14f77fdd 1750 if (cea_db_is_hdmi_vsdb(db))
a0ab734d
CS
1751 parse_hdmi_vsdb(connector, db);
1752 break;
1753 default:
1754 break;
1755 }
76adaa34 1756 }
9e50b9d5 1757 }
76adaa34
WF
1758 eld[5] |= sad_count << 4;
1759 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1760
1761 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1762}
1763EXPORT_SYMBOL(drm_edid_to_eld);
1764
1765/**
1766 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1767 * @connector: connector associated with the HDMI/DP sink
1768 * @mode: the display mode
1769 */
1770int drm_av_sync_delay(struct drm_connector *connector,
1771 struct drm_display_mode *mode)
1772{
1773 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1774 int a, v;
1775
1776 if (!connector->latency_present[0])
1777 return 0;
1778 if (!connector->latency_present[1])
1779 i = 0;
1780
1781 a = connector->audio_latency[i];
1782 v = connector->video_latency[i];
1783
1784 /*
1785 * HDMI/DP sink doesn't support audio or video?
1786 */
1787 if (a == 255 || v == 255)
1788 return 0;
1789
1790 /*
1791 * Convert raw EDID values to millisecond.
1792 * Treat unknown latency as 0ms.
1793 */
1794 if (a)
1795 a = min(2 * (a - 1), 500);
1796 if (v)
1797 v = min(2 * (v - 1), 500);
1798
1799 return max(v - a, 0);
1800}
1801EXPORT_SYMBOL(drm_av_sync_delay);
1802
1803/**
1804 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1805 * @encoder: the encoder just changed display mode
1806 * @mode: the adjusted display mode
1807 *
1808 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1809 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1810 */
1811struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1812 struct drm_display_mode *mode)
1813{
1814 struct drm_connector *connector;
1815 struct drm_device *dev = encoder->dev;
1816
1817 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1818 if (connector->encoder == encoder && connector->eld[0])
1819 return connector;
1820
1821 return NULL;
1822}
1823EXPORT_SYMBOL(drm_select_eld);
1824
8fe9790d
ZW
1825/**
1826 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1827 * @edid: monitor EDID information
1828 *
1829 * Parse the CEA extension according to CEA-861-B.
1830 * Return true if HDMI, false if not or unknown.
1831 */
1832bool drm_detect_hdmi_monitor(struct edid *edid)
1833{
1834 u8 *edid_ext;
14f77fdd 1835 int i;
8fe9790d 1836 int start_offset, end_offset;
8fe9790d
ZW
1837
1838 edid_ext = drm_find_cea_extension(edid);
1839 if (!edid_ext)
14f77fdd 1840 return false;
f23c20c8 1841
9e50b9d5 1842 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
14f77fdd 1843 return false;
f23c20c8
ML
1844
1845 /*
1846 * Because HDMI identifier is in Vendor Specific Block,
1847 * search it from all data blocks of CEA extension.
1848 */
9e50b9d5 1849 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
14f77fdd
VS
1850 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
1851 return true;
f23c20c8
ML
1852 }
1853
14f77fdd 1854 return false;
f23c20c8
ML
1855}
1856EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1857
8fe9790d
ZW
1858/**
1859 * drm_detect_monitor_audio - check monitor audio capability
1860 *
1861 * Monitor should have CEA extension block.
1862 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1863 * audio' only. If there is any audio extension block and supported
1864 * audio format, assume at least 'basic audio' support, even if 'basic
1865 * audio' is not defined in EDID.
1866 *
1867 */
1868bool drm_detect_monitor_audio(struct edid *edid)
1869{
1870 u8 *edid_ext;
1871 int i, j;
1872 bool has_audio = false;
1873 int start_offset, end_offset;
1874
1875 edid_ext = drm_find_cea_extension(edid);
1876 if (!edid_ext)
1877 goto end;
1878
1879 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1880
1881 if (has_audio) {
1882 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1883 goto end;
1884 }
1885
9e50b9d5
VS
1886 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1887 goto end;
8fe9790d 1888
9e50b9d5
VS
1889 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1890 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
8fe9790d 1891 has_audio = true;
9e50b9d5 1892 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
8fe9790d
ZW
1893 DRM_DEBUG_KMS("CEA audio format %d\n",
1894 (edid_ext[i + j] >> 3) & 0xf);
1895 goto end;
1896 }
1897 }
1898end:
1899 return has_audio;
1900}
1901EXPORT_SYMBOL(drm_detect_monitor_audio);
1902
b1edd6a6
VS
1903/**
1904 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
1905 *
1906 * Check whether the monitor reports the RGB quantization range selection
1907 * as supported. The AVI infoframe can then be used to inform the monitor
1908 * which quantization range (full or limited) is used.
1909 */
1910bool drm_rgb_quant_range_selectable(struct edid *edid)
1911{
1912 u8 *edid_ext;
1913 int i, start, end;
1914
1915 edid_ext = drm_find_cea_extension(edid);
1916 if (!edid_ext)
1917 return false;
1918
1919 if (cea_db_offsets(edid_ext, &start, &end))
1920 return false;
1921
1922 for_each_cea_db(edid_ext, i, start, end) {
1923 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
1924 cea_db_payload_len(&edid_ext[i]) == 2) {
1925 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
1926 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
1927 }
1928 }
1929
1930 return false;
1931}
1932EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
1933
3b11228b
JB
1934/**
1935 * drm_add_display_info - pull display info out if present
1936 * @edid: EDID data
1937 * @info: display info (attached to connector)
1938 *
1939 * Grab any available display info and stuff it into the drm_display_info
1940 * structure that's part of the connector. Useful for tracking bpp and
1941 * color spaces.
1942 */
1943static void drm_add_display_info(struct edid *edid,
1944 struct drm_display_info *info)
1945{
ebec9a7b
JB
1946 u8 *edid_ext;
1947
3b11228b
JB
1948 info->width_mm = edid->width_cm * 10;
1949 info->height_mm = edid->height_cm * 10;
1950
1951 /* driver figures it out in this case */
1952 info->bpc = 0;
da05a5a7 1953 info->color_formats = 0;
3b11228b 1954
a988bc72 1955 if (edid->revision < 3)
3b11228b
JB
1956 return;
1957
1958 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1959 return;
1960
a988bc72
LPC
1961 /* Get data from CEA blocks if present */
1962 edid_ext = drm_find_cea_extension(edid);
1963 if (edid_ext) {
1964 info->cea_rev = edid_ext[1];
1965
1966 /* The existence of a CEA block should imply RGB support */
1967 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1968 if (edid_ext[3] & EDID_CEA_YCRCB444)
1969 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1970 if (edid_ext[3] & EDID_CEA_YCRCB422)
1971 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1972 }
1973
1974 /* Only defined for 1.4 with digital displays */
1975 if (edid->revision < 4)
1976 return;
1977
3b11228b
JB
1978 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1979 case DRM_EDID_DIGITAL_DEPTH_6:
1980 info->bpc = 6;
1981 break;
1982 case DRM_EDID_DIGITAL_DEPTH_8:
1983 info->bpc = 8;
1984 break;
1985 case DRM_EDID_DIGITAL_DEPTH_10:
1986 info->bpc = 10;
1987 break;
1988 case DRM_EDID_DIGITAL_DEPTH_12:
1989 info->bpc = 12;
1990 break;
1991 case DRM_EDID_DIGITAL_DEPTH_14:
1992 info->bpc = 14;
1993 break;
1994 case DRM_EDID_DIGITAL_DEPTH_16:
1995 info->bpc = 16;
1996 break;
1997 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1998 default:
1999 info->bpc = 0;
2000 break;
2001 }
da05a5a7 2002
a988bc72 2003 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
2004 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2005 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2006 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2007 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
2008}
2009
f453ba04
DA
2010/**
2011 * drm_add_edid_modes - add modes from EDID data, if available
2012 * @connector: connector we're probing
2013 * @edid: edid data
2014 *
2015 * Add the specified modes to the connector's mode list.
2016 *
2017 * Return number of modes added or 0 if we couldn't find any.
2018 */
2019int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2020{
2021 int num_modes = 0;
2022 u32 quirks;
2023
2024 if (edid == NULL) {
2025 return 0;
2026 }
3c537889 2027 if (!drm_edid_is_valid(edid)) {
dcdb1674 2028 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
2029 drm_get_connector_name(connector));
2030 return 0;
2031 }
2032
2033 quirks = edid_get_quirks(edid);
2034
c867df70
AJ
2035 /*
2036 * EDID spec says modes should be preferred in this order:
2037 * - preferred detailed mode
2038 * - other detailed modes from base block
2039 * - detailed modes from extension blocks
2040 * - CVT 3-byte code modes
2041 * - standard timing codes
2042 * - established timing codes
2043 * - modes inferred from GTF or CVT range information
2044 *
13931579 2045 * We get this pretty much right.
c867df70
AJ
2046 *
2047 * XXX order for additional mode types in extension blocks?
2048 */
13931579
AJ
2049 num_modes += add_detailed_modes(connector, edid, quirks);
2050 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
2051 num_modes += add_standard_modes(connector, edid);
2052 num_modes += add_established_modes(connector, edid);
13931579 2053 num_modes += add_inferred_modes(connector, edid);
54ac76f8 2054 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
2055
2056 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2057 edid_fixup_preferred(connector, quirks);
2058
3b11228b 2059 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
2060
2061 return num_modes;
2062}
2063EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
2064
2065/**
2066 * drm_add_modes_noedid - add modes for the connectors without EDID
2067 * @connector: connector we're probing
2068 * @hdisplay: the horizontal display limit
2069 * @vdisplay: the vertical display limit
2070 *
2071 * Add the specified modes to the connector's mode list. Only when the
2072 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2073 *
2074 * Return number of modes added or 0 if we couldn't find any.
2075 */
2076int drm_add_modes_noedid(struct drm_connector *connector,
2077 int hdisplay, int vdisplay)
2078{
2079 int i, count, num_modes = 0;
b1f559ec 2080 struct drm_display_mode *mode;
f0fda0a4
ZY
2081 struct drm_device *dev = connector->dev;
2082
2083 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2084 if (hdisplay < 0)
2085 hdisplay = 0;
2086 if (vdisplay < 0)
2087 vdisplay = 0;
2088
2089 for (i = 0; i < count; i++) {
b1f559ec 2090 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
2091 if (hdisplay && vdisplay) {
2092 /*
2093 * Only when two are valid, they will be used to check
2094 * whether the mode should be added to the mode list of
2095 * the connector.
2096 */
2097 if (ptr->hdisplay > hdisplay ||
2098 ptr->vdisplay > vdisplay)
2099 continue;
2100 }
f985dedb
AJ
2101 if (drm_mode_vrefresh(ptr) > 61)
2102 continue;
f0fda0a4
ZY
2103 mode = drm_mode_duplicate(dev, ptr);
2104 if (mode) {
2105 drm_mode_probed_add(connector, mode);
2106 num_modes++;
2107 }
2108 }
2109 return num_modes;
2110}
2111EXPORT_SYMBOL(drm_add_modes_noedid);
374a868a
PZ
2112
2113/**
2114 * drm_mode_cea_vic - return the CEA-861 VIC of a given mode
2115 * @mode: mode
2116 *
2117 * RETURNS:
2118 * The VIC number, 0 in case it's not a CEA-861 mode.
2119 */
2120uint8_t drm_mode_cea_vic(const struct drm_display_mode *mode)
2121{
2122 uint8_t i;
2123
2124 for (i = 0; i < drm_num_cea_modes; i++)
2125 if (drm_mode_equal(mode, &edid_cea_modes[i]))
2126 return i + 1;
2127
2128 return 0;
2129}
2130EXPORT_SYMBOL(drm_mode_cea_vic);
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