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f453ba04 DA |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) | |
3 | * Copyright (c) 2007-2008 Intel Corporation | |
4 | * Jesse Barnes <jesse.barnes@intel.com> | |
61e57a8d | 5 | * Copyright 2010 Red Hat, Inc. |
f453ba04 DA |
6 | * |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from | |
8 | * FB layer. | |
9 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> | |
10 | * | |
11 | * Permission is hereby granted, free of charge, to any person obtaining a | |
12 | * copy of this software and associated documentation files (the "Software"), | |
13 | * to deal in the Software without restriction, including without limitation | |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | |
15 | * and/or sell copies of the Software, and to permit persons to whom the | |
16 | * Software is furnished to do so, subject to the following conditions: | |
17 | * | |
18 | * The above copyright notice and this permission notice (including the | |
19 | * next paragraph) shall be included in all copies or substantial portions | |
20 | * of the Software. | |
21 | * | |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
28 | * DEALINGS IN THE SOFTWARE. | |
29 | */ | |
30 | #include <linux/kernel.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
f453ba04 | 32 | #include <linux/i2c.h> |
2d1a8a48 | 33 | #include <linux/export.h> |
f453ba04 DA |
34 | #include "drmP.h" |
35 | #include "drm_edid.h" | |
38fcbb67 | 36 | #include "drm_edid_modes.h" |
f453ba04 | 37 | |
13931579 AJ |
38 | #define version_greater(edid, maj, min) \ |
39 | (((edid)->version > (maj)) || \ | |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) | |
f453ba04 | 41 | |
d1ff6409 AJ |
42 | #define EDID_EST_TIMINGS 16 |
43 | #define EDID_STD_TIMINGS 8 | |
44 | #define EDID_DETAILED_TIMINGS 4 | |
f453ba04 DA |
45 | |
46 | /* | |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect | |
48 | * them here (note that userspace may work around broken monitors first, | |
49 | * but fixes should make their way here so that the kernel "just works" | |
50 | * on as many displays as possible). | |
51 | */ | |
52 | ||
53 | /* First detailed mode wrong, use largest 60Hz mode */ | |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) | |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ | |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) | |
57 | /* Prefer the largest mode at 75 Hz */ | |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) | |
59 | /* Detail timing is in cm not mm */ | |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) | |
61 | /* Detailed timing descriptors have bogus size values, so just take the | |
62 | * maximum size and use that. | |
63 | */ | |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) | |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ | |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) | |
67 | /* use +hsync +vsync for detailed mode */ | |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) | |
bc42aabc AJ |
69 | /* Force reduced-blanking timings for detailed modes */ |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) | |
3c537889 | 71 | |
13931579 AJ |
72 | struct detailed_mode_closure { |
73 | struct drm_connector *connector; | |
74 | struct edid *edid; | |
75 | bool preferred; | |
76 | u32 quirks; | |
77 | int modes; | |
78 | }; | |
f453ba04 | 79 | |
5c61259e ZY |
80 | #define LEVEL_DMT 0 |
81 | #define LEVEL_GTF 1 | |
7a374350 AJ |
82 | #define LEVEL_GTF2 2 |
83 | #define LEVEL_CVT 3 | |
5c61259e | 84 | |
f453ba04 | 85 | static struct edid_quirk { |
c51a3fd6 | 86 | char vendor[4]; |
f453ba04 DA |
87 | int product_id; |
88 | u32 quirks; | |
89 | } edid_quirk_list[] = { | |
90 | /* Acer AL1706 */ | |
91 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, | |
92 | /* Acer F51 */ | |
93 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, | |
94 | /* Unknown Acer */ | |
95 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
96 | ||
97 | /* Belinea 10 15 55 */ | |
98 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, | |
99 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, | |
100 | ||
101 | /* Envision Peripherals, Inc. EN-7100e */ | |
102 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, | |
ba1163de AJ |
103 | /* Envision EN2028 */ |
104 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, | |
f453ba04 DA |
105 | |
106 | /* Funai Electronics PM36B */ | |
107 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | | |
108 | EDID_QUIRK_DETAILED_IN_CM }, | |
109 | ||
110 | /* LG Philips LCD LP154W01-A5 */ | |
111 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
112 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
113 | ||
114 | /* Philips 107p5 CRT */ | |
115 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
116 | ||
117 | /* Proview AY765C */ | |
118 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
119 | ||
120 | /* Samsung SyncMaster 205BW. Note: irony */ | |
121 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, | |
122 | /* Samsung SyncMaster 22[5-6]BW */ | |
123 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, | |
124 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, | |
bc42aabc AJ |
125 | |
126 | /* ViewSonic VA2026w */ | |
127 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, | |
f453ba04 DA |
128 | }; |
129 | ||
61e57a8d | 130 | /*** DDC fetch and block validation ***/ |
f453ba04 | 131 | |
083ae056 AJ |
132 | static const u8 edid_header[] = { |
133 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 | |
134 | }; | |
f453ba04 | 135 | |
051963d4 TR |
136 | /* |
137 | * Sanity check the header of the base EDID block. Return 8 if the header | |
138 | * is perfect, down to 0 if it's totally wrong. | |
139 | */ | |
140 | int drm_edid_header_is_valid(const u8 *raw_edid) | |
141 | { | |
142 | int i, score = 0; | |
143 | ||
144 | for (i = 0; i < sizeof(edid_header); i++) | |
145 | if (raw_edid[i] == edid_header[i]) | |
146 | score++; | |
147 | ||
148 | return score; | |
149 | } | |
150 | EXPORT_SYMBOL(drm_edid_header_is_valid); | |
151 | ||
152 | ||
61e57a8d AJ |
153 | /* |
154 | * Sanity check the EDID block (base or extension). Return 0 if the block | |
155 | * doesn't check out, or 1 if it's valid. | |
f453ba04 | 156 | */ |
f89ec8a4 | 157 | bool drm_edid_block_valid(u8 *raw_edid, int block) |
f453ba04 | 158 | { |
61e57a8d | 159 | int i; |
f453ba04 | 160 | u8 csum = 0; |
61e57a8d | 161 | struct edid *edid = (struct edid *)raw_edid; |
f453ba04 | 162 | |
f89ec8a4 | 163 | if (block == 0) { |
051963d4 | 164 | int score = drm_edid_header_is_valid(raw_edid); |
61e57a8d AJ |
165 | if (score == 8) ; |
166 | else if (score >= 6) { | |
167 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); | |
168 | memcpy(raw_edid, edid_header, sizeof(edid_header)); | |
169 | } else { | |
170 | goto bad; | |
171 | } | |
172 | } | |
f453ba04 DA |
173 | |
174 | for (i = 0; i < EDID_LENGTH; i++) | |
175 | csum += raw_edid[i]; | |
176 | if (csum) { | |
177 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); | |
4a638b4e AJ |
178 | |
179 | /* allow CEA to slide through, switches mangle this */ | |
180 | if (raw_edid[0] != 0x02) | |
181 | goto bad; | |
f453ba04 DA |
182 | } |
183 | ||
61e57a8d AJ |
184 | /* per-block-type checks */ |
185 | switch (raw_edid[0]) { | |
186 | case 0: /* base */ | |
187 | if (edid->version != 1) { | |
188 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); | |
189 | goto bad; | |
190 | } | |
862b89c0 | 191 | |
61e57a8d AJ |
192 | if (edid->revision > 4) |
193 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); | |
194 | break; | |
862b89c0 | 195 | |
61e57a8d AJ |
196 | default: |
197 | break; | |
198 | } | |
47ee4ccf | 199 | |
f453ba04 DA |
200 | return 1; |
201 | ||
202 | bad: | |
203 | if (raw_edid) { | |
f49dadb8 | 204 | printk(KERN_ERR "Raw EDID:\n"); |
0aff47f2 TV |
205 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
206 | raw_edid, EDID_LENGTH, false); | |
f453ba04 DA |
207 | } |
208 | return 0; | |
209 | } | |
da0df92b | 210 | EXPORT_SYMBOL(drm_edid_block_valid); |
61e57a8d AJ |
211 | |
212 | /** | |
213 | * drm_edid_is_valid - sanity check EDID data | |
214 | * @edid: EDID data | |
215 | * | |
216 | * Sanity-check an entire EDID record (including extensions) | |
217 | */ | |
218 | bool drm_edid_is_valid(struct edid *edid) | |
219 | { | |
220 | int i; | |
221 | u8 *raw = (u8 *)edid; | |
222 | ||
223 | if (!edid) | |
224 | return false; | |
225 | ||
226 | for (i = 0; i <= edid->extensions; i++) | |
f89ec8a4 | 227 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i)) |
61e57a8d AJ |
228 | return false; |
229 | ||
230 | return true; | |
231 | } | |
3c537889 | 232 | EXPORT_SYMBOL(drm_edid_is_valid); |
f453ba04 | 233 | |
61e57a8d AJ |
234 | #define DDC_SEGMENT_ADDR 0x30 |
235 | /** | |
236 | * Get EDID information via I2C. | |
237 | * | |
238 | * \param adapter : i2c device adaptor | |
239 | * \param buf : EDID data buffer to be filled | |
240 | * \param len : EDID data buffer length | |
241 | * \return 0 on success or -1 on failure. | |
242 | * | |
243 | * Try to fetch EDID information by calling i2c driver function. | |
244 | */ | |
245 | static int | |
246 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, | |
247 | int block, int len) | |
248 | { | |
249 | unsigned char start = block * EDID_LENGTH; | |
4819d2e4 CW |
250 | int ret, retries = 5; |
251 | ||
252 | /* The core i2c driver will automatically retry the transfer if the | |
253 | * adapter reports EAGAIN. However, we find that bit-banging transfers | |
254 | * are susceptible to errors under a heavily loaded machine and | |
255 | * generate spurious NAKs and timeouts. Retrying the transfer | |
256 | * of the individual block a few times seems to overcome this. | |
257 | */ | |
258 | do { | |
259 | struct i2c_msg msgs[] = { | |
260 | { | |
261 | .addr = DDC_ADDR, | |
262 | .flags = 0, | |
263 | .len = 1, | |
264 | .buf = &start, | |
265 | }, { | |
266 | .addr = DDC_ADDR, | |
267 | .flags = I2C_M_RD, | |
268 | .len = len, | |
269 | .buf = buf, | |
270 | } | |
271 | }; | |
272 | ret = i2c_transfer(adapter, msgs, 2); | |
9292f37e ED |
273 | if (ret == -ENXIO) { |
274 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", | |
275 | adapter->name); | |
276 | break; | |
277 | } | |
4819d2e4 CW |
278 | } while (ret != 2 && --retries); |
279 | ||
280 | return ret == 2 ? 0 : -1; | |
61e57a8d AJ |
281 | } |
282 | ||
4a9a8b71 DA |
283 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
284 | { | |
285 | int i; | |
286 | u32 *raw_edid = (u32 *)in_edid; | |
287 | ||
288 | for (i = 0; i < length / 4; i++) | |
289 | if (*(raw_edid + i) != 0) | |
290 | return false; | |
291 | return true; | |
292 | } | |
293 | ||
61e57a8d AJ |
294 | static u8 * |
295 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) | |
296 | { | |
0ea75e23 | 297 | int i, j = 0, valid_extensions = 0; |
61e57a8d AJ |
298 | u8 *block, *new; |
299 | ||
300 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) | |
301 | return NULL; | |
302 | ||
303 | /* base block fetch */ | |
304 | for (i = 0; i < 4; i++) { | |
305 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) | |
306 | goto out; | |
f89ec8a4 | 307 | if (drm_edid_block_valid(block, 0)) |
61e57a8d | 308 | break; |
4a9a8b71 DA |
309 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
310 | connector->null_edid_counter++; | |
311 | goto carp; | |
312 | } | |
61e57a8d AJ |
313 | } |
314 | if (i == 4) | |
315 | goto carp; | |
316 | ||
317 | /* if there's no extensions, we're done */ | |
318 | if (block[0x7e] == 0) | |
319 | return block; | |
320 | ||
321 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); | |
322 | if (!new) | |
323 | goto out; | |
324 | block = new; | |
325 | ||
326 | for (j = 1; j <= block[0x7e]; j++) { | |
327 | for (i = 0; i < 4; i++) { | |
0ea75e23 ST |
328 | if (drm_do_probe_ddc_edid(adapter, |
329 | block + (valid_extensions + 1) * EDID_LENGTH, | |
330 | j, EDID_LENGTH)) | |
61e57a8d | 331 | goto out; |
f89ec8a4 | 332 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) { |
0ea75e23 | 333 | valid_extensions++; |
61e57a8d | 334 | break; |
0ea75e23 | 335 | } |
61e57a8d AJ |
336 | } |
337 | if (i == 4) | |
0ea75e23 ST |
338 | dev_warn(connector->dev->dev, |
339 | "%s: Ignoring invalid EDID block %d.\n", | |
340 | drm_get_connector_name(connector), j); | |
341 | } | |
342 | ||
343 | if (valid_extensions != block[0x7e]) { | |
344 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; | |
345 | block[0x7e] = valid_extensions; | |
346 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); | |
347 | if (!new) | |
348 | goto out; | |
349 | block = new; | |
61e57a8d AJ |
350 | } |
351 | ||
352 | return block; | |
353 | ||
354 | carp: | |
dcdb1674 | 355 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
61e57a8d AJ |
356 | drm_get_connector_name(connector), j); |
357 | ||
358 | out: | |
359 | kfree(block); | |
360 | return NULL; | |
361 | } | |
362 | ||
363 | /** | |
364 | * Probe DDC presence. | |
365 | * | |
366 | * \param adapter : i2c device adaptor | |
367 | * \return 1 on success | |
368 | */ | |
369 | static bool | |
370 | drm_probe_ddc(struct i2c_adapter *adapter) | |
371 | { | |
372 | unsigned char out; | |
373 | ||
374 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); | |
375 | } | |
376 | ||
377 | /** | |
378 | * drm_get_edid - get EDID data, if available | |
379 | * @connector: connector we're probing | |
380 | * @adapter: i2c adapter to use for DDC | |
381 | * | |
382 | * Poke the given i2c channel to grab EDID data if possible. If found, | |
383 | * attach it to the connector. | |
384 | * | |
385 | * Return edid data or NULL if we couldn't find any. | |
386 | */ | |
387 | struct edid *drm_get_edid(struct drm_connector *connector, | |
388 | struct i2c_adapter *adapter) | |
389 | { | |
390 | struct edid *edid = NULL; | |
391 | ||
392 | if (drm_probe_ddc(adapter)) | |
393 | edid = (struct edid *)drm_do_get_edid(connector, adapter); | |
394 | ||
395 | connector->display_info.raw_edid = (char *)edid; | |
396 | ||
397 | return edid; | |
398 | ||
399 | } | |
400 | EXPORT_SYMBOL(drm_get_edid); | |
401 | ||
402 | /*** EDID parsing ***/ | |
403 | ||
f453ba04 DA |
404 | /** |
405 | * edid_vendor - match a string against EDID's obfuscated vendor field | |
406 | * @edid: EDID to match | |
407 | * @vendor: vendor string | |
408 | * | |
409 | * Returns true if @vendor is in @edid, false otherwise | |
410 | */ | |
411 | static bool edid_vendor(struct edid *edid, char *vendor) | |
412 | { | |
413 | char edid_vendor[3]; | |
414 | ||
415 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; | |
416 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | | |
417 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; | |
16456c87 | 418 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
f453ba04 DA |
419 | |
420 | return !strncmp(edid_vendor, vendor, 3); | |
421 | } | |
422 | ||
423 | /** | |
424 | * edid_get_quirks - return quirk flags for a given EDID | |
425 | * @edid: EDID to process | |
426 | * | |
427 | * This tells subsequent routines what fixes they need to apply. | |
428 | */ | |
429 | static u32 edid_get_quirks(struct edid *edid) | |
430 | { | |
431 | struct edid_quirk *quirk; | |
432 | int i; | |
433 | ||
434 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { | |
435 | quirk = &edid_quirk_list[i]; | |
436 | ||
437 | if (edid_vendor(edid, quirk->vendor) && | |
438 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) | |
439 | return quirk->quirks; | |
440 | } | |
441 | ||
442 | return 0; | |
443 | } | |
444 | ||
445 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) | |
446 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) | |
447 | ||
f453ba04 DA |
448 | /** |
449 | * edid_fixup_preferred - set preferred modes based on quirk list | |
450 | * @connector: has mode list to fix up | |
451 | * @quirks: quirks list | |
452 | * | |
453 | * Walk the mode list for @connector, clearing the preferred status | |
454 | * on existing modes and setting it anew for the right mode ala @quirks. | |
455 | */ | |
456 | static void edid_fixup_preferred(struct drm_connector *connector, | |
457 | u32 quirks) | |
458 | { | |
459 | struct drm_display_mode *t, *cur_mode, *preferred_mode; | |
f890607b | 460 | int target_refresh = 0; |
f453ba04 DA |
461 | |
462 | if (list_empty(&connector->probed_modes)) | |
463 | return; | |
464 | ||
465 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) | |
466 | target_refresh = 60; | |
467 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) | |
468 | target_refresh = 75; | |
469 | ||
470 | preferred_mode = list_first_entry(&connector->probed_modes, | |
471 | struct drm_display_mode, head); | |
472 | ||
473 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { | |
474 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; | |
475 | ||
476 | if (cur_mode == preferred_mode) | |
477 | continue; | |
478 | ||
479 | /* Largest mode is preferred */ | |
480 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) | |
481 | preferred_mode = cur_mode; | |
482 | ||
483 | /* At a given size, try to get closest to target refresh */ | |
484 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && | |
485 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < | |
486 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { | |
487 | preferred_mode = cur_mode; | |
488 | } | |
489 | } | |
490 | ||
491 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; | |
492 | } | |
493 | ||
f6e252ba AJ |
494 | static bool |
495 | mode_is_rb(const struct drm_display_mode *mode) | |
496 | { | |
497 | return (mode->htotal - mode->hdisplay == 160) && | |
498 | (mode->hsync_end - mode->hdisplay == 80) && | |
499 | (mode->hsync_end - mode->hsync_start == 32) && | |
500 | (mode->vsync_start - mode->vdisplay == 3); | |
501 | } | |
502 | ||
33c7531d AJ |
503 | /* |
504 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT | |
505 | * @dev: Device to duplicate against | |
506 | * @hsize: Mode width | |
507 | * @vsize: Mode height | |
508 | * @fresh: Mode refresh rate | |
f6e252ba | 509 | * @rb: Mode reduced-blanking-ness |
33c7531d AJ |
510 | * |
511 | * Walk the DMT mode list looking for a match for the given parameters. | |
512 | * Return a newly allocated copy of the mode, or NULL if not found. | |
513 | */ | |
1d42bbc8 | 514 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
f6e252ba AJ |
515 | int hsize, int vsize, int fresh, |
516 | bool rb) | |
559ee21d | 517 | { |
07a5e632 | 518 | int i; |
559ee21d | 519 | |
07a5e632 | 520 | for (i = 0; i < drm_num_dmt_modes; i++) { |
b1f559ec | 521 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f8b46a05 AJ |
522 | if (hsize != ptr->hdisplay) |
523 | continue; | |
524 | if (vsize != ptr->vdisplay) | |
525 | continue; | |
526 | if (fresh != drm_mode_vrefresh(ptr)) | |
527 | continue; | |
f6e252ba AJ |
528 | if (rb != mode_is_rb(ptr)) |
529 | continue; | |
f8b46a05 AJ |
530 | |
531 | return drm_mode_duplicate(dev, ptr); | |
559ee21d | 532 | } |
f8b46a05 AJ |
533 | |
534 | return NULL; | |
559ee21d | 535 | } |
1d42bbc8 | 536 | EXPORT_SYMBOL(drm_mode_find_dmt); |
23425cae | 537 | |
d1ff6409 AJ |
538 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
539 | ||
4d76a221 AJ |
540 | static void |
541 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
542 | { | |
543 | int i, n = 0; | |
4966b2a9 | 544 | u8 d = ext[0x02]; |
4d76a221 AJ |
545 | u8 *det_base = ext + d; |
546 | ||
4966b2a9 | 547 | n = (127 - d) / 18; |
4d76a221 AJ |
548 | for (i = 0; i < n; i++) |
549 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
550 | } | |
551 | ||
cbba98f8 AJ |
552 | static void |
553 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
554 | { | |
555 | unsigned int i, n = min((int)ext[0x02], 6); | |
556 | u8 *det_base = ext + 5; | |
557 | ||
558 | if (ext[0x01] != 1) | |
559 | return; /* unknown version */ | |
560 | ||
561 | for (i = 0; i < n; i++) | |
562 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
563 | } | |
564 | ||
d1ff6409 AJ |
565 | static void |
566 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) | |
567 | { | |
568 | int i; | |
569 | struct edid *edid = (struct edid *)raw_edid; | |
570 | ||
571 | if (edid == NULL) | |
572 | return; | |
573 | ||
574 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) | |
575 | cb(&(edid->detailed_timings[i]), closure); | |
576 | ||
4d76a221 AJ |
577 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
578 | u8 *ext = raw_edid + (i * EDID_LENGTH); | |
579 | switch (*ext) { | |
580 | case CEA_EXT: | |
581 | cea_for_each_detailed_block(ext, cb, closure); | |
582 | break; | |
cbba98f8 AJ |
583 | case VTB_EXT: |
584 | vtb_for_each_detailed_block(ext, cb, closure); | |
585 | break; | |
4d76a221 AJ |
586 | default: |
587 | break; | |
588 | } | |
589 | } | |
d1ff6409 AJ |
590 | } |
591 | ||
592 | static void | |
593 | is_rb(struct detailed_timing *t, void *data) | |
594 | { | |
595 | u8 *r = (u8 *)t; | |
596 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) | |
597 | if (r[15] & 0x10) | |
598 | *(bool *)data = true; | |
599 | } | |
600 | ||
601 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ | |
602 | static bool | |
603 | drm_monitor_supports_rb(struct edid *edid) | |
604 | { | |
605 | if (edid->revision >= 4) { | |
606 | bool ret; | |
607 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); | |
608 | return ret; | |
609 | } | |
610 | ||
611 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); | |
612 | } | |
613 | ||
7a374350 AJ |
614 | static void |
615 | find_gtf2(struct detailed_timing *t, void *data) | |
616 | { | |
617 | u8 *r = (u8 *)t; | |
618 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) | |
619 | *(u8 **)data = r; | |
620 | } | |
621 | ||
622 | /* Secondary GTF curve kicks in above some break frequency */ | |
623 | static int | |
624 | drm_gtf2_hbreak(struct edid *edid) | |
625 | { | |
626 | u8 *r = NULL; | |
627 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
628 | return r ? (r[12] * 2) : 0; | |
629 | } | |
630 | ||
631 | static int | |
632 | drm_gtf2_2c(struct edid *edid) | |
633 | { | |
634 | u8 *r = NULL; | |
635 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
636 | return r ? r[13] : 0; | |
637 | } | |
638 | ||
639 | static int | |
640 | drm_gtf2_m(struct edid *edid) | |
641 | { | |
642 | u8 *r = NULL; | |
643 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
644 | return r ? (r[15] << 8) + r[14] : 0; | |
645 | } | |
646 | ||
647 | static int | |
648 | drm_gtf2_k(struct edid *edid) | |
649 | { | |
650 | u8 *r = NULL; | |
651 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
652 | return r ? r[16] : 0; | |
653 | } | |
654 | ||
655 | static int | |
656 | drm_gtf2_2j(struct edid *edid) | |
657 | { | |
658 | u8 *r = NULL; | |
659 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
660 | return r ? r[17] : 0; | |
661 | } | |
662 | ||
663 | /** | |
664 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) | |
665 | * @edid: EDID block to scan | |
666 | */ | |
667 | static int standard_timing_level(struct edid *edid) | |
668 | { | |
669 | if (edid->revision >= 2) { | |
670 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) | |
671 | return LEVEL_CVT; | |
672 | if (drm_gtf2_hbreak(edid)) | |
673 | return LEVEL_GTF2; | |
674 | return LEVEL_GTF; | |
675 | } | |
676 | return LEVEL_DMT; | |
677 | } | |
678 | ||
23425cae AJ |
679 | /* |
680 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old | |
681 | * monitors fill with ascii space (0x20) instead. | |
682 | */ | |
683 | static int | |
684 | bad_std_timing(u8 a, u8 b) | |
685 | { | |
686 | return (a == 0x00 && b == 0x00) || | |
687 | (a == 0x01 && b == 0x01) || | |
688 | (a == 0x20 && b == 0x20); | |
689 | } | |
690 | ||
f453ba04 DA |
691 | /** |
692 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode | |
693 | * @t: standard timing params | |
5c61259e | 694 | * @timing_level: standard timing level |
f453ba04 DA |
695 | * |
696 | * Take the standard timing params (in this case width, aspect, and refresh) | |
5c61259e | 697 | * and convert them into a real mode using CVT/GTF/DMT. |
f453ba04 | 698 | */ |
7ca6adb3 | 699 | static struct drm_display_mode * |
7a374350 AJ |
700 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
701 | struct std_timing *t, int revision) | |
f453ba04 | 702 | { |
7ca6adb3 AJ |
703 | struct drm_device *dev = connector->dev; |
704 | struct drm_display_mode *m, *mode = NULL; | |
5c61259e ZY |
705 | int hsize, vsize; |
706 | int vrefresh_rate; | |
0454beab MD |
707 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
708 | >> EDID_TIMING_ASPECT_SHIFT; | |
5c61259e ZY |
709 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
710 | >> EDID_TIMING_VFREQ_SHIFT; | |
7a374350 | 711 | int timing_level = standard_timing_level(edid); |
5c61259e | 712 | |
23425cae AJ |
713 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
714 | return NULL; | |
715 | ||
5c61259e ZY |
716 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
717 | hsize = t->hsize * 8 + 248; | |
718 | /* vrefresh_rate = vfreq + 60 */ | |
719 | vrefresh_rate = vfreq + 60; | |
720 | /* the vdisplay is calculated based on the aspect ratio */ | |
f066a17d AJ |
721 | if (aspect_ratio == 0) { |
722 | if (revision < 3) | |
723 | vsize = hsize; | |
724 | else | |
725 | vsize = (hsize * 10) / 16; | |
726 | } else if (aspect_ratio == 1) | |
f453ba04 | 727 | vsize = (hsize * 3) / 4; |
0454beab | 728 | else if (aspect_ratio == 2) |
f453ba04 DA |
729 | vsize = (hsize * 4) / 5; |
730 | else | |
731 | vsize = (hsize * 9) / 16; | |
a0910c8e AJ |
732 | |
733 | /* HDTV hack, part 1 */ | |
734 | if (vrefresh_rate == 60 && | |
735 | ((hsize == 1360 && vsize == 765) || | |
736 | (hsize == 1368 && vsize == 769))) { | |
737 | hsize = 1366; | |
738 | vsize = 768; | |
739 | } | |
740 | ||
7ca6adb3 AJ |
741 | /* |
742 | * If this connector already has a mode for this size and refresh | |
743 | * rate (because it came from detailed or CVT info), use that | |
744 | * instead. This way we don't have to guess at interlace or | |
745 | * reduced blanking. | |
746 | */ | |
522032da | 747 | list_for_each_entry(m, &connector->probed_modes, head) |
7ca6adb3 AJ |
748 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
749 | drm_mode_vrefresh(m) == vrefresh_rate) | |
750 | return NULL; | |
751 | ||
a0910c8e AJ |
752 | /* HDTV hack, part 2 */ |
753 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { | |
754 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, | |
d50ba256 | 755 | false); |
559ee21d | 756 | mode->hdisplay = 1366; |
a4967de6 AJ |
757 | mode->hsync_start = mode->hsync_start - 1; |
758 | mode->hsync_end = mode->hsync_end - 1; | |
559ee21d ZY |
759 | return mode; |
760 | } | |
a0910c8e | 761 | |
559ee21d | 762 | /* check whether it can be found in default mode table */ |
f6e252ba AJ |
763 | if (drm_monitor_supports_rb(edid)) { |
764 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, | |
765 | true); | |
766 | if (mode) | |
767 | return mode; | |
768 | } | |
769 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); | |
559ee21d ZY |
770 | if (mode) |
771 | return mode; | |
772 | ||
f6e252ba | 773 | /* okay, generate it */ |
5c61259e ZY |
774 | switch (timing_level) { |
775 | case LEVEL_DMT: | |
5c61259e ZY |
776 | break; |
777 | case LEVEL_GTF: | |
778 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
779 | break; | |
7a374350 AJ |
780 | case LEVEL_GTF2: |
781 | /* | |
782 | * This is potentially wrong if there's ever a monitor with | |
783 | * more than one ranges section, each claiming a different | |
784 | * secondary GTF curve. Please don't do that. | |
785 | */ | |
786 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
fc48f169 TI |
787 | if (!mode) |
788 | return NULL; | |
7a374350 | 789 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
aefd330e | 790 | drm_mode_destroy(dev, mode); |
7a374350 AJ |
791 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
792 | vrefresh_rate, 0, 0, | |
793 | drm_gtf2_m(edid), | |
794 | drm_gtf2_2c(edid), | |
795 | drm_gtf2_k(edid), | |
796 | drm_gtf2_2j(edid)); | |
797 | } | |
798 | break; | |
5c61259e | 799 | case LEVEL_CVT: |
d50ba256 DA |
800 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
801 | false); | |
5c61259e ZY |
802 | break; |
803 | } | |
f453ba04 DA |
804 | return mode; |
805 | } | |
806 | ||
b58db2c6 AJ |
807 | /* |
808 | * EDID is delightfully ambiguous about how interlaced modes are to be | |
809 | * encoded. Our internal representation is of frame height, but some | |
810 | * HDTV detailed timings are encoded as field height. | |
811 | * | |
812 | * The format list here is from CEA, in frame size. Technically we | |
813 | * should be checking refresh rate too. Whatever. | |
814 | */ | |
815 | static void | |
816 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, | |
817 | struct detailed_pixel_timing *pt) | |
818 | { | |
819 | int i; | |
820 | static const struct { | |
821 | int w, h; | |
822 | } cea_interlaced[] = { | |
823 | { 1920, 1080 }, | |
824 | { 720, 480 }, | |
825 | { 1440, 480 }, | |
826 | { 2880, 480 }, | |
827 | { 720, 576 }, | |
828 | { 1440, 576 }, | |
829 | { 2880, 576 }, | |
830 | }; | |
b58db2c6 AJ |
831 | |
832 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) | |
833 | return; | |
834 | ||
3c581411 | 835 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
b58db2c6 AJ |
836 | if ((mode->hdisplay == cea_interlaced[i].w) && |
837 | (mode->vdisplay == cea_interlaced[i].h / 2)) { | |
838 | mode->vdisplay *= 2; | |
839 | mode->vsync_start *= 2; | |
840 | mode->vsync_end *= 2; | |
841 | mode->vtotal *= 2; | |
842 | mode->vtotal |= 1; | |
843 | } | |
844 | } | |
845 | ||
846 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
847 | } | |
848 | ||
f453ba04 DA |
849 | /** |
850 | * drm_mode_detailed - create a new mode from an EDID detailed timing section | |
851 | * @dev: DRM device (needed to create new mode) | |
852 | * @edid: EDID block | |
853 | * @timing: EDID detailed timing info | |
854 | * @quirks: quirks to apply | |
855 | * | |
856 | * An EDID detailed timing block contains enough info for us to create and | |
857 | * return a new struct drm_display_mode. | |
858 | */ | |
859 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |
860 | struct edid *edid, | |
861 | struct detailed_timing *timing, | |
862 | u32 quirks) | |
863 | { | |
864 | struct drm_display_mode *mode; | |
865 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; | |
0454beab MD |
866 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
867 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; | |
868 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; | |
869 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; | |
e14cbee4 MD |
870 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
871 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; | |
872 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; | |
873 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); | |
f453ba04 | 874 | |
fc438966 | 875 | /* ignore tiny modes */ |
0454beab | 876 | if (hactive < 64 || vactive < 64) |
fc438966 AJ |
877 | return NULL; |
878 | ||
0454beab | 879 | if (pt->misc & DRM_EDID_PT_STEREO) { |
f453ba04 DA |
880 | printk(KERN_WARNING "stereo mode not supported\n"); |
881 | return NULL; | |
882 | } | |
0454beab | 883 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
79b7dcb2 | 884 | printk(KERN_WARNING "composite sync not supported\n"); |
f453ba04 DA |
885 | } |
886 | ||
fcb45611 ZY |
887 | /* it is incorrect if hsync/vsync width is zero */ |
888 | if (!hsync_pulse_width || !vsync_pulse_width) { | |
889 | DRM_DEBUG_KMS("Incorrect Detailed timing. " | |
890 | "Wrong Hsync/Vsync pulse width\n"); | |
891 | return NULL; | |
892 | } | |
bc42aabc AJ |
893 | |
894 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { | |
895 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); | |
896 | if (!mode) | |
897 | return NULL; | |
898 | ||
899 | goto set_size; | |
900 | } | |
901 | ||
f453ba04 DA |
902 | mode = drm_mode_create(dev); |
903 | if (!mode) | |
904 | return NULL; | |
905 | ||
f453ba04 | 906 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
0454beab MD |
907 | timing->pixel_clock = cpu_to_le16(1088); |
908 | ||
909 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; | |
910 | ||
911 | mode->hdisplay = hactive; | |
912 | mode->hsync_start = mode->hdisplay + hsync_offset; | |
913 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; | |
914 | mode->htotal = mode->hdisplay + hblank; | |
915 | ||
916 | mode->vdisplay = vactive; | |
917 | mode->vsync_start = mode->vdisplay + vsync_offset; | |
918 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; | |
919 | mode->vtotal = mode->vdisplay + vblank; | |
f453ba04 | 920 | |
7064fef5 JB |
921 | /* Some EDIDs have bogus h/vtotal values */ |
922 | if (mode->hsync_end > mode->htotal) | |
923 | mode->htotal = mode->hsync_end + 1; | |
924 | if (mode->vsync_end > mode->vtotal) | |
925 | mode->vtotal = mode->vsync_end + 1; | |
926 | ||
b58db2c6 | 927 | drm_mode_do_interlace_quirk(mode, pt); |
f453ba04 DA |
928 | |
929 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { | |
0454beab | 930 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
f453ba04 DA |
931 | } |
932 | ||
0454beab MD |
933 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
934 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; | |
935 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? | |
936 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; | |
f453ba04 | 937 | |
bc42aabc | 938 | set_size: |
e14cbee4 MD |
939 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
940 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; | |
f453ba04 DA |
941 | |
942 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { | |
943 | mode->width_mm *= 10; | |
944 | mode->height_mm *= 10; | |
945 | } | |
946 | ||
947 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { | |
948 | mode->width_mm = edid->width_cm * 10; | |
949 | mode->height_mm = edid->height_cm * 10; | |
950 | } | |
951 | ||
bc42aabc AJ |
952 | mode->type = DRM_MODE_TYPE_DRIVER; |
953 | drm_mode_set_name(mode); | |
954 | ||
f453ba04 DA |
955 | return mode; |
956 | } | |
957 | ||
b17e52ef | 958 | static bool |
b1f559ec CW |
959 | mode_in_hsync_range(const struct drm_display_mode *mode, |
960 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
961 | { |
962 | int hsync, hmin, hmax; | |
963 | ||
964 | hmin = t[7]; | |
965 | if (edid->revision >= 4) | |
966 | hmin += ((t[4] & 0x04) ? 255 : 0); | |
967 | hmax = t[8]; | |
968 | if (edid->revision >= 4) | |
969 | hmax += ((t[4] & 0x08) ? 255 : 0); | |
07a5e632 | 970 | hsync = drm_mode_hsync(mode); |
07a5e632 | 971 | |
b17e52ef AJ |
972 | return (hsync <= hmax && hsync >= hmin); |
973 | } | |
974 | ||
975 | static bool | |
b1f559ec CW |
976 | mode_in_vsync_range(const struct drm_display_mode *mode, |
977 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
978 | { |
979 | int vsync, vmin, vmax; | |
980 | ||
981 | vmin = t[5]; | |
982 | if (edid->revision >= 4) | |
983 | vmin += ((t[4] & 0x01) ? 255 : 0); | |
984 | vmax = t[6]; | |
985 | if (edid->revision >= 4) | |
986 | vmax += ((t[4] & 0x02) ? 255 : 0); | |
987 | vsync = drm_mode_vrefresh(mode); | |
988 | ||
989 | return (vsync <= vmax && vsync >= vmin); | |
990 | } | |
991 | ||
992 | static u32 | |
993 | range_pixel_clock(struct edid *edid, u8 *t) | |
994 | { | |
995 | /* unspecified */ | |
996 | if (t[9] == 0 || t[9] == 255) | |
997 | return 0; | |
998 | ||
999 | /* 1.4 with CVT support gives us real precision, yay */ | |
1000 | if (edid->revision >= 4 && t[10] == 0x04) | |
1001 | return (t[9] * 10000) - ((t[12] >> 2) * 250); | |
1002 | ||
1003 | /* 1.3 is pathetic, so fuzz up a bit */ | |
1004 | return t[9] * 10000 + 5001; | |
1005 | } | |
1006 | ||
b17e52ef | 1007 | static bool |
b1f559ec | 1008 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
b17e52ef AJ |
1009 | struct detailed_timing *timing) |
1010 | { | |
1011 | u32 max_clock; | |
1012 | u8 *t = (u8 *)timing; | |
1013 | ||
1014 | if (!mode_in_hsync_range(mode, edid, t)) | |
07a5e632 AJ |
1015 | return false; |
1016 | ||
b17e52ef | 1017 | if (!mode_in_vsync_range(mode, edid, t)) |
07a5e632 AJ |
1018 | return false; |
1019 | ||
b17e52ef | 1020 | if ((max_clock = range_pixel_clock(edid, t))) |
07a5e632 AJ |
1021 | if (mode->clock > max_clock) |
1022 | return false; | |
b17e52ef AJ |
1023 | |
1024 | /* 1.4 max horizontal check */ | |
1025 | if (edid->revision >= 4 && t[10] == 0x04) | |
1026 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) | |
1027 | return false; | |
1028 | ||
1029 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) | |
1030 | return false; | |
07a5e632 AJ |
1031 | |
1032 | return true; | |
1033 | } | |
1034 | ||
b17e52ef | 1035 | static int |
cd4cd3de | 1036 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
b17e52ef | 1037 | struct detailed_timing *timing) |
07a5e632 AJ |
1038 | { |
1039 | int i, modes = 0; | |
1040 | struct drm_display_mode *newmode; | |
1041 | struct drm_device *dev = connector->dev; | |
1042 | ||
1043 | for (i = 0; i < drm_num_dmt_modes; i++) { | |
b17e52ef | 1044 | if (mode_in_range(drm_dmt_modes + i, edid, timing)) { |
07a5e632 AJ |
1045 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1046 | if (newmode) { | |
1047 | drm_mode_probed_add(connector, newmode); | |
1048 | modes++; | |
1049 | } | |
1050 | } | |
1051 | } | |
1052 | ||
1053 | return modes; | |
1054 | } | |
1055 | ||
c09dedb7 TI |
1056 | /* fix up 1366x768 mode from 1368x768; |
1057 | * GFT/CVT can't express 1366 width which isn't dividable by 8 | |
1058 | */ | |
1059 | static void fixup_mode_1366x768(struct drm_display_mode *mode) | |
1060 | { | |
1061 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { | |
1062 | mode->hdisplay = 1366; | |
1063 | mode->hsync_start--; | |
1064 | mode->hsync_end--; | |
1065 | drm_mode_set_name(mode); | |
1066 | } | |
1067 | } | |
1068 | ||
b309bd37 AJ |
1069 | static int |
1070 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1071 | struct detailed_timing *timing) | |
1072 | { | |
1073 | int i, modes = 0; | |
1074 | struct drm_display_mode *newmode; | |
1075 | struct drm_device *dev = connector->dev; | |
1076 | ||
1077 | for (i = 0; i < num_extra_modes; i++) { | |
1078 | const struct minimode *m = &extra_modes[i]; | |
1079 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); | |
fc48f169 TI |
1080 | if (!newmode) |
1081 | return modes; | |
b309bd37 | 1082 | |
c09dedb7 | 1083 | fixup_mode_1366x768(newmode); |
b309bd37 AJ |
1084 | if (!mode_in_range(newmode, edid, timing)) { |
1085 | drm_mode_destroy(dev, newmode); | |
1086 | continue; | |
1087 | } | |
1088 | ||
1089 | drm_mode_probed_add(connector, newmode); | |
1090 | modes++; | |
1091 | } | |
1092 | ||
1093 | return modes; | |
1094 | } | |
1095 | ||
1096 | static int | |
1097 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1098 | struct detailed_timing *timing) | |
1099 | { | |
1100 | int i, modes = 0; | |
1101 | struct drm_display_mode *newmode; | |
1102 | struct drm_device *dev = connector->dev; | |
1103 | bool rb = drm_monitor_supports_rb(edid); | |
1104 | ||
1105 | for (i = 0; i < num_extra_modes; i++) { | |
1106 | const struct minimode *m = &extra_modes[i]; | |
1107 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); | |
fc48f169 TI |
1108 | if (!newmode) |
1109 | return modes; | |
b309bd37 | 1110 | |
c09dedb7 | 1111 | fixup_mode_1366x768(newmode); |
b309bd37 AJ |
1112 | if (!mode_in_range(newmode, edid, timing)) { |
1113 | drm_mode_destroy(dev, newmode); | |
1114 | continue; | |
1115 | } | |
1116 | ||
1117 | drm_mode_probed_add(connector, newmode); | |
1118 | modes++; | |
1119 | } | |
1120 | ||
1121 | return modes; | |
1122 | } | |
1123 | ||
13931579 AJ |
1124 | static void |
1125 | do_inferred_modes(struct detailed_timing *timing, void *c) | |
9340d8cf | 1126 | { |
13931579 AJ |
1127 | struct detailed_mode_closure *closure = c; |
1128 | struct detailed_non_pixel *data = &timing->data.other_data; | |
b309bd37 | 1129 | struct detailed_data_monitor_range *range = &data->data.range; |
9340d8cf | 1130 | |
cb21aafe AJ |
1131 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
1132 | return; | |
1133 | ||
1134 | closure->modes += drm_dmt_modes_for_range(closure->connector, | |
1135 | closure->edid, | |
1136 | timing); | |
b309bd37 AJ |
1137 | |
1138 | if (!version_greater(closure->edid, 1, 1)) | |
1139 | return; /* GTF not defined yet */ | |
1140 | ||
1141 | switch (range->flags) { | |
1142 | case 0x02: /* secondary gtf, XXX could do more */ | |
1143 | case 0x00: /* default gtf */ | |
1144 | closure->modes += drm_gtf_modes_for_range(closure->connector, | |
1145 | closure->edid, | |
1146 | timing); | |
1147 | break; | |
1148 | case 0x04: /* cvt, only in 1.4+ */ | |
1149 | if (!version_greater(closure->edid, 1, 3)) | |
1150 | break; | |
1151 | ||
1152 | closure->modes += drm_cvt_modes_for_range(closure->connector, | |
1153 | closure->edid, | |
1154 | timing); | |
1155 | break; | |
1156 | case 0x01: /* just the ranges, no formula */ | |
1157 | default: | |
1158 | break; | |
1159 | } | |
13931579 | 1160 | } |
69da3015 | 1161 | |
13931579 AJ |
1162 | static int |
1163 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) | |
1164 | { | |
1165 | struct detailed_mode_closure closure = { | |
1166 | connector, edid, 0, 0, 0 | |
1167 | }; | |
9340d8cf | 1168 | |
13931579 AJ |
1169 | if (version_greater(edid, 1, 0)) |
1170 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, | |
1171 | &closure); | |
9340d8cf | 1172 | |
13931579 | 1173 | return closure.modes; |
9340d8cf AJ |
1174 | } |
1175 | ||
2255be14 AJ |
1176 | static int |
1177 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) | |
1178 | { | |
1179 | int i, j, m, modes = 0; | |
1180 | struct drm_display_mode *mode; | |
1181 | u8 *est = ((u8 *)timing) + 5; | |
1182 | ||
1183 | for (i = 0; i < 6; i++) { | |
1184 | for (j = 7; j > 0; j--) { | |
1185 | m = (i * 8) + (7 - j); | |
3c581411 | 1186 | if (m >= ARRAY_SIZE(est3_modes)) |
2255be14 AJ |
1187 | break; |
1188 | if (est[i] & (1 << j)) { | |
1d42bbc8 DA |
1189 | mode = drm_mode_find_dmt(connector->dev, |
1190 | est3_modes[m].w, | |
1191 | est3_modes[m].h, | |
f6e252ba AJ |
1192 | est3_modes[m].r, |
1193 | est3_modes[m].rb); | |
2255be14 AJ |
1194 | if (mode) { |
1195 | drm_mode_probed_add(connector, mode); | |
1196 | modes++; | |
1197 | } | |
1198 | } | |
1199 | } | |
1200 | } | |
1201 | ||
1202 | return modes; | |
1203 | } | |
1204 | ||
13931579 AJ |
1205 | static void |
1206 | do_established_modes(struct detailed_timing *timing, void *c) | |
9cf00977 | 1207 | { |
13931579 | 1208 | struct detailed_mode_closure *closure = c; |
9cf00977 | 1209 | struct detailed_non_pixel *data = &timing->data.other_data; |
9cf00977 | 1210 | |
13931579 AJ |
1211 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
1212 | closure->modes += drm_est3_modes(closure->connector, timing); | |
1213 | } | |
9cf00977 | 1214 | |
13931579 AJ |
1215 | /** |
1216 | * add_established_modes - get est. modes from EDID and add them | |
1217 | * @edid: EDID block to scan | |
1218 | * | |
1219 | * Each EDID block contains a bitmap of the supported "established modes" list | |
1220 | * (defined above). Tease them out and add them to the global modes list. | |
1221 | */ | |
1222 | static int | |
1223 | add_established_modes(struct drm_connector *connector, struct edid *edid) | |
1224 | { | |
1225 | struct drm_device *dev = connector->dev; | |
1226 | unsigned long est_bits = edid->established_timings.t1 | | |
1227 | (edid->established_timings.t2 << 8) | | |
1228 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); | |
1229 | int i, modes = 0; | |
1230 | struct detailed_mode_closure closure = { | |
1231 | connector, edid, 0, 0, 0 | |
1232 | }; | |
9cf00977 | 1233 | |
13931579 AJ |
1234 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
1235 | if (est_bits & (1<<i)) { | |
1236 | struct drm_display_mode *newmode; | |
1237 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); | |
1238 | if (newmode) { | |
1239 | drm_mode_probed_add(connector, newmode); | |
1240 | modes++; | |
1241 | } | |
1242 | } | |
9cf00977 AJ |
1243 | } |
1244 | ||
13931579 AJ |
1245 | if (version_greater(edid, 1, 0)) |
1246 | drm_for_each_detailed_block((u8 *)edid, | |
1247 | do_established_modes, &closure); | |
1248 | ||
1249 | return modes + closure.modes; | |
1250 | } | |
1251 | ||
1252 | static void | |
1253 | do_standard_modes(struct detailed_timing *timing, void *c) | |
1254 | { | |
1255 | struct detailed_mode_closure *closure = c; | |
1256 | struct detailed_non_pixel *data = &timing->data.other_data; | |
1257 | struct drm_connector *connector = closure->connector; | |
1258 | struct edid *edid = closure->edid; | |
1259 | ||
1260 | if (data->type == EDID_DETAIL_STD_MODES) { | |
1261 | int i; | |
9cf00977 AJ |
1262 | for (i = 0; i < 6; i++) { |
1263 | struct std_timing *std; | |
1264 | struct drm_display_mode *newmode; | |
1265 | ||
1266 | std = &data->data.timings[i]; | |
7a374350 AJ |
1267 | newmode = drm_mode_std(connector, edid, std, |
1268 | edid->revision); | |
9cf00977 AJ |
1269 | if (newmode) { |
1270 | drm_mode_probed_add(connector, newmode); | |
13931579 | 1271 | closure->modes++; |
9cf00977 AJ |
1272 | } |
1273 | } | |
9cf00977 | 1274 | } |
9cf00977 AJ |
1275 | } |
1276 | ||
f453ba04 | 1277 | /** |
13931579 | 1278 | * add_standard_modes - get std. modes from EDID and add them |
f453ba04 | 1279 | * @edid: EDID block to scan |
f453ba04 | 1280 | * |
13931579 AJ |
1281 | * Standard modes can be calculated using the appropriate standard (DMT, |
1282 | * GTF or CVT. Grab them from @edid and add them to the list. | |
f453ba04 | 1283 | */ |
13931579 AJ |
1284 | static int |
1285 | add_standard_modes(struct drm_connector *connector, struct edid *edid) | |
f453ba04 | 1286 | { |
9cf00977 | 1287 | int i, modes = 0; |
13931579 AJ |
1288 | struct detailed_mode_closure closure = { |
1289 | connector, edid, 0, 0, 0 | |
1290 | }; | |
1291 | ||
1292 | for (i = 0; i < EDID_STD_TIMINGS; i++) { | |
1293 | struct drm_display_mode *newmode; | |
1294 | ||
1295 | newmode = drm_mode_std(connector, edid, | |
1296 | &edid->standard_timings[i], | |
1297 | edid->revision); | |
1298 | if (newmode) { | |
1299 | drm_mode_probed_add(connector, newmode); | |
1300 | modes++; | |
1301 | } | |
1302 | } | |
1303 | ||
1304 | if (version_greater(edid, 1, 0)) | |
1305 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, | |
1306 | &closure); | |
1307 | ||
1308 | /* XXX should also look for standard codes in VTB blocks */ | |
1309 | ||
1310 | return modes + closure.modes; | |
1311 | } | |
f453ba04 | 1312 | |
13931579 AJ |
1313 | static int drm_cvt_modes(struct drm_connector *connector, |
1314 | struct detailed_timing *timing) | |
1315 | { | |
1316 | int i, j, modes = 0; | |
1317 | struct drm_display_mode *newmode; | |
1318 | struct drm_device *dev = connector->dev; | |
1319 | struct cvt_timing *cvt; | |
1320 | const int rates[] = { 60, 85, 75, 60, 50 }; | |
1321 | const u8 empty[3] = { 0, 0, 0 }; | |
a327f6b8 | 1322 | |
13931579 AJ |
1323 | for (i = 0; i < 4; i++) { |
1324 | int uninitialized_var(width), height; | |
1325 | cvt = &(timing->data.other_data.data.cvt[i]); | |
f453ba04 | 1326 | |
13931579 | 1327 | if (!memcmp(cvt->code, empty, 3)) |
9cf00977 | 1328 | continue; |
f453ba04 | 1329 | |
13931579 AJ |
1330 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
1331 | switch (cvt->code[1] & 0x0c) { | |
1332 | case 0x00: | |
1333 | width = height * 4 / 3; | |
1334 | break; | |
1335 | case 0x04: | |
1336 | width = height * 16 / 9; | |
1337 | break; | |
1338 | case 0x08: | |
1339 | width = height * 16 / 10; | |
1340 | break; | |
1341 | case 0x0c: | |
1342 | width = height * 15 / 9; | |
1343 | break; | |
1344 | } | |
1345 | ||
1346 | for (j = 1; j < 5; j++) { | |
1347 | if (cvt->code[2] & (1 << j)) { | |
1348 | newmode = drm_cvt_mode(dev, width, height, | |
1349 | rates[j], j == 0, | |
1350 | false, false); | |
1351 | if (newmode) { | |
1352 | drm_mode_probed_add(connector, newmode); | |
1353 | modes++; | |
1354 | } | |
1355 | } | |
1356 | } | |
f453ba04 DA |
1357 | } |
1358 | ||
1359 | return modes; | |
1360 | } | |
9cf00977 | 1361 | |
13931579 AJ |
1362 | static void |
1363 | do_cvt_mode(struct detailed_timing *timing, void *c) | |
882f0219 | 1364 | { |
13931579 AJ |
1365 | struct detailed_mode_closure *closure = c; |
1366 | struct detailed_non_pixel *data = &timing->data.other_data; | |
882f0219 | 1367 | |
13931579 AJ |
1368 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
1369 | closure->modes += drm_cvt_modes(closure->connector, timing); | |
1370 | } | |
882f0219 | 1371 | |
13931579 AJ |
1372 | static int |
1373 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) | |
1374 | { | |
1375 | struct detailed_mode_closure closure = { | |
1376 | connector, edid, 0, 0, 0 | |
1377 | }; | |
882f0219 | 1378 | |
13931579 AJ |
1379 | if (version_greater(edid, 1, 2)) |
1380 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); | |
882f0219 | 1381 | |
13931579 | 1382 | /* XXX should also look for CVT codes in VTB blocks */ |
882f0219 | 1383 | |
13931579 AJ |
1384 | return closure.modes; |
1385 | } | |
1386 | ||
1387 | static void | |
1388 | do_detailed_mode(struct detailed_timing *timing, void *c) | |
1389 | { | |
1390 | struct detailed_mode_closure *closure = c; | |
1391 | struct drm_display_mode *newmode; | |
1392 | ||
1393 | if (timing->pixel_clock) { | |
1394 | newmode = drm_mode_detailed(closure->connector->dev, | |
1395 | closure->edid, timing, | |
1396 | closure->quirks); | |
1397 | if (!newmode) | |
1398 | return; | |
1399 | ||
1400 | if (closure->preferred) | |
1401 | newmode->type |= DRM_MODE_TYPE_PREFERRED; | |
1402 | ||
1403 | drm_mode_probed_add(closure->connector, newmode); | |
1404 | closure->modes++; | |
1405 | closure->preferred = 0; | |
882f0219 | 1406 | } |
13931579 | 1407 | } |
882f0219 | 1408 | |
13931579 AJ |
1409 | /* |
1410 | * add_detailed_modes - Add modes from detailed timings | |
1411 | * @connector: attached connector | |
1412 | * @edid: EDID block to scan | |
1413 | * @quirks: quirks to apply | |
1414 | */ | |
1415 | static int | |
1416 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, | |
1417 | u32 quirks) | |
1418 | { | |
1419 | struct detailed_mode_closure closure = { | |
1420 | connector, | |
1421 | edid, | |
1422 | 1, | |
1423 | quirks, | |
1424 | 0 | |
1425 | }; | |
1426 | ||
1427 | if (closure.preferred && !version_greater(edid, 1, 3)) | |
1428 | closure.preferred = | |
1429 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); | |
1430 | ||
1431 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); | |
1432 | ||
1433 | return closure.modes; | |
882f0219 | 1434 | } |
f453ba04 | 1435 | |
f23c20c8 | 1436 | #define HDMI_IDENTIFIER 0x000C03 |
8fe9790d | 1437 | #define AUDIO_BLOCK 0x01 |
54ac76f8 | 1438 | #define VIDEO_BLOCK 0x02 |
f23c20c8 | 1439 | #define VENDOR_BLOCK 0x03 |
76adaa34 | 1440 | #define SPEAKER_BLOCK 0x04 |
8fe9790d | 1441 | #define EDID_BASIC_AUDIO (1 << 6) |
a988bc72 LPC |
1442 | #define EDID_CEA_YCRCB444 (1 << 5) |
1443 | #define EDID_CEA_YCRCB422 (1 << 4) | |
8fe9790d | 1444 | |
f23c20c8 | 1445 | /** |
8fe9790d | 1446 | * Search EDID for CEA extension block. |
f23c20c8 | 1447 | */ |
eccaca28 | 1448 | u8 *drm_find_cea_extension(struct edid *edid) |
f23c20c8 | 1449 | { |
8fe9790d ZW |
1450 | u8 *edid_ext = NULL; |
1451 | int i; | |
f23c20c8 ML |
1452 | |
1453 | /* No EDID or EDID extensions */ | |
1454 | if (edid == NULL || edid->extensions == 0) | |
8fe9790d | 1455 | return NULL; |
f23c20c8 | 1456 | |
f23c20c8 | 1457 | /* Find CEA extension */ |
7466f4cc | 1458 | for (i = 0; i < edid->extensions; i++) { |
8fe9790d ZW |
1459 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
1460 | if (edid_ext[0] == CEA_EXT) | |
f23c20c8 ML |
1461 | break; |
1462 | } | |
1463 | ||
7466f4cc | 1464 | if (i == edid->extensions) |
8fe9790d ZW |
1465 | return NULL; |
1466 | ||
1467 | return edid_ext; | |
1468 | } | |
eccaca28 | 1469 | EXPORT_SYMBOL(drm_find_cea_extension); |
8fe9790d | 1470 | |
54ac76f8 CS |
1471 | static int |
1472 | do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) | |
1473 | { | |
1474 | struct drm_device *dev = connector->dev; | |
1475 | u8 * mode, cea_mode; | |
1476 | int modes = 0; | |
1477 | ||
1478 | for (mode = db; mode < db + len; mode++) { | |
1479 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ | |
1480 | if (cea_mode < drm_num_cea_modes) { | |
1481 | struct drm_display_mode *newmode; | |
1482 | newmode = drm_mode_duplicate(dev, | |
1483 | &edid_cea_modes[cea_mode]); | |
1484 | if (newmode) { | |
1485 | drm_mode_probed_add(connector, newmode); | |
1486 | modes++; | |
1487 | } | |
1488 | } | |
1489 | } | |
1490 | ||
1491 | return modes; | |
1492 | } | |
1493 | ||
1494 | static int | |
1495 | add_cea_modes(struct drm_connector *connector, struct edid *edid) | |
1496 | { | |
1497 | u8 * cea = drm_find_cea_extension(edid); | |
1498 | u8 * db, dbl; | |
1499 | int modes = 0; | |
1500 | ||
1501 | if (cea && cea[1] >= 3) { | |
1502 | for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) { | |
1503 | dbl = db[0] & 0x1f; | |
1504 | if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK) | |
1505 | modes += do_cea_modes (connector, db+1, dbl); | |
1506 | } | |
1507 | } | |
1508 | ||
1509 | return modes; | |
1510 | } | |
1511 | ||
76adaa34 WF |
1512 | static void |
1513 | parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db) | |
1514 | { | |
1515 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ | |
1516 | ||
1517 | connector->dvi_dual = db[6] & 1; | |
1518 | connector->max_tmds_clock = db[7] * 5; | |
1519 | ||
1520 | connector->latency_present[0] = db[8] >> 7; | |
1521 | connector->latency_present[1] = (db[8] >> 6) & 1; | |
1522 | connector->video_latency[0] = db[9]; | |
1523 | connector->audio_latency[0] = db[10]; | |
1524 | connector->video_latency[1] = db[11]; | |
1525 | connector->audio_latency[1] = db[12]; | |
1526 | ||
1527 | DRM_LOG_KMS("HDMI: DVI dual %d, " | |
1528 | "max TMDS clock %d, " | |
1529 | "latency present %d %d, " | |
1530 | "video latency %d %d, " | |
1531 | "audio latency %d %d\n", | |
1532 | connector->dvi_dual, | |
1533 | connector->max_tmds_clock, | |
1534 | (int) connector->latency_present[0], | |
1535 | (int) connector->latency_present[1], | |
1536 | connector->video_latency[0], | |
1537 | connector->video_latency[1], | |
1538 | connector->audio_latency[0], | |
1539 | connector->audio_latency[1]); | |
1540 | } | |
1541 | ||
1542 | static void | |
1543 | monitor_name(struct detailed_timing *t, void *data) | |
1544 | { | |
1545 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) | |
1546 | *(u8 **)data = t->data.other_data.data.str.str; | |
1547 | } | |
1548 | ||
1549 | /** | |
1550 | * drm_edid_to_eld - build ELD from EDID | |
1551 | * @connector: connector corresponding to the HDMI/DP sink | |
1552 | * @edid: EDID to parse | |
1553 | * | |
1554 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. | |
1555 | * Some ELD fields are left to the graphics driver caller: | |
1556 | * - Conn_Type | |
1557 | * - HDCP | |
1558 | * - Port_ID | |
1559 | */ | |
1560 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) | |
1561 | { | |
1562 | uint8_t *eld = connector->eld; | |
1563 | u8 *cea; | |
1564 | u8 *name; | |
1565 | u8 *db; | |
1566 | int sad_count = 0; | |
1567 | int mnl; | |
1568 | int dbl; | |
1569 | ||
1570 | memset(eld, 0, sizeof(connector->eld)); | |
1571 | ||
1572 | cea = drm_find_cea_extension(edid); | |
1573 | if (!cea) { | |
1574 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); | |
1575 | return; | |
1576 | } | |
1577 | ||
1578 | name = NULL; | |
1579 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); | |
1580 | for (mnl = 0; name && mnl < 13; mnl++) { | |
1581 | if (name[mnl] == 0x0a) | |
1582 | break; | |
1583 | eld[20 + mnl] = name[mnl]; | |
1584 | } | |
1585 | eld[4] = (cea[1] << 5) | mnl; | |
1586 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); | |
1587 | ||
1588 | eld[0] = 2 << 3; /* ELD version: 2 */ | |
1589 | ||
1590 | eld[16] = edid->mfg_id[0]; | |
1591 | eld[17] = edid->mfg_id[1]; | |
1592 | eld[18] = edid->prod_code[0]; | |
1593 | eld[19] = edid->prod_code[1]; | |
1594 | ||
a0ab734d CS |
1595 | if (cea[1] >= 3) |
1596 | for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) { | |
1597 | dbl = db[0] & 0x1f; | |
1598 | ||
1599 | switch ((db[0] & 0xe0) >> 5) { | |
1600 | case AUDIO_BLOCK: | |
1601 | /* Audio Data Block, contains SADs */ | |
1602 | sad_count = dbl / 3; | |
1603 | memcpy(eld + 20 + mnl, &db[1], dbl); | |
1604 | break; | |
1605 | case SPEAKER_BLOCK: | |
1606 | /* Speaker Allocation Data Block */ | |
1607 | eld[7] = db[1]; | |
1608 | break; | |
1609 | case VENDOR_BLOCK: | |
1610 | /* HDMI Vendor-Specific Data Block */ | |
1611 | if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0) | |
1612 | parse_hdmi_vsdb(connector, db); | |
1613 | break; | |
1614 | default: | |
1615 | break; | |
1616 | } | |
76adaa34 | 1617 | } |
76adaa34 WF |
1618 | eld[5] |= sad_count << 4; |
1619 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; | |
1620 | ||
1621 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); | |
1622 | } | |
1623 | EXPORT_SYMBOL(drm_edid_to_eld); | |
1624 | ||
1625 | /** | |
1626 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond | |
1627 | * @connector: connector associated with the HDMI/DP sink | |
1628 | * @mode: the display mode | |
1629 | */ | |
1630 | int drm_av_sync_delay(struct drm_connector *connector, | |
1631 | struct drm_display_mode *mode) | |
1632 | { | |
1633 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); | |
1634 | int a, v; | |
1635 | ||
1636 | if (!connector->latency_present[0]) | |
1637 | return 0; | |
1638 | if (!connector->latency_present[1]) | |
1639 | i = 0; | |
1640 | ||
1641 | a = connector->audio_latency[i]; | |
1642 | v = connector->video_latency[i]; | |
1643 | ||
1644 | /* | |
1645 | * HDMI/DP sink doesn't support audio or video? | |
1646 | */ | |
1647 | if (a == 255 || v == 255) | |
1648 | return 0; | |
1649 | ||
1650 | /* | |
1651 | * Convert raw EDID values to millisecond. | |
1652 | * Treat unknown latency as 0ms. | |
1653 | */ | |
1654 | if (a) | |
1655 | a = min(2 * (a - 1), 500); | |
1656 | if (v) | |
1657 | v = min(2 * (v - 1), 500); | |
1658 | ||
1659 | return max(v - a, 0); | |
1660 | } | |
1661 | EXPORT_SYMBOL(drm_av_sync_delay); | |
1662 | ||
1663 | /** | |
1664 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks | |
1665 | * @encoder: the encoder just changed display mode | |
1666 | * @mode: the adjusted display mode | |
1667 | * | |
1668 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. | |
1669 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. | |
1670 | */ | |
1671 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, | |
1672 | struct drm_display_mode *mode) | |
1673 | { | |
1674 | struct drm_connector *connector; | |
1675 | struct drm_device *dev = encoder->dev; | |
1676 | ||
1677 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) | |
1678 | if (connector->encoder == encoder && connector->eld[0]) | |
1679 | return connector; | |
1680 | ||
1681 | return NULL; | |
1682 | } | |
1683 | EXPORT_SYMBOL(drm_select_eld); | |
1684 | ||
8fe9790d ZW |
1685 | /** |
1686 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. | |
1687 | * @edid: monitor EDID information | |
1688 | * | |
1689 | * Parse the CEA extension according to CEA-861-B. | |
1690 | * Return true if HDMI, false if not or unknown. | |
1691 | */ | |
1692 | bool drm_detect_hdmi_monitor(struct edid *edid) | |
1693 | { | |
1694 | u8 *edid_ext; | |
1695 | int i, hdmi_id; | |
1696 | int start_offset, end_offset; | |
1697 | bool is_hdmi = false; | |
1698 | ||
1699 | edid_ext = drm_find_cea_extension(edid); | |
1700 | if (!edid_ext) | |
f23c20c8 ML |
1701 | goto end; |
1702 | ||
1703 | /* Data block offset in CEA extension block */ | |
1704 | start_offset = 4; | |
1705 | end_offset = edid_ext[2]; | |
1706 | ||
1707 | /* | |
1708 | * Because HDMI identifier is in Vendor Specific Block, | |
1709 | * search it from all data blocks of CEA extension. | |
1710 | */ | |
1711 | for (i = start_offset; i < end_offset; | |
1712 | /* Increased by data block len */ | |
1713 | i += ((edid_ext[i] & 0x1f) + 1)) { | |
1714 | /* Find vendor specific block */ | |
1715 | if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { | |
1716 | hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | | |
1717 | edid_ext[i + 3] << 16; | |
1718 | /* Find HDMI identifier */ | |
1719 | if (hdmi_id == HDMI_IDENTIFIER) | |
1720 | is_hdmi = true; | |
1721 | break; | |
1722 | } | |
1723 | } | |
1724 | ||
1725 | end: | |
1726 | return is_hdmi; | |
1727 | } | |
1728 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); | |
1729 | ||
8fe9790d ZW |
1730 | /** |
1731 | * drm_detect_monitor_audio - check monitor audio capability | |
1732 | * | |
1733 | * Monitor should have CEA extension block. | |
1734 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic | |
1735 | * audio' only. If there is any audio extension block and supported | |
1736 | * audio format, assume at least 'basic audio' support, even if 'basic | |
1737 | * audio' is not defined in EDID. | |
1738 | * | |
1739 | */ | |
1740 | bool drm_detect_monitor_audio(struct edid *edid) | |
1741 | { | |
1742 | u8 *edid_ext; | |
1743 | int i, j; | |
1744 | bool has_audio = false; | |
1745 | int start_offset, end_offset; | |
1746 | ||
1747 | edid_ext = drm_find_cea_extension(edid); | |
1748 | if (!edid_ext) | |
1749 | goto end; | |
1750 | ||
1751 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); | |
1752 | ||
1753 | if (has_audio) { | |
1754 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); | |
1755 | goto end; | |
1756 | } | |
1757 | ||
1758 | /* Data block offset in CEA extension block */ | |
1759 | start_offset = 4; | |
1760 | end_offset = edid_ext[2]; | |
1761 | ||
1762 | for (i = start_offset; i < end_offset; | |
1763 | i += ((edid_ext[i] & 0x1f) + 1)) { | |
1764 | if ((edid_ext[i] >> 5) == AUDIO_BLOCK) { | |
1765 | has_audio = true; | |
1766 | for (j = 1; j < (edid_ext[i] & 0x1f); j += 3) | |
1767 | DRM_DEBUG_KMS("CEA audio format %d\n", | |
1768 | (edid_ext[i + j] >> 3) & 0xf); | |
1769 | goto end; | |
1770 | } | |
1771 | } | |
1772 | end: | |
1773 | return has_audio; | |
1774 | } | |
1775 | EXPORT_SYMBOL(drm_detect_monitor_audio); | |
1776 | ||
3b11228b JB |
1777 | /** |
1778 | * drm_add_display_info - pull display info out if present | |
1779 | * @edid: EDID data | |
1780 | * @info: display info (attached to connector) | |
1781 | * | |
1782 | * Grab any available display info and stuff it into the drm_display_info | |
1783 | * structure that's part of the connector. Useful for tracking bpp and | |
1784 | * color spaces. | |
1785 | */ | |
1786 | static void drm_add_display_info(struct edid *edid, | |
1787 | struct drm_display_info *info) | |
1788 | { | |
ebec9a7b JB |
1789 | u8 *edid_ext; |
1790 | ||
3b11228b JB |
1791 | info->width_mm = edid->width_cm * 10; |
1792 | info->height_mm = edid->height_cm * 10; | |
1793 | ||
1794 | /* driver figures it out in this case */ | |
1795 | info->bpc = 0; | |
da05a5a7 | 1796 | info->color_formats = 0; |
3b11228b | 1797 | |
a988bc72 | 1798 | if (edid->revision < 3) |
3b11228b JB |
1799 | return; |
1800 | ||
1801 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) | |
1802 | return; | |
1803 | ||
a988bc72 LPC |
1804 | /* Get data from CEA blocks if present */ |
1805 | edid_ext = drm_find_cea_extension(edid); | |
1806 | if (edid_ext) { | |
1807 | info->cea_rev = edid_ext[1]; | |
1808 | ||
1809 | /* The existence of a CEA block should imply RGB support */ | |
1810 | info->color_formats = DRM_COLOR_FORMAT_RGB444; | |
1811 | if (edid_ext[3] & EDID_CEA_YCRCB444) | |
1812 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; | |
1813 | if (edid_ext[3] & EDID_CEA_YCRCB422) | |
1814 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; | |
1815 | } | |
1816 | ||
1817 | /* Only defined for 1.4 with digital displays */ | |
1818 | if (edid->revision < 4) | |
1819 | return; | |
1820 | ||
3b11228b JB |
1821 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
1822 | case DRM_EDID_DIGITAL_DEPTH_6: | |
1823 | info->bpc = 6; | |
1824 | break; | |
1825 | case DRM_EDID_DIGITAL_DEPTH_8: | |
1826 | info->bpc = 8; | |
1827 | break; | |
1828 | case DRM_EDID_DIGITAL_DEPTH_10: | |
1829 | info->bpc = 10; | |
1830 | break; | |
1831 | case DRM_EDID_DIGITAL_DEPTH_12: | |
1832 | info->bpc = 12; | |
1833 | break; | |
1834 | case DRM_EDID_DIGITAL_DEPTH_14: | |
1835 | info->bpc = 14; | |
1836 | break; | |
1837 | case DRM_EDID_DIGITAL_DEPTH_16: | |
1838 | info->bpc = 16; | |
1839 | break; | |
1840 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: | |
1841 | default: | |
1842 | info->bpc = 0; | |
1843 | break; | |
1844 | } | |
da05a5a7 | 1845 | |
a988bc72 | 1846 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
ee58808d LPC |
1847 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
1848 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; | |
1849 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) | |
1850 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; | |
3b11228b JB |
1851 | } |
1852 | ||
f453ba04 DA |
1853 | /** |
1854 | * drm_add_edid_modes - add modes from EDID data, if available | |
1855 | * @connector: connector we're probing | |
1856 | * @edid: edid data | |
1857 | * | |
1858 | * Add the specified modes to the connector's mode list. | |
1859 | * | |
1860 | * Return number of modes added or 0 if we couldn't find any. | |
1861 | */ | |
1862 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) | |
1863 | { | |
1864 | int num_modes = 0; | |
1865 | u32 quirks; | |
1866 | ||
1867 | if (edid == NULL) { | |
1868 | return 0; | |
1869 | } | |
3c537889 | 1870 | if (!drm_edid_is_valid(edid)) { |
dcdb1674 | 1871 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
f453ba04 DA |
1872 | drm_get_connector_name(connector)); |
1873 | return 0; | |
1874 | } | |
1875 | ||
1876 | quirks = edid_get_quirks(edid); | |
1877 | ||
c867df70 AJ |
1878 | /* |
1879 | * EDID spec says modes should be preferred in this order: | |
1880 | * - preferred detailed mode | |
1881 | * - other detailed modes from base block | |
1882 | * - detailed modes from extension blocks | |
1883 | * - CVT 3-byte code modes | |
1884 | * - standard timing codes | |
1885 | * - established timing codes | |
1886 | * - modes inferred from GTF or CVT range information | |
1887 | * | |
13931579 | 1888 | * We get this pretty much right. |
c867df70 AJ |
1889 | * |
1890 | * XXX order for additional mode types in extension blocks? | |
1891 | */ | |
13931579 AJ |
1892 | num_modes += add_detailed_modes(connector, edid, quirks); |
1893 | num_modes += add_cvt_modes(connector, edid); | |
c867df70 AJ |
1894 | num_modes += add_standard_modes(connector, edid); |
1895 | num_modes += add_established_modes(connector, edid); | |
13931579 | 1896 | num_modes += add_inferred_modes(connector, edid); |
54ac76f8 | 1897 | num_modes += add_cea_modes(connector, edid); |
f453ba04 DA |
1898 | |
1899 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) | |
1900 | edid_fixup_preferred(connector, quirks); | |
1901 | ||
3b11228b | 1902 | drm_add_display_info(edid, &connector->display_info); |
f453ba04 DA |
1903 | |
1904 | return num_modes; | |
1905 | } | |
1906 | EXPORT_SYMBOL(drm_add_edid_modes); | |
f0fda0a4 ZY |
1907 | |
1908 | /** | |
1909 | * drm_add_modes_noedid - add modes for the connectors without EDID | |
1910 | * @connector: connector we're probing | |
1911 | * @hdisplay: the horizontal display limit | |
1912 | * @vdisplay: the vertical display limit | |
1913 | * | |
1914 | * Add the specified modes to the connector's mode list. Only when the | |
1915 | * hdisplay/vdisplay is not beyond the given limit, it will be added. | |
1916 | * | |
1917 | * Return number of modes added or 0 if we couldn't find any. | |
1918 | */ | |
1919 | int drm_add_modes_noedid(struct drm_connector *connector, | |
1920 | int hdisplay, int vdisplay) | |
1921 | { | |
1922 | int i, count, num_modes = 0; | |
b1f559ec | 1923 | struct drm_display_mode *mode; |
f0fda0a4 ZY |
1924 | struct drm_device *dev = connector->dev; |
1925 | ||
1926 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); | |
1927 | if (hdisplay < 0) | |
1928 | hdisplay = 0; | |
1929 | if (vdisplay < 0) | |
1930 | vdisplay = 0; | |
1931 | ||
1932 | for (i = 0; i < count; i++) { | |
b1f559ec | 1933 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f0fda0a4 ZY |
1934 | if (hdisplay && vdisplay) { |
1935 | /* | |
1936 | * Only when two are valid, they will be used to check | |
1937 | * whether the mode should be added to the mode list of | |
1938 | * the connector. | |
1939 | */ | |
1940 | if (ptr->hdisplay > hdisplay || | |
1941 | ptr->vdisplay > vdisplay) | |
1942 | continue; | |
1943 | } | |
f985dedb AJ |
1944 | if (drm_mode_vrefresh(ptr) > 61) |
1945 | continue; | |
f0fda0a4 ZY |
1946 | mode = drm_mode_duplicate(dev, ptr); |
1947 | if (mode) { | |
1948 | drm_mode_probed_add(connector, mode); | |
1949 | num_modes++; | |
1950 | } | |
1951 | } | |
1952 | return num_modes; | |
1953 | } | |
1954 | EXPORT_SYMBOL(drm_add_modes_noedid); |