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drm/edid: Unify detailed block parsing between base and extension blocks
[deliverable/linux.git] / drivers / gpu / drm / drm_modes.c
CommitLineData
f453ba04
DA		 1/*
2 * The list_sort function is (presumably) licensed under the GPL (see the
3 * top level "COPYING" file for details).
4 *
5 * The remainder of this file is:
6 *
7 * Copyright © 1997-2003 by The XFree86 Project, Inc.
8 * Copyright © 2007 Dave Airlie
9 * Copyright © 2007-2008 Intel Corporation
10 * Jesse Barnes <jesse.barnes@intel.com>
d782c3f9 11 * Copyright 2005-2006 Luc Verhaegen
26bbdada 12 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
f453ba04
DA		 13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
20 *
21 * The above copyright notice and this permission notice shall be included in
22 * all copies or substantial portions of the Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
27 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
28 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
29 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
30 * OTHER DEALINGS IN THE SOFTWARE.
31 *
32 * Except as contained in this notice, the name of the copyright holder(s)
33 * and author(s) shall not be used in advertising or otherwise to promote
34 * the sale, use or other dealings in this Software without prior written
35 * authorization from the copyright holder(s) and author(s).
36 */
37
38#include <linux/list.h>
39#include "drmP.h"
40#include "drm.h"
41#include "drm_crtc.h"
42
43/**
44 * drm_mode_debug_printmodeline - debug print a mode
45 * @dev: DRM device
46 * @mode: mode to print
47 *
48 * LOCKING:
49 * None.
50 *
51 * Describe @mode using DRM_DEBUG.
52 */
53void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
54{
f940f37f 55 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
8a4c47f3 56 "0x%x 0x%x\n",
f0531859 57 mode->base.id, mode->name, mode->vrefresh, mode->clock,
58 mode->hdisplay, mode->hsync_start,
59 mode->hsync_end, mode->htotal,
60 mode->vdisplay, mode->vsync_start,
61 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
f453ba04
DA		 62}
63EXPORT_SYMBOL(drm_mode_debug_printmodeline);
64
d782c3f9
ZY		 65/**
66 * drm_cvt_mode -create a modeline based on CVT algorithm
67 * @dev: DRM device
68 * @hdisplay: hdisplay size
69 * @vdisplay: vdisplay size
70 * @vrefresh : vrefresh rate
71 * @reduced : Whether the GTF calculation is simplified
72 * @interlaced:Whether the interlace is supported
73 *
74 * LOCKING:
75 * none.
76 *
77 * return the modeline based on CVT algorithm
78 *
79 * This function is called to generate the modeline based on CVT algorithm
80 * according to the hdisplay, vdisplay, vrefresh.
81 * It is based from the VESA(TM) Coordinated Video Timing Generator by
82 * Graham Loveridge April 9, 2003 available at
83 * http://www.vesa.org/public/CVT/CVTd6r1.xls
84 *
85 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
86 * What I have done is to translate it by using integer calculation.
87 */
88#define HV_FACTOR 1000
89struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
90 int vdisplay, int vrefresh,
d50ba256 91 bool reduced, bool interlaced, bool margins)
d782c3f9
ZY		 92{
93 /* 1) top/bottom margin size (% of height) - default: 1.8, */
94#define CVT_MARGIN_PERCENTAGE 18
95 /* 2) character cell horizontal granularity (pixels) - default 8 */
96#define CVT_H_GRANULARITY 8
97 /* 3) Minimum vertical porch (lines) - default 3 */
98#define CVT_MIN_V_PORCH 3
99 /* 4) Minimum number of vertical back porch lines - default 6 */
100#define CVT_MIN_V_BPORCH 6
101 /* Pixel Clock step (kHz) */
102#define CVT_CLOCK_STEP 250
103 struct drm_display_mode *drm_mode;
d782c3f9
ZY		 104 unsigned int vfieldrate, hperiod;
105 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
106 int interlace;
107
108 /* allocate the drm_display_mode structure. If failure, we will
109 * return directly
110 */
111 drm_mode = drm_mode_create(dev);
112 if (!drm_mode)
113 return NULL;
114
115 /* the CVT default refresh rate is 60Hz */
116 if (!vrefresh)
117 vrefresh = 60;
118
119 /* the required field fresh rate */
120 if (interlaced)
121 vfieldrate = vrefresh * 2;
122 else
123 vfieldrate = vrefresh;
124
125 /* horizontal pixels */
126 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
127
128 /* determine the left&right borders */
129 hmargin = 0;
130 if (margins) {
131 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
132 hmargin -= hmargin % CVT_H_GRANULARITY;
133 }
134 /* find the total active pixels */
135 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
136
137 /* find the number of lines per field */
138 if (interlaced)
139 vdisplay_rnd = vdisplay / 2;
140 else
141 vdisplay_rnd = vdisplay;
142
143 /* find the top & bottom borders */
144 vmargin = 0;
145 if (margins)
146 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
147
841b4117 148 drm_mode->vdisplay = vdisplay + 2 * vmargin;
d782c3f9
ZY		 149
150 /* Interlaced */
151 if (interlaced)
152 interlace = 1;
153 else
154 interlace = 0;
155
156 /* Determine VSync Width from aspect ratio */
157 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
158 vsync = 4;
159 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
160 vsync = 5;
161 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
162 vsync = 6;
163 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
164 vsync = 7;
165 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
166 vsync = 7;
167 else /* custom */
168 vsync = 10;
169
170 if (!reduced) {
171 /* simplify the GTF calculation */
172 /* 4) Minimum time of vertical sync + back porch interval (µs)
173 * default 550.0
174 */
175 int tmp1, tmp2;
176#define CVT_MIN_VSYNC_BP 550
177 /* 3) Nominal HSync width (% of line period) - default 8 */
178#define CVT_HSYNC_PERCENTAGE 8
179 unsigned int hblank_percentage;
180 int vsyncandback_porch, vback_porch, hblank;
181
182 /* estimated the horizontal period */
183 tmp1 = HV_FACTOR * 1000000 -
184 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
185 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
186 interlace;
187 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
188
189 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
190 /* 9. Find number of lines in sync + backporch */
191 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
192 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
193 else
194 vsyncandback_porch = tmp1;
195 /* 10. Find number of lines in back porch */
196 vback_porch = vsyncandback_porch - vsync;
197 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
198 vsyncandback_porch + CVT_MIN_V_PORCH;
199 /* 5) Definition of Horizontal blanking time limitation */
200 /* Gradient (%/kHz) - default 600 */
201#define CVT_M_FACTOR 600
202 /* Offset (%) - default 40 */
203#define CVT_C_FACTOR 40
204 /* Blanking time scaling factor - default 128 */
205#define CVT_K_FACTOR 128
206 /* Scaling factor weighting - default 20 */
207#define CVT_J_FACTOR 20
208#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
209#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
210 CVT_J_FACTOR)
211 /* 12. Find ideal blanking duty cycle from formula */
212 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
213 hperiod / 1000;
214 /* 13. Blanking time */
215 if (hblank_percentage < 20 * HV_FACTOR)
216 hblank_percentage = 20 * HV_FACTOR;
217 hblank = drm_mode->hdisplay * hblank_percentage /
218 (100 * HV_FACTOR - hblank_percentage);
219 hblank -= hblank % (2 * CVT_H_GRANULARITY);
220 /* 14. find the total pixes per line */
221 drm_mode->htotal = drm_mode->hdisplay + hblank;
222 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
223 drm_mode->hsync_start = drm_mode->hsync_end -
224 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
225 drm_mode->hsync_start += CVT_H_GRANULARITY -
226 drm_mode->hsync_start % CVT_H_GRANULARITY;
227 /* fill the Vsync values */
228 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
229 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
230 } else {
231 /* Reduced blanking */
232 /* Minimum vertical blanking interval time (µs)- default 460 */
233#define CVT_RB_MIN_VBLANK 460
234 /* Fixed number of clocks for horizontal sync */
235#define CVT_RB_H_SYNC 32
236 /* Fixed number of clocks for horizontal blanking */
237#define CVT_RB_H_BLANK 160
238 /* Fixed number of lines for vertical front porch - default 3*/
239#define CVT_RB_VFPORCH 3
240 int vbilines;
241 int tmp1, tmp2;
242 /* 8. Estimate Horizontal period. */
243 tmp1 = HV_FACTOR * 1000000 -
244 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
245 tmp2 = vdisplay_rnd + 2 * vmargin;
246 hperiod = tmp1 / (tmp2 * vfieldrate);
247 /* 9. Find number of lines in vertical blanking */
248 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
249 /* 10. Check if vertical blanking is sufficient */
250 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
251 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
252 /* 11. Find total number of lines in vertical field */
253 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
254 /* 12. Find total number of pixels in a line */
255 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
256 /* Fill in HSync values */
257 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
258 drm_mode->hsync_start = drm_mode->hsync_end = CVT_RB_H_SYNC;
259 }
260 /* 15/13. Find pixel clock frequency (kHz for xf86) */
261 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
262 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
263 /* 18/16. Find actual vertical frame frequency */
264 /* ignore - just set the mode flag for interlaced */
265 if (interlaced)
266 drm_mode->vtotal *= 2;
267 /* Fill the mode line name */
268 drm_mode_set_name(drm_mode);
269 if (reduced)
270 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
271 DRM_MODE_FLAG_NVSYNC);
272 else
273 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
274 DRM_MODE_FLAG_NHSYNC);
275 if (interlaced)
276 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
277
278 return drm_mode;
279}
280EXPORT_SYMBOL(drm_cvt_mode);
281
26bbdada
ZY		 282/**
283 * drm_gtf_mode - create the modeline based on GTF algorithm
284 *
285 * @dev :drm device
286 * @hdisplay :hdisplay size
287 * @vdisplay :vdisplay size
288 * @vrefresh :vrefresh rate.
289 * @interlaced :whether the interlace is supported
290 * @margins :whether the margin is supported
291 *
292 * LOCKING.
293 * none.
294 *
295 * return the modeline based on GTF algorithm
296 *
297 * This function is to create the modeline based on the GTF algorithm.
298 * Generalized Timing Formula is derived from:
299 * GTF Spreadsheet by Andy Morrish (1/5/97)
300 * available at http://www.vesa.org
301 *
302 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
303 * What I have done is to translate it by using integer calculation.
304 * I also refer to the function of fb_get_mode in the file of
305 * drivers/video/fbmon.c
306 */
307struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, int hdisplay,
308 int vdisplay, int vrefresh,
309 bool interlaced, int margins)
310{
311 /* 1) top/bottom margin size (% of height) - default: 1.8, */
312#define GTF_MARGIN_PERCENTAGE 18
313 /* 2) character cell horizontal granularity (pixels) - default 8 */
314#define GTF_CELL_GRAN 8
315 /* 3) Minimum vertical porch (lines) - default 3 */
316#define GTF_MIN_V_PORCH 1
317 /* width of vsync in lines */
318#define V_SYNC_RQD 3
319 /* width of hsync as % of total line */
320#define H_SYNC_PERCENT 8
321 /* min time of vsync + back porch (microsec) */
322#define MIN_VSYNC_PLUS_BP 550
323 /* blanking formula gradient */
324#define GTF_M 600
325 /* blanking formula offset */
326#define GTF_C 40
327 /* blanking formula scaling factor */
328#define GTF_K 128
329 /* blanking formula scaling factor */
330#define GTF_J 20
331 /* C' and M' are part of the Blanking Duty Cycle computation */
332#define GTF_C_PRIME (((GTF_C - GTF_J) * GTF_K / 256) + GTF_J)
333#define GTF_M_PRIME (GTF_K * GTF_M / 256)
334 struct drm_display_mode *drm_mode;
335 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
336 int top_margin, bottom_margin;
337 int interlace;
338 unsigned int hfreq_est;
339 int vsync_plus_bp, vback_porch;
340 unsigned int vtotal_lines, vfieldrate_est, hperiod;
341 unsigned int vfield_rate, vframe_rate;
342 int left_margin, right_margin;
343 unsigned int total_active_pixels, ideal_duty_cycle;
344 unsigned int hblank, total_pixels, pixel_freq;
345 int hsync, hfront_porch, vodd_front_porch_lines;
346 unsigned int tmp1, tmp2;
347
348 drm_mode = drm_mode_create(dev);
349 if (!drm_mode)
350 return NULL;
351
352 /* 1. In order to give correct results, the number of horizontal
353 * pixels requested is first processed to ensure that it is divisible
354 * by the character size, by rounding it to the nearest character
355 * cell boundary:
356 */
357 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
358 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
359
360 /* 2. If interlace is requested, the number of vertical lines assumed
361 * by the calculation must be halved, as the computation calculates
362 * the number of vertical lines per field.
363 */
364 if (interlaced)
365 vdisplay_rnd = vdisplay / 2;
366 else
367 vdisplay_rnd = vdisplay;
368
369 /* 3. Find the frame rate required: */
370 if (interlaced)
371 vfieldrate_rqd = vrefresh * 2;
372 else
373 vfieldrate_rqd = vrefresh;
374
375 /* 4. Find number of lines in Top margin: */
376 top_margin = 0;
377 if (margins)
378 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
379 1000;
380 /* 5. Find number of lines in bottom margin: */
381 bottom_margin = top_margin;
382
383 /* 6. If interlace is required, then set variable interlace: */
384 if (interlaced)
385 interlace = 1;
386 else
387 interlace = 0;
388
389 /* 7. Estimate the Horizontal frequency */
390 {
391 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
392 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
393 2 + interlace;
394 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
395 }
396
397 /* 8. Find the number of lines in V sync + back porch */
398 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
399 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
400 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
401 /* 9. Find the number of lines in V back porch alone: */
402 vback_porch = vsync_plus_bp - V_SYNC_RQD;
403 /* 10. Find the total number of lines in Vertical field period: */
404 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
405 vsync_plus_bp + GTF_MIN_V_PORCH;
406 /* 11. Estimate the Vertical field frequency: */
407 vfieldrate_est = hfreq_est / vtotal_lines;
408 /* 12. Find the actual horizontal period: */
409 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
410
411 /* 13. Find the actual Vertical field frequency: */
412 vfield_rate = hfreq_est / vtotal_lines;
413 /* 14. Find the Vertical frame frequency: */
414 if (interlaced)
415 vframe_rate = vfield_rate / 2;
416 else
417 vframe_rate = vfield_rate;
418 /* 15. Find number of pixels in left margin: */
419 if (margins)
420 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
421 1000;
422 else
423 left_margin = 0;
424
425 /* 16.Find number of pixels in right margin: */
426 right_margin = left_margin;
427 /* 17.Find total number of active pixels in image and left and right */
428 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
429 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
430 ideal_duty_cycle = GTF_C_PRIME * 1000 -
431 (GTF_M_PRIME * 1000000 / hfreq_est);
432 /* 19.Find the number of pixels in the blanking time to the nearest
433 * double character cell: */
434 hblank = total_active_pixels * ideal_duty_cycle /
435 (100000 - ideal_duty_cycle);
436 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
437 hblank = hblank * 2 * GTF_CELL_GRAN;
438 /* 20.Find total number of pixels: */
439 total_pixels = total_active_pixels + hblank;
440 /* 21.Find pixel clock frequency: */
441 pixel_freq = total_pixels * hfreq_est / 1000;
442 /* Stage 1 computations are now complete; I should really pass
443 * the results to another function and do the Stage 2 computations,
444 * but I only need a few more values so I'll just append the
445 * computations here for now */
446 /* 17. Find the number of pixels in the horizontal sync period: */
447 hsync = H_SYNC_PERCENT * total_pixels / 100;
448 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
449 hsync = hsync * GTF_CELL_GRAN;
450 /* 18. Find the number of pixels in horizontal front porch period */
451 hfront_porch = hblank / 2 - hsync;
452 /* 36. Find the number of lines in the odd front porch period: */
453 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
454
455 /* finally, pack the results in the mode struct */
456 drm_mode->hdisplay = hdisplay_rnd;
457 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
458 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
459 drm_mode->htotal = total_pixels;
460 drm_mode->vdisplay = vdisplay_rnd;
461 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
462 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
463 drm_mode->vtotal = vtotal_lines;
464
465 drm_mode->clock = pixel_freq;
466
467 drm_mode_set_name(drm_mode);
468 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
469
470 if (interlaced) {
471 drm_mode->vtotal *= 2;
472 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
473 }
474
475 return drm_mode;
476}
477EXPORT_SYMBOL(drm_gtf_mode);
f453ba04
DA		 478/**
479 * drm_mode_set_name - set the name on a mode
480 * @mode: name will be set in this mode
481 *
482 * LOCKING:
483 * None.
484 *
485 * Set the name of @mode to a standard format.
486 */
487void drm_mode_set_name(struct drm_display_mode *mode)
488{
489 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d", mode->hdisplay,
490 mode->vdisplay);
491}
492EXPORT_SYMBOL(drm_mode_set_name);
493
494/**
495 * drm_mode_list_concat - move modes from one list to another
496 * @head: source list
497 * @new: dst list
498 *
499 * LOCKING:
500 * Caller must ensure both lists are locked.
501 *
502 * Move all the modes from @head to @new.
503 */
504void drm_mode_list_concat(struct list_head *head, struct list_head *new)
505{
506
507 struct list_head *entry, *tmp;
508
509 list_for_each_safe(entry, tmp, head) {
510 list_move_tail(entry, new);
511 }
512}
513EXPORT_SYMBOL(drm_mode_list_concat);
514
515/**
516 * drm_mode_width - get the width of a mode
517 * @mode: mode
518 *
519 * LOCKING:
520 * None.
521 *
522 * Return @mode's width (hdisplay) value.
523 *
524 * FIXME: is this needed?
525 *
526 * RETURNS:
527 * @mode->hdisplay
528 */
529int drm_mode_width(struct drm_display_mode *mode)
530{
531 return mode->hdisplay;
532
533}
534EXPORT_SYMBOL(drm_mode_width);
535
536/**
537 * drm_mode_height - get the height of a mode
538 * @mode: mode
539 *
540 * LOCKING:
541 * None.
542 *
543 * Return @mode's height (vdisplay) value.
544 *
545 * FIXME: is this needed?
546 *
547 * RETURNS:
548 * @mode->vdisplay
549 */
550int drm_mode_height(struct drm_display_mode *mode)
551{
552 return mode->vdisplay;
553}
554EXPORT_SYMBOL(drm_mode_height);
555
556/**
557 * drm_mode_vrefresh - get the vrefresh of a mode
558 * @mode: mode
559 *
560 * LOCKING:
561 * None.
562 *
563 * Return @mode's vrefresh rate or calculate it if necessary.
564 *
565 * FIXME: why is this needed? shouldn't vrefresh be set already?
566 *
567 * RETURNS:
559ee21d
ZY		 568 * Vertical refresh rate. It will be the result of actual value plus 0.5.
569 * If it is 70.288, it will return 70Hz.
570 * If it is 59.6, it will return 60Hz.
f453ba04
DA		 571 */
572int drm_mode_vrefresh(struct drm_display_mode *mode)
573{
574 int refresh = 0;
575 unsigned int calc_val;
576
577 if (mode->vrefresh > 0)
578 refresh = mode->vrefresh;
579 else if (mode->htotal > 0 && mode->vtotal > 0) {
559ee21d
ZY		 580 int vtotal;
581 vtotal = mode->vtotal;
f453ba04
DA		 582 /* work out vrefresh the value will be x1000 */
583 calc_val = (mode->clock * 1000);
f453ba04 584 calc_val /= mode->htotal;
559ee21d 585 refresh = (calc_val + vtotal / 2) / vtotal;
f453ba04 586
f453ba04
DA		 587 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
588 refresh *= 2;
589 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
590 refresh /= 2;
591 if (mode->vscan > 1)
592 refresh /= mode->vscan;
593 }
594 return refresh;
595}
596EXPORT_SYMBOL(drm_mode_vrefresh);
597
598/**
599 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
600 * @p: mode
601 * @adjust_flags: unused? (FIXME)
602 *
603 * LOCKING:
604 * None.
605 *
606 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
607 */
608void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
609{
610 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
611 return;
612
613 p->crtc_hdisplay = p->hdisplay;
614 p->crtc_hsync_start = p->hsync_start;
615 p->crtc_hsync_end = p->hsync_end;
616 p->crtc_htotal = p->htotal;
617 p->crtc_hskew = p->hskew;
618 p->crtc_vdisplay = p->vdisplay;
619 p->crtc_vsync_start = p->vsync_start;
620 p->crtc_vsync_end = p->vsync_end;
621 p->crtc_vtotal = p->vtotal;
622
623 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
624 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
625 p->crtc_vdisplay /= 2;
626 p->crtc_vsync_start /= 2;
627 p->crtc_vsync_end /= 2;
628 p->crtc_vtotal /= 2;
629 }
630
631 p->crtc_vtotal |= 1;
632 }
633
634 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
635 p->crtc_vdisplay *= 2;
636 p->crtc_vsync_start *= 2;
637 p->crtc_vsync_end *= 2;
638 p->crtc_vtotal *= 2;
639 }
640
641 if (p->vscan > 1) {
642 p->crtc_vdisplay *= p->vscan;
643 p->crtc_vsync_start *= p->vscan;
644 p->crtc_vsync_end *= p->vscan;
645 p->crtc_vtotal *= p->vscan;
646 }
647
648 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
649 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
650 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
651 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
652
653 p->crtc_hadjusted = false;
654 p->crtc_vadjusted = false;
655}
656EXPORT_SYMBOL(drm_mode_set_crtcinfo);
657
658
659/**
660 * drm_mode_duplicate - allocate and duplicate an existing mode
661 * @m: mode to duplicate
662 *
663 * LOCKING:
664 * None.
665 *
666 * Just allocate a new mode, copy the existing mode into it, and return
667 * a pointer to it. Used to create new instances of established modes.
668 */
669struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
670 struct drm_display_mode *mode)
671{
672 struct drm_display_mode *nmode;
673 int new_id;
674
675 nmode = drm_mode_create(dev);
676 if (!nmode)
677 return NULL;
678
679 new_id = nmode->base.id;
680 *nmode = *mode;
681 nmode->base.id = new_id;
682 INIT_LIST_HEAD(&nmode->head);
683 return nmode;
684}
685EXPORT_SYMBOL(drm_mode_duplicate);
686
687/**
688 * drm_mode_equal - test modes for equality
689 * @mode1: first mode
690 * @mode2: second mode
691 *
692 * LOCKING:
693 * None.
694 *
695 * Check to see if @mode1 and @mode2 are equivalent.
696 *
697 * RETURNS:
698 * True if the modes are equal, false otherwise.
699 */
700bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
701{
702 /* do clock check convert to PICOS so fb modes get matched
703 * the same */
704 if (mode1->clock && mode2->clock) {
705 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
706 return false;
707 } else if (mode1->clock != mode2->clock)
708 return false;
709
710 if (mode1->hdisplay == mode2->hdisplay &&
711 mode1->hsync_start == mode2->hsync_start &&
712 mode1->hsync_end == mode2->hsync_end &&
713 mode1->htotal == mode2->htotal &&
714 mode1->hskew == mode2->hskew &&
715 mode1->vdisplay == mode2->vdisplay &&
716 mode1->vsync_start == mode2->vsync_start &&
717 mode1->vsync_end == mode2->vsync_end &&
718 mode1->vtotal == mode2->vtotal &&
719 mode1->vscan == mode2->vscan &&
720 mode1->flags == mode2->flags)
721 return true;
722
723 return false;
724}
725EXPORT_SYMBOL(drm_mode_equal);
726
727/**
728 * drm_mode_validate_size - make sure modes adhere to size constraints
729 * @dev: DRM device
730 * @mode_list: list of modes to check
731 * @maxX: maximum width
732 * @maxY: maximum height
733 * @maxPitch: max pitch
734 *
735 * LOCKING:
736 * Caller must hold a lock protecting @mode_list.
737 *
738 * The DRM device (@dev) has size and pitch limits. Here we validate the
739 * modes we probed for @dev against those limits and set their status as
740 * necessary.
741 */
742void drm_mode_validate_size(struct drm_device *dev,
743 struct list_head *mode_list,
744 int maxX, int maxY, int maxPitch)
745{
746 struct drm_display_mode *mode;
747
748 list_for_each_entry(mode, mode_list, head) {
749 if (maxPitch > 0 && mode->hdisplay > maxPitch)
750 mode->status = MODE_BAD_WIDTH;
751
752 if (maxX > 0 && mode->hdisplay > maxX)
753 mode->status = MODE_VIRTUAL_X;
754
755 if (maxY > 0 && mode->vdisplay > maxY)
756 mode->status = MODE_VIRTUAL_Y;
757 }
758}
759EXPORT_SYMBOL(drm_mode_validate_size);
760
761/**
762 * drm_mode_validate_clocks - validate modes against clock limits
763 * @dev: DRM device
764 * @mode_list: list of modes to check
765 * @min: minimum clock rate array
766 * @max: maximum clock rate array
767 * @n_ranges: number of clock ranges (size of arrays)
768 *
769 * LOCKING:
770 * Caller must hold a lock protecting @mode_list.
771 *
772 * Some code may need to check a mode list against the clock limits of the
773 * device in question. This function walks the mode list, testing to make
774 * sure each mode falls within a given range (defined by @min and @max
775 * arrays) and sets @mode->status as needed.
776 */
777void drm_mode_validate_clocks(struct drm_device *dev,
778 struct list_head *mode_list,
779 int *min, int *max, int n_ranges)
780{
781 struct drm_display_mode *mode;
782 int i;
783
784 list_for_each_entry(mode, mode_list, head) {
785 bool good = false;
786 for (i = 0; i < n_ranges; i++) {
787 if (mode->clock >= min[i] && mode->clock <= max[i]) {
788 good = true;
789 break;
790 }
791 }
792 if (!good)
793 mode->status = MODE_CLOCK_RANGE;
794 }
795}
796EXPORT_SYMBOL(drm_mode_validate_clocks);
797
798/**
799 * drm_mode_prune_invalid - remove invalid modes from mode list
800 * @dev: DRM device
801 * @mode_list: list of modes to check
802 * @verbose: be verbose about it
803 *
804 * LOCKING:
805 * Caller must hold a lock protecting @mode_list.
806 *
807 * Once mode list generation is complete, a caller can use this routine to
808 * remove invalid modes from a mode list. If any of the modes have a
809 * status other than %MODE_OK, they are removed from @mode_list and freed.
810 */
811void drm_mode_prune_invalid(struct drm_device *dev,
812 struct list_head *mode_list, bool verbose)
813{
814 struct drm_display_mode *mode, *t;
815
816 list_for_each_entry_safe(mode, t, mode_list, head) {
817 if (mode->status != MODE_OK) {
818 list_del(&mode->head);
819 if (verbose) {
820 drm_mode_debug_printmodeline(mode);
f940f37f 821 DRM_DEBUG_KMS("Not using %s mode %d\n",
f0531859 822 mode->name, mode->status);
f453ba04
DA		 823 }
824 drm_mode_destroy(dev, mode);
825 }
826 }
827}
828EXPORT_SYMBOL(drm_mode_prune_invalid);
829
830/**
831 * drm_mode_compare - compare modes for favorability
832 * @lh_a: list_head for first mode
833 * @lh_b: list_head for second mode
834 *
835 * LOCKING:
836 * None.
837 *
838 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
839 * which is better.
840 *
841 * RETURNS:
842 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
843 * positive if @lh_b is better than @lh_a.
844 */
845static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b)
846{
847 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
848 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
849 int diff;
850
851 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
852 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
853 if (diff)
854 return diff;
855 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
856 if (diff)
857 return diff;
858 diff = b->clock - a->clock;
859 return diff;
860}
861
862/* FIXME: what we don't have a list sort function? */
863/* list sort from Mark J Roberts (mjr@znex.org) */
864void list_sort(struct list_head *head,
865 int (*cmp)(struct list_head *a, struct list_head *b))
866{
867 struct list_head *p, *q, *e, *list, *tail, *oldhead;
868 int insize, nmerges, psize, qsize, i;
869
870 list = head->next;
871 list_del(head);
872 insize = 1;
873 for (;;) {
874 p = oldhead = list;
875 list = tail = NULL;
876 nmerges = 0;
877
878 while (p) {
879 nmerges++;
880 q = p;
881 psize = 0;
882 for (i = 0; i < insize; i++) {
883 psize++;
884 q = q->next == oldhead ? NULL : q->next;
885 if (!q)
886 break;
887 }
888
889 qsize = insize;
890 while (psize > 0 || (qsize > 0 && q)) {
891 if (!psize) {
892 e = q;
893 q = q->next;
894 qsize--;
895 if (q == oldhead)
896 q = NULL;
897 } else if (!qsize || !q) {
898 e = p;
899 p = p->next;
900 psize--;
901 if (p == oldhead)
902 p = NULL;
903 } else if (cmp(p, q) <= 0) {
904 e = p;
905 p = p->next;
906 psize--;
907 if (p == oldhead)
908 p = NULL;
909 } else {
910 e = q;
911 q = q->next;
912 qsize--;
913 if (q == oldhead)
914 q = NULL;
915 }
916 if (tail)
917 tail->next = e;
918 else
919 list = e;
920 e->prev = tail;
921 tail = e;
922 }
923 p = q;
924 }
925
926 tail->next = list;
927 list->prev = tail;
928
929 if (nmerges <= 1)
930 break;
931
932 insize *= 2;
933 }
934
935 head->next = list;
936 head->prev = list->prev;
937 list->prev->next = head;
938 list->prev = head;
939}
940
941/**
942 * drm_mode_sort - sort mode list
943 * @mode_list: list to sort
944 *
945 * LOCKING:
946 * Caller must hold a lock protecting @mode_list.
947 *
948 * Sort @mode_list by favorability, putting good modes first.
949 */
950void drm_mode_sort(struct list_head *mode_list)
951{
952 list_sort(mode_list, drm_mode_compare);
953}
954EXPORT_SYMBOL(drm_mode_sort);
955
956/**
957 * drm_mode_connector_list_update - update the mode list for the connector
958 * @connector: the connector to update
959 *
960 * LOCKING:
961 * Caller must hold a lock protecting @mode_list.
962 *
963 * This moves the modes from the @connector probed_modes list
964 * to the actual mode list. It compares the probed mode against the current
965 * list and only adds different modes. All modes unverified after this point
966 * will be removed by the prune invalid modes.
967 */
968void drm_mode_connector_list_update(struct drm_connector *connector)
969{
970 struct drm_display_mode *mode;
971 struct drm_display_mode *pmode, *pt;
972 int found_it;
973
974 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
975 head) {
976 found_it = 0;
977 /* go through current modes checking for the new probed mode */
978 list_for_each_entry(mode, &connector->modes, head) {
979 if (drm_mode_equal(pmode, mode)) {
980 found_it = 1;
981 /* if equal delete the probed mode */
982 mode->status = pmode->status;
38d5487d
KP		 983 /* Merge type bits together */
984 mode->type |= pmode->type;
f453ba04
DA		 985 list_del(&pmode->head);
986 drm_mode_destroy(connector->dev, pmode);
987 break;
988 }
989 }
990
991 if (!found_it) {
992 list_move_tail(&pmode->head, &connector->modes);
993 }
994 }
995}
996EXPORT_SYMBOL(drm_mode_connector_list_update);
Linux kernel - Deliverables
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