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drm: Introduce a crtc_clock for struct drm_display_mode
[deliverable/linux.git] / drivers / gpu / drm / drm_modes.c
CommitLineData
f453ba04 1/*
f453ba04
DA		 2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
d782c3f9 6 * Copyright 2005-2006 Luc Verhaegen
26bbdada 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
f453ba04
DA		 8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33#include <linux/list.h>
2c761270 34#include <linux/list_sort.h>
2d1a8a48 35#include <linux/export.h>
760285e7
DH		 36#include <drm/drmP.h>
37#include <drm/drm_crtc.h>
edb37a95 38#include <video/of_videomode.h>
ebc64e45 39#include <video/videomode.h>
f453ba04
DA		 40
41/**
42 * drm_mode_debug_printmodeline - debug print a mode
43 * @dev: DRM device
44 * @mode: mode to print
45 *
46 * LOCKING:
47 * None.
48 *
49 * Describe @mode using DRM_DEBUG.
50 */
0b3904ab 51void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
f453ba04 52{
f940f37f 53 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
8a4c47f3 54 "0x%x 0x%x\n",
f0531859 55 mode->base.id, mode->name, mode->vrefresh, mode->clock,
56 mode->hdisplay, mode->hsync_start,
57 mode->hsync_end, mode->htotal,
58 mode->vdisplay, mode->vsync_start,
59 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
f453ba04
DA		 60}
61EXPORT_SYMBOL(drm_mode_debug_printmodeline);
62
d782c3f9
ZY		 63/**
64 * drm_cvt_mode -create a modeline based on CVT algorithm
65 * @dev: DRM device
66 * @hdisplay: hdisplay size
67 * @vdisplay: vdisplay size
68 * @vrefresh : vrefresh rate
69 * @reduced : Whether the GTF calculation is simplified
70 * @interlaced:Whether the interlace is supported
71 *
72 * LOCKING:
73 * none.
74 *
75 * return the modeline based on CVT algorithm
76 *
77 * This function is called to generate the modeline based on CVT algorithm
78 * according to the hdisplay, vdisplay, vrefresh.
79 * It is based from the VESA(TM) Coordinated Video Timing Generator by
80 * Graham Loveridge April 9, 2003 available at
631dd1a8 81 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
d782c3f9
ZY		 82 *
83 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
84 * What I have done is to translate it by using integer calculation.
85 */
86#define HV_FACTOR 1000
87struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
88 int vdisplay, int vrefresh,
d50ba256 89 bool reduced, bool interlaced, bool margins)
d782c3f9
ZY		 90{
91 /* 1) top/bottom margin size (% of height) - default: 1.8, */
92#define CVT_MARGIN_PERCENTAGE 18
93 /* 2) character cell horizontal granularity (pixels) - default 8 */
94#define CVT_H_GRANULARITY 8
95 /* 3) Minimum vertical porch (lines) - default 3 */
96#define CVT_MIN_V_PORCH 3
97 /* 4) Minimum number of vertical back porch lines - default 6 */
98#define CVT_MIN_V_BPORCH 6
99 /* Pixel Clock step (kHz) */
100#define CVT_CLOCK_STEP 250
101 struct drm_display_mode *drm_mode;
d782c3f9
ZY		 102 unsigned int vfieldrate, hperiod;
103 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
104 int interlace;
105
106 /* allocate the drm_display_mode structure. If failure, we will
107 * return directly
108 */
109 drm_mode = drm_mode_create(dev);
110 if (!drm_mode)
111 return NULL;
112
113 /* the CVT default refresh rate is 60Hz */
114 if (!vrefresh)
115 vrefresh = 60;
116
117 /* the required field fresh rate */
118 if (interlaced)
119 vfieldrate = vrefresh * 2;
120 else
121 vfieldrate = vrefresh;
122
123 /* horizontal pixels */
124 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
125
126 /* determine the left&right borders */
127 hmargin = 0;
128 if (margins) {
129 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
130 hmargin -= hmargin % CVT_H_GRANULARITY;
131 }
132 /* find the total active pixels */
133 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
134
135 /* find the number of lines per field */
136 if (interlaced)
137 vdisplay_rnd = vdisplay / 2;
138 else
139 vdisplay_rnd = vdisplay;
140
141 /* find the top & bottom borders */
142 vmargin = 0;
143 if (margins)
144 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
145
841b4117 146 drm_mode->vdisplay = vdisplay + 2 * vmargin;
d782c3f9
ZY		 147
148 /* Interlaced */
149 if (interlaced)
150 interlace = 1;
151 else
152 interlace = 0;
153
154 /* Determine VSync Width from aspect ratio */
155 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
156 vsync = 4;
157 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
158 vsync = 5;
159 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
160 vsync = 6;
161 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
162 vsync = 7;
163 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
164 vsync = 7;
165 else /* custom */
166 vsync = 10;
167
168 if (!reduced) {
169 /* simplify the GTF calculation */
170 /* 4) Minimum time of vertical sync + back porch interval (µs)
171 * default 550.0
172 */
173 int tmp1, tmp2;
174#define CVT_MIN_VSYNC_BP 550
175 /* 3) Nominal HSync width (% of line period) - default 8 */
176#define CVT_HSYNC_PERCENTAGE 8
177 unsigned int hblank_percentage;
178 int vsyncandback_porch, vback_porch, hblank;
179
180 /* estimated the horizontal period */
181 tmp1 = HV_FACTOR * 1000000 -
182 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
183 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
184 interlace;
185 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
186
187 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
188 /* 9. Find number of lines in sync + backporch */
189 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
190 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
191 else
192 vsyncandback_porch = tmp1;
193 /* 10. Find number of lines in back porch */
194 vback_porch = vsyncandback_porch - vsync;
195 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
196 vsyncandback_porch + CVT_MIN_V_PORCH;
197 /* 5) Definition of Horizontal blanking time limitation */
198 /* Gradient (%/kHz) - default 600 */
199#define CVT_M_FACTOR 600
200 /* Offset (%) - default 40 */
201#define CVT_C_FACTOR 40
202 /* Blanking time scaling factor - default 128 */
203#define CVT_K_FACTOR 128
204 /* Scaling factor weighting - default 20 */
205#define CVT_J_FACTOR 20
206#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
207#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
208 CVT_J_FACTOR)
209 /* 12. Find ideal blanking duty cycle from formula */
210 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
211 hperiod / 1000;
212 /* 13. Blanking time */
213 if (hblank_percentage < 20 * HV_FACTOR)
214 hblank_percentage = 20 * HV_FACTOR;
215 hblank = drm_mode->hdisplay * hblank_percentage /
216 (100 * HV_FACTOR - hblank_percentage);
217 hblank -= hblank % (2 * CVT_H_GRANULARITY);
218 /* 14. find the total pixes per line */
219 drm_mode->htotal = drm_mode->hdisplay + hblank;
220 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
221 drm_mode->hsync_start = drm_mode->hsync_end -
222 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
223 drm_mode->hsync_start += CVT_H_GRANULARITY -
224 drm_mode->hsync_start % CVT_H_GRANULARITY;
225 /* fill the Vsync values */
226 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
227 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
228 } else {
229 /* Reduced blanking */
230 /* Minimum vertical blanking interval time (µs)- default 460 */
231#define CVT_RB_MIN_VBLANK 460
232 /* Fixed number of clocks for horizontal sync */
233#define CVT_RB_H_SYNC 32
234 /* Fixed number of clocks for horizontal blanking */
235#define CVT_RB_H_BLANK 160
236 /* Fixed number of lines for vertical front porch - default 3*/
237#define CVT_RB_VFPORCH 3
238 int vbilines;
239 int tmp1, tmp2;
240 /* 8. Estimate Horizontal period. */
241 tmp1 = HV_FACTOR * 1000000 -
242 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
243 tmp2 = vdisplay_rnd + 2 * vmargin;
244 hperiod = tmp1 / (tmp2 * vfieldrate);
245 /* 9. Find number of lines in vertical blanking */
246 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
247 /* 10. Check if vertical blanking is sufficient */
248 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
249 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
250 /* 11. Find total number of lines in vertical field */
251 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
252 /* 12. Find total number of pixels in a line */
253 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
254 /* Fill in HSync values */
255 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
adde0f23
AJ		 256 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
257 /* Fill in VSync values */
258 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
259 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
d782c3f9
ZY		 260 }
261 /* 15/13. Find pixel clock frequency (kHz for xf86) */
262 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
263 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
264 /* 18/16. Find actual vertical frame frequency */
265 /* ignore - just set the mode flag for interlaced */
171fdd89 266 if (interlaced) {
d782c3f9 267 drm_mode->vtotal *= 2;
171fdd89
AJ		 268 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
269 }
d782c3f9
ZY		 270 /* Fill the mode line name */
271 drm_mode_set_name(drm_mode);
272 if (reduced)
273 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
274 DRM_MODE_FLAG_NVSYNC);
275 else
276 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
277 DRM_MODE_FLAG_NHSYNC);
d782c3f9 278
171fdd89 279 return drm_mode;
d782c3f9
ZY		 280}
281EXPORT_SYMBOL(drm_cvt_mode);
282
26bbdada 283/**
7a374350 284 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
26bbdada
ZY		 285 *
286 * @dev :drm device
287 * @hdisplay :hdisplay size
288 * @vdisplay :vdisplay size
289 * @vrefresh :vrefresh rate.
290 * @interlaced :whether the interlace is supported
7a374350
AJ		 291 * @margins :desired margin size
292 * @GTF_[MCKJ] :extended GTF formula parameters
26bbdada
ZY		 293 *
294 * LOCKING.
295 * none.
296 *
7a374350 297 * return the modeline based on full GTF algorithm.
26bbdada 298 *
7a374350
AJ		 299 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
300 * in here multiplied by two. For a C of 40, pass in 80.
26bbdada 301 */
7a374350
AJ		 302struct drm_display_mode *
303drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
304 int vrefresh, bool interlaced, int margins,
305 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
306{ /* 1) top/bottom margin size (% of height) - default: 1.8, */
26bbdada
ZY		 307#define GTF_MARGIN_PERCENTAGE 18
308 /* 2) character cell horizontal granularity (pixels) - default 8 */
309#define GTF_CELL_GRAN 8
310 /* 3) Minimum vertical porch (lines) - default 3 */
311#define GTF_MIN_V_PORCH 1
312 /* width of vsync in lines */
313#define V_SYNC_RQD 3
314 /* width of hsync as % of total line */
315#define H_SYNC_PERCENT 8
316 /* min time of vsync + back porch (microsec) */
317#define MIN_VSYNC_PLUS_BP 550
26bbdada 318 /* C' and M' are part of the Blanking Duty Cycle computation */
7a374350
AJ		 319#define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
320#define GTF_M_PRIME (GTF_K * GTF_M / 256)
26bbdada
ZY		 321 struct drm_display_mode *drm_mode;
322 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
323 int top_margin, bottom_margin;
324 int interlace;
325 unsigned int hfreq_est;
326 int vsync_plus_bp, vback_porch;
327 unsigned int vtotal_lines, vfieldrate_est, hperiod;
328 unsigned int vfield_rate, vframe_rate;
329 int left_margin, right_margin;
330 unsigned int total_active_pixels, ideal_duty_cycle;
331 unsigned int hblank, total_pixels, pixel_freq;
332 int hsync, hfront_porch, vodd_front_porch_lines;
333 unsigned int tmp1, tmp2;
334
335 drm_mode = drm_mode_create(dev);
336 if (!drm_mode)
337 return NULL;
338
339 /* 1. In order to give correct results, the number of horizontal
340 * pixels requested is first processed to ensure that it is divisible
341 * by the character size, by rounding it to the nearest character
342 * cell boundary:
343 */
344 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
345 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
346
347 /* 2. If interlace is requested, the number of vertical lines assumed
348 * by the calculation must be halved, as the computation calculates
349 * the number of vertical lines per field.
350 */
351 if (interlaced)
352 vdisplay_rnd = vdisplay / 2;
353 else
354 vdisplay_rnd = vdisplay;
355
356 /* 3. Find the frame rate required: */
357 if (interlaced)
358 vfieldrate_rqd = vrefresh * 2;
359 else
360 vfieldrate_rqd = vrefresh;
361
362 /* 4. Find number of lines in Top margin: */
363 top_margin = 0;
364 if (margins)
365 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
366 1000;
367 /* 5. Find number of lines in bottom margin: */
368 bottom_margin = top_margin;
369
370 /* 6. If interlace is required, then set variable interlace: */
371 if (interlaced)
372 interlace = 1;
373 else
374 interlace = 0;
375
376 /* 7. Estimate the Horizontal frequency */
377 {
378 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
379 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
380 2 + interlace;
381 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
382 }
383
384 /* 8. Find the number of lines in V sync + back porch */
385 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
386 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
387 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
388 /* 9. Find the number of lines in V back porch alone: */
389 vback_porch = vsync_plus_bp - V_SYNC_RQD;
390 /* 10. Find the total number of lines in Vertical field period: */
391 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
392 vsync_plus_bp + GTF_MIN_V_PORCH;
393 /* 11. Estimate the Vertical field frequency: */
394 vfieldrate_est = hfreq_est / vtotal_lines;
395 /* 12. Find the actual horizontal period: */
396 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
397
398 /* 13. Find the actual Vertical field frequency: */
399 vfield_rate = hfreq_est / vtotal_lines;
400 /* 14. Find the Vertical frame frequency: */
401 if (interlaced)
402 vframe_rate = vfield_rate / 2;
403 else
404 vframe_rate = vfield_rate;
405 /* 15. Find number of pixels in left margin: */
406 if (margins)
407 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
408 1000;
409 else
410 left_margin = 0;
411
412 /* 16.Find number of pixels in right margin: */
413 right_margin = left_margin;
414 /* 17.Find total number of active pixels in image and left and right */
415 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
416 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
417 ideal_duty_cycle = GTF_C_PRIME * 1000 -
418 (GTF_M_PRIME * 1000000 / hfreq_est);
419 /* 19.Find the number of pixels in the blanking time to the nearest
420 * double character cell: */
421 hblank = total_active_pixels * ideal_duty_cycle /
422 (100000 - ideal_duty_cycle);
423 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
424 hblank = hblank * 2 * GTF_CELL_GRAN;
425 /* 20.Find total number of pixels: */
426 total_pixels = total_active_pixels + hblank;
427 /* 21.Find pixel clock frequency: */
428 pixel_freq = total_pixels * hfreq_est / 1000;
429 /* Stage 1 computations are now complete; I should really pass
430 * the results to another function and do the Stage 2 computations,
431 * but I only need a few more values so I'll just append the
432 * computations here for now */
433 /* 17. Find the number of pixels in the horizontal sync period: */
434 hsync = H_SYNC_PERCENT * total_pixels / 100;
435 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
436 hsync = hsync * GTF_CELL_GRAN;
437 /* 18. Find the number of pixels in horizontal front porch period */
438 hfront_porch = hblank / 2 - hsync;
439 /* 36. Find the number of lines in the odd front porch period: */
440 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
441
442 /* finally, pack the results in the mode struct */
443 drm_mode->hdisplay = hdisplay_rnd;
444 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
445 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
446 drm_mode->htotal = total_pixels;
447 drm_mode->vdisplay = vdisplay_rnd;
448 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
449 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
450 drm_mode->vtotal = vtotal_lines;
451
452 drm_mode->clock = pixel_freq;
453
26bbdada
ZY		 454 if (interlaced) {
455 drm_mode->vtotal *= 2;
456 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
457 }
458
171fdd89 459 drm_mode_set_name(drm_mode);
c385e50c
AJ		 460 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
461 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
462 else
463 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
171fdd89 464
26bbdada
ZY		 465 return drm_mode;
466}
7a374350
AJ		 467EXPORT_SYMBOL(drm_gtf_mode_complex);
468
469/**
470 * drm_gtf_mode - create the modeline based on GTF algorithm
471 *
472 * @dev :drm device
473 * @hdisplay :hdisplay size
474 * @vdisplay :vdisplay size
475 * @vrefresh :vrefresh rate.
476 * @interlaced :whether the interlace is supported
477 * @margins :whether the margin is supported
478 *
479 * LOCKING.
480 * none.
481 *
482 * return the modeline based on GTF algorithm
483 *
484 * This function is to create the modeline based on the GTF algorithm.
485 * Generalized Timing Formula is derived from:
486 * GTF Spreadsheet by Andy Morrish (1/5/97)
487 * available at http://www.vesa.org
488 *
489 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
490 * What I have done is to translate it by using integer calculation.
491 * I also refer to the function of fb_get_mode in the file of
492 * drivers/video/fbmon.c
493 *
494 * Standard GTF parameters:
495 * M = 600
496 * C = 40
497 * K = 128
498 * J = 20
499 */
500struct drm_display_mode *
501drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
502 bool lace, int margins)
503{
504 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
505 margins, 600, 40 * 2, 128, 20 * 2);
506}
26bbdada 507EXPORT_SYMBOL(drm_gtf_mode);
7a374350 508
a38884f6 509#ifdef CONFIG_VIDEOMODE_HELPERS
ebc64e45
ST		 510int drm_display_mode_from_videomode(const struct videomode *vm,
511 struct drm_display_mode *dmode)
512{
513 dmode->hdisplay = vm->hactive;
514 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
515 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
516 dmode->htotal = dmode->hsync_end + vm->hback_porch;
517
518 dmode->vdisplay = vm->vactive;
519 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
520 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
521 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
522
523 dmode->clock = vm->pixelclock / 1000;
524
525 dmode->flags = 0;
06a33079 526 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
ebc64e45 527 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
06a33079 528 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
ebc64e45 529 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
06a33079 530 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
ebc64e45 531 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
06a33079 532 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
ebc64e45 533 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
06a33079 534 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
ebc64e45 535 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
06a33079 536 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
ebc64e45 537 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
328a4719
ST		 538 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
539 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
ebc64e45
ST		 540 drm_mode_set_name(dmode);
541
542 return 0;
543}
544EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
ebc64e45 545
a38884f6 546#ifdef CONFIG_OF
edb37a95
ST		 547/**
548 * of_get_drm_display_mode - get a drm_display_mode from devicetree
549 * @np: device_node with the timing specification
550 * @dmode: will be set to the return value
551 * @index: index into the list of display timings in devicetree
552 *
553 * This function is expensive and should only be used, if only one mode is to be
554 * read from DT. To get multiple modes start with of_get_display_timings and
555 * work with that instead.
556 */
557int of_get_drm_display_mode(struct device_node *np,
558 struct drm_display_mode *dmode, int index)
559{
560 struct videomode vm;
561 int ret;
562
563 ret = of_get_videomode(np, &vm, index);
564 if (ret)
565 return ret;
566
567 drm_display_mode_from_videomode(&vm, dmode);
568
569 pr_debug("%s: got %dx%d display mode from %s\n",
570 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
571 drm_mode_debug_printmodeline(dmode);
572
573 return 0;
574}
575EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
a38884f6
TV		 576#endif /* CONFIG_OF */
577#endif /* CONFIG_VIDEOMODE_HELPERS */
edb37a95 578
f453ba04
DA		 579/**
580 * drm_mode_set_name - set the name on a mode
581 * @mode: name will be set in this mode
582 *
583 * LOCKING:
584 * None.
585 *
586 * Set the name of @mode to a standard format.
587 */
588void drm_mode_set_name(struct drm_display_mode *mode)
589{
171fdd89
AJ		 590 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
591
592 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
593 mode->hdisplay, mode->vdisplay,
594 interlaced ? "i" : "");
f453ba04
DA		 595}
596EXPORT_SYMBOL(drm_mode_set_name);
597
f453ba04
DA		 598/**
599 * drm_mode_width - get the width of a mode
600 * @mode: mode
601 *
602 * LOCKING:
603 * None.
604 *
605 * Return @mode's width (hdisplay) value.
606 *
607 * FIXME: is this needed?
608 *
609 * RETURNS:
610 * @mode->hdisplay
611 */
0b3904ab 612int drm_mode_width(const struct drm_display_mode *mode)
f453ba04
DA		 613{
614 return mode->hdisplay;
615
616}
617EXPORT_SYMBOL(drm_mode_width);
618
619/**
620 * drm_mode_height - get the height of a mode
621 * @mode: mode
622 *
623 * LOCKING:
624 * None.
625 *
626 * Return @mode's height (vdisplay) value.
627 *
628 * FIXME: is this needed?
629 *
630 * RETURNS:
631 * @mode->vdisplay
632 */
0b3904ab 633int drm_mode_height(const struct drm_display_mode *mode)
f453ba04
DA		 634{
635 return mode->vdisplay;
636}
637EXPORT_SYMBOL(drm_mode_height);
638
7ac96a9c
AJ		 639/** drm_mode_hsync - get the hsync of a mode
640 * @mode: mode
641 *
642 * LOCKING:
643 * None.
644 *
645 * Return @modes's hsync rate in kHz, rounded to the nearest int.
646 */
b1f559ec 647int drm_mode_hsync(const struct drm_display_mode *mode)
7ac96a9c
AJ		 648{
649 unsigned int calc_val;
650
651 if (mode->hsync)
652 return mode->hsync;
653
654 if (mode->htotal < 0)
655 return 0;
656
657 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
658 calc_val += 500; /* round to 1000Hz */
659 calc_val /= 1000; /* truncate to kHz */
660
661 return calc_val;
662}
663EXPORT_SYMBOL(drm_mode_hsync);
664
f453ba04
DA		 665/**
666 * drm_mode_vrefresh - get the vrefresh of a mode
667 * @mode: mode
668 *
669 * LOCKING:
670 * None.
671 *
7ac96a9c 672 * Return @mode's vrefresh rate in Hz or calculate it if necessary.
f453ba04
DA		 673 *
674 * FIXME: why is this needed? shouldn't vrefresh be set already?
675 *
676 * RETURNS:
559ee21d
ZY		 677 * Vertical refresh rate. It will be the result of actual value plus 0.5.
678 * If it is 70.288, it will return 70Hz.
679 * If it is 59.6, it will return 60Hz.
f453ba04 680 */
b1f559ec 681int drm_mode_vrefresh(const struct drm_display_mode *mode)
f453ba04
DA		 682{
683 int refresh = 0;
684 unsigned int calc_val;
685
686 if (mode->vrefresh > 0)
687 refresh = mode->vrefresh;
688 else if (mode->htotal > 0 && mode->vtotal > 0) {
559ee21d
ZY		 689 int vtotal;
690 vtotal = mode->vtotal;
f453ba04
DA		 691 /* work out vrefresh the value will be x1000 */
692 calc_val = (mode->clock * 1000);
f453ba04 693 calc_val /= mode->htotal;
559ee21d 694 refresh = (calc_val + vtotal / 2) / vtotal;
f453ba04 695
f453ba04
DA		 696 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
697 refresh *= 2;
698 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
699 refresh /= 2;
700 if (mode->vscan > 1)
701 refresh /= mode->vscan;
702 }
703 return refresh;
704}
705EXPORT_SYMBOL(drm_mode_vrefresh);
706
707/**
708 * drm_mode_set_crtcinfo - set CRTC modesetting parameters
709 * @p: mode
710 * @adjust_flags: unused? (FIXME)
711 *
712 * LOCKING:
713 * None.
714 *
715 * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
716 */
717void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
718{
719 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
720 return;
721
bde2dcf7 722 p->crtc_clock = p->clock;
f453ba04
DA		 723 p->crtc_hdisplay = p->hdisplay;
724 p->crtc_hsync_start = p->hsync_start;
725 p->crtc_hsync_end = p->hsync_end;
726 p->crtc_htotal = p->htotal;
727 p->crtc_hskew = p->hskew;
728 p->crtc_vdisplay = p->vdisplay;
729 p->crtc_vsync_start = p->vsync_start;
730 p->crtc_vsync_end = p->vsync_end;
731 p->crtc_vtotal = p->vtotal;
732
733 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
734 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
735 p->crtc_vdisplay /= 2;
736 p->crtc_vsync_start /= 2;
737 p->crtc_vsync_end /= 2;
738 p->crtc_vtotal /= 2;
739 }
f453ba04
DA		 740 }
741
742 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
743 p->crtc_vdisplay *= 2;
744 p->crtc_vsync_start *= 2;
745 p->crtc_vsync_end *= 2;
746 p->crtc_vtotal *= 2;
747 }
748
749 if (p->vscan > 1) {
750 p->crtc_vdisplay *= p->vscan;
751 p->crtc_vsync_start *= p->vscan;
752 p->crtc_vsync_end *= p->vscan;
753 p->crtc_vtotal *= p->vscan;
754 }
755
756 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
757 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
758 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
759 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
f453ba04
DA		 760}
761EXPORT_SYMBOL(drm_mode_set_crtcinfo);
762
763
c3c50e8b
VS		 764/**
765 * drm_mode_copy - copy the mode
766 * @dst: mode to overwrite
767 * @src: mode to copy
768 *
769 * LOCKING:
770 * None.
771 *
72e45e92
VS		 772 * Copy an existing mode into another mode, preserving the object id and
773 * list head of the destination mode.
c3c50e8b
VS		 774 */
775void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
776{
777 int id = dst->base.id;
72e45e92 778 struct list_head head = dst->head;
c3c50e8b
VS		 779
780 *dst = *src;
781 dst->base.id = id;
72e45e92 782 dst->head = head;
c3c50e8b
VS		 783}
784EXPORT_SYMBOL(drm_mode_copy);
785
f453ba04
DA		 786/**
787 * drm_mode_duplicate - allocate and duplicate an existing mode
788 * @m: mode to duplicate
789 *
790 * LOCKING:
791 * None.
792 *
793 * Just allocate a new mode, copy the existing mode into it, and return
794 * a pointer to it. Used to create new instances of established modes.
795 */
796struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
b1f559ec 797 const struct drm_display_mode *mode)
f453ba04
DA		 798{
799 struct drm_display_mode *nmode;
f453ba04
DA		 800
801 nmode = drm_mode_create(dev);
802 if (!nmode)
803 return NULL;
804
c3c50e8b
VS		 805 drm_mode_copy(nmode, mode);
806
f453ba04
DA		 807 return nmode;
808}
809EXPORT_SYMBOL(drm_mode_duplicate);
810
811/**
812 * drm_mode_equal - test modes for equality
813 * @mode1: first mode
814 * @mode2: second mode
815 *
816 * LOCKING:
817 * None.
818 *
819 * Check to see if @mode1 and @mode2 are equivalent.
820 *
821 * RETURNS:
822 * True if the modes are equal, false otherwise.
823 */
0b3904ab 824bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
f453ba04
DA		 825{
826 /* do clock check convert to PICOS so fb modes get matched
827 * the same */
828 if (mode1->clock && mode2->clock) {
829 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
830 return false;
831 } else if (mode1->clock != mode2->clock)
832 return false;
833
f2ecf2e3
DL		 834 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
835 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
836 return false;
837
838 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
8cc3f23c
VS		 839}
840EXPORT_SYMBOL(drm_mode_equal);
841
842/**
f2ecf2e3 843 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
8cc3f23c
VS		 844 * @mode1: first mode
845 * @mode2: second mode
846 *
847 * LOCKING:
848 * None.
849 *
850 * Check to see if @mode1 and @mode2 are equivalent, but
f2ecf2e3 851 * don't check the pixel clocks nor the stereo layout.
8cc3f23c
VS		 852 *
853 * RETURNS:
854 * True if the modes are equal, false otherwise.
855 */
f2ecf2e3
DL		 856bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
857 const struct drm_display_mode *mode2)
8cc3f23c 858{
f453ba04
DA		 859 if (mode1->hdisplay == mode2->hdisplay &&
860 mode1->hsync_start == mode2->hsync_start &&
861 mode1->hsync_end == mode2->hsync_end &&
862 mode1->htotal == mode2->htotal &&
863 mode1->hskew == mode2->hskew &&
864 mode1->vdisplay == mode2->vdisplay &&
865 mode1->vsync_start == mode2->vsync_start &&
866 mode1->vsync_end == mode2->vsync_end &&
867 mode1->vtotal == mode2->vtotal &&
868 mode1->vscan == mode2->vscan &&
f2ecf2e3
DL		 869 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
870 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
f453ba04
DA		 871 return true;
872
873 return false;
874}
f2ecf2e3 875EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
f453ba04
DA		 876
877/**
878 * drm_mode_validate_size - make sure modes adhere to size constraints
879 * @dev: DRM device
880 * @mode_list: list of modes to check
881 * @maxX: maximum width
882 * @maxY: maximum height
883 * @maxPitch: max pitch
884 *
885 * LOCKING:
886 * Caller must hold a lock protecting @mode_list.
887 *
888 * The DRM device (@dev) has size and pitch limits. Here we validate the
889 * modes we probed for @dev against those limits and set their status as
890 * necessary.
891 */
892void drm_mode_validate_size(struct drm_device *dev,
893 struct list_head *mode_list,
894 int maxX, int maxY, int maxPitch)
895{
896 struct drm_display_mode *mode;
897
898 list_for_each_entry(mode, mode_list, head) {
899 if (maxPitch > 0 && mode->hdisplay > maxPitch)
900 mode->status = MODE_BAD_WIDTH;
901
902 if (maxX > 0 && mode->hdisplay > maxX)
903 mode->status = MODE_VIRTUAL_X;
904
905 if (maxY > 0 && mode->vdisplay > maxY)
906 mode->status = MODE_VIRTUAL_Y;
907 }
908}
909EXPORT_SYMBOL(drm_mode_validate_size);
910
f453ba04
DA		 911/**
912 * drm_mode_prune_invalid - remove invalid modes from mode list
913 * @dev: DRM device
914 * @mode_list: list of modes to check
915 * @verbose: be verbose about it
916 *
917 * LOCKING:
918 * Caller must hold a lock protecting @mode_list.
919 *
920 * Once mode list generation is complete, a caller can use this routine to
921 * remove invalid modes from a mode list. If any of the modes have a
922 * status other than %MODE_OK, they are removed from @mode_list and freed.
923 */
924void drm_mode_prune_invalid(struct drm_device *dev,
925 struct list_head *mode_list, bool verbose)
926{
927 struct drm_display_mode *mode, *t;
928
929 list_for_each_entry_safe(mode, t, mode_list, head) {
930 if (mode->status != MODE_OK) {
931 list_del(&mode->head);
932 if (verbose) {
933 drm_mode_debug_printmodeline(mode);
f940f37f 934 DRM_DEBUG_KMS("Not using %s mode %d\n",
f0531859 935 mode->name, mode->status);
f453ba04
DA		 936 }
937 drm_mode_destroy(dev, mode);
938 }
939 }
940}
941EXPORT_SYMBOL(drm_mode_prune_invalid);
942
943/**
944 * drm_mode_compare - compare modes for favorability
2c761270 945 * @priv: unused
f453ba04
DA		 946 * @lh_a: list_head for first mode
947 * @lh_b: list_head for second mode
948 *
949 * LOCKING:
950 * None.
951 *
952 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
953 * which is better.
954 *
955 * RETURNS:
956 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
957 * positive if @lh_b is better than @lh_a.
958 */
2c761270 959static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
f453ba04
DA		 960{
961 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
962 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
963 int diff;
964
965 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
966 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
967 if (diff)
968 return diff;
969 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
970 if (diff)
971 return diff;
9bc3cd56
VS		 972
973 diff = b->vrefresh - a->vrefresh;
974 if (diff)
975 return diff;
976
f453ba04
DA		 977 diff = b->clock - a->clock;
978 return diff;
979}
980
f453ba04
DA		 981/**
982 * drm_mode_sort - sort mode list
983 * @mode_list: list to sort
984 *
985 * LOCKING:
986 * Caller must hold a lock protecting @mode_list.
987 *
988 * Sort @mode_list by favorability, putting good modes first.
989 */
990void drm_mode_sort(struct list_head *mode_list)
991{
2c761270 992 list_sort(NULL, mode_list, drm_mode_compare);
f453ba04
DA		 993}
994EXPORT_SYMBOL(drm_mode_sort);
995
996/**
997 * drm_mode_connector_list_update - update the mode list for the connector
998 * @connector: the connector to update
999 *
1000 * LOCKING:
1001 * Caller must hold a lock protecting @mode_list.
1002 *
1003 * This moves the modes from the @connector probed_modes list
1004 * to the actual mode list. It compares the probed mode against the current
1005 * list and only adds different modes. All modes unverified after this point
1006 * will be removed by the prune invalid modes.
1007 */
1008void drm_mode_connector_list_update(struct drm_connector *connector)
1009{
1010 struct drm_display_mode *mode;
1011 struct drm_display_mode *pmode, *pt;
1012 int found_it;
1013
1014 list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
1015 head) {
1016 found_it = 0;
1017 /* go through current modes checking for the new probed mode */
1018 list_for_each_entry(mode, &connector->modes, head) {
1019 if (drm_mode_equal(pmode, mode)) {
1020 found_it = 1;
1021 /* if equal delete the probed mode */
1022 mode->status = pmode->status;
38d5487d
KP		 1023 /* Merge type bits together */
1024 mode->type |= pmode->type;
f453ba04
DA		 1025 list_del(&pmode->head);
1026 drm_mode_destroy(connector->dev, pmode);
1027 break;
1028 }
1029 }
1030
1031 if (!found_it) {
1032 list_move_tail(&pmode->head, &connector->modes);
1033 }
1034 }
1035}
1036EXPORT_SYMBOL(drm_mode_connector_list_update);
1794d257
CW		 1037
1038/**
1039 * drm_mode_parse_command_line_for_connector - parse command line for connector
1040 * @mode_option - per connector mode option
1041 * @connector - connector to parse line for
1042 *
1043 * This parses the connector specific then generic command lines for
1044 * modes and options to configure the connector.
1045 *
1046 * This uses the same parameters as the fb modedb.c, except for extra
1047 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1048 *
1049 * enable/enable Digital/disable bit at the end
1050 */
1051bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1052 struct drm_connector *connector,
1053 struct drm_cmdline_mode *mode)
1054{
1055 const char *name;
1056 unsigned int namelen;
04fee895 1057 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1794d257 1058 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
04fee895
REB		 1059 bool yres_specified = false, cvt = false, rb = false;
1060 bool interlace = false, margins = false, was_digit = false;
1794d257
CW		 1061 int i;
1062 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1063
cb3c438e 1064#ifdef CONFIG_FB
1794d257
CW		 1065 if (!mode_option)
1066 mode_option = fb_mode_option;
cb3c438e 1067#endif
1794d257
CW		 1068
1069 if (!mode_option) {
1070 mode->specified = false;
1071 return false;
1072 }
1073
1074 name = mode_option;
1075 namelen = strlen(name);
1076 for (i = namelen-1; i >= 0; i--) {
1077 switch (name[i]) {
1078 case '@':
1794d257 1079 if (!refresh_specified && !bpp_specified &&
04fee895 1080 !yres_specified && !cvt && !rb && was_digit) {
1794d257 1081 refresh = simple_strtol(&name[i+1], NULL, 10);
04fee895
REB		 1082 refresh_specified = true;
1083 was_digit = false;
1794d257
CW		 1084 } else
1085 goto done;
1086 break;
1087 case '-':
04fee895
REB		 1088 if (!bpp_specified && !yres_specified && !cvt &&
1089 !rb && was_digit) {
1794d257 1090 bpp = simple_strtol(&name[i+1], NULL, 10);
04fee895
REB		 1091 bpp_specified = true;
1092 was_digit = false;
1794d257
CW		 1093 } else
1094 goto done;
1095 break;
1096 case 'x':
04fee895 1097 if (!yres_specified && was_digit) {
1794d257 1098 yres = simple_strtol(&name[i+1], NULL, 10);
04fee895
REB		 1099 yres_specified = true;
1100 was_digit = false;
1794d257
CW		 1101 } else
1102 goto done;
97fbfbf4 1103 break;
1794d257 1104 case '0' ... '9':
04fee895 1105 was_digit = true;
1794d257
CW		 1106 break;
1107 case 'M':
04fee895
REB		 1108 if (yres_specified || cvt || was_digit)
1109 goto done;
1110 cvt = true;
1794d257
CW		 1111 break;
1112 case 'R':
04fee895
REB		 1113 if (yres_specified || cvt || rb || was_digit)
1114 goto done;
1115 rb = true;
1794d257
CW		 1116 break;
1117 case 'm':
04fee895
REB		 1118 if (cvt || yres_specified || was_digit)
1119 goto done;
1120 margins = true;
1794d257
CW		 1121 break;
1122 case 'i':
04fee895
REB		 1123 if (cvt || yres_specified || was_digit)
1124 goto done;
1125 interlace = true;
1794d257
CW		 1126 break;
1127 case 'e':
04fee895
REB		 1128 if (yres_specified || bpp_specified || refresh_specified ||
1129 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1130 goto done;
1131
1794d257
CW		 1132 force = DRM_FORCE_ON;
1133 break;
1134 case 'D':
04fee895
REB		 1135 if (yres_specified || bpp_specified || refresh_specified ||
1136 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1137 goto done;
1138
1794d257
CW		 1139 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1140 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1141 force = DRM_FORCE_ON;
1142 else
1143 force = DRM_FORCE_ON_DIGITAL;
1144 break;
1145 case 'd':
04fee895
REB		 1146 if (yres_specified || bpp_specified || refresh_specified ||
1147 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1148 goto done;
1149
1794d257
CW		 1150 force = DRM_FORCE_OFF;
1151 break;
1152 default:
1153 goto done;
1154 }
1155 }
04fee895 1156
1794d257 1157 if (i < 0 && yres_specified) {
04fee895
REB		 1158 char *ch;
1159 xres = simple_strtol(name, &ch, 10);
1160 if ((ch != NULL) && (*ch == 'x'))
1161 res_specified = true;
1162 else
1163 i = ch - name;
1164 } else if (!yres_specified && was_digit) {
1165 /* catch mode that begins with digits but has no 'x' */
1166 i = 0;
1794d257
CW		 1167 }
1168done:
04fee895
REB		 1169 if (i >= 0) {
1170 printk(KERN_WARNING
1171 "parse error at position %i in video mode '%s'\n",
1172 i, name);
1173 mode->specified = false;
1174 return false;
1175 }
1176
1794d257
CW		 1177 if (res_specified) {
1178 mode->specified = true;
1179 mode->xres = xres;
1180 mode->yres = yres;
1181 }
1182
1183 if (refresh_specified) {
1184 mode->refresh_specified = true;
1185 mode->refresh = refresh;
1186 }
1187
1188 if (bpp_specified) {
1189 mode->bpp_specified = true;
1190 mode->bpp = bpp;
1191 }
04fee895
REB		 1192 mode->rb = rb;
1193 mode->cvt = cvt;
1194 mode->interlace = interlace;
1195 mode->margins = margins;
1794d257
CW		 1196 mode->force = force;
1197
1198 return true;
1199}
1200EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1201
1202struct drm_display_mode *
1203drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1204 struct drm_cmdline_mode *cmd)
1205{
1206 struct drm_display_mode *mode;
1207
1208 if (cmd->cvt)
1209 mode = drm_cvt_mode(dev,
1210 cmd->xres, cmd->yres,
1211 cmd->refresh_specified ? cmd->refresh : 60,
1212 cmd->rb, cmd->interlace,
1213 cmd->margins);
1214 else
1215 mode = drm_gtf_mode(dev,
1216 cmd->xres, cmd->yres,
1217 cmd->refresh_specified ? cmd->refresh : 60,
1218 cmd->interlace,
1219 cmd->margins);
1220 if (!mode)
1221 return NULL;
1222
1223 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1224 return mode;
1225}
1226EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
Linux kernel - Deliverables
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