Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* exynos_drm_crtc.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authors: | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
7 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
8 | * | |
d81aecb5 ID |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
1c248b7d ID |
13 | */ |
14 | ||
760285e7 DH |
15 | #include <drm/drmP.h> |
16 | #include <drm/drm_crtc_helper.h> | |
4ea9526b GP |
17 | #include <drm/drm_atomic.h> |
18 | #include <drm/drm_atomic_helper.h> | |
1c248b7d | 19 | |
e30655d0 | 20 | #include "exynos_drm_crtc.h" |
1c248b7d | 21 | #include "exynos_drm_drv.h" |
b5d2eb3b | 22 | #include "exynos_drm_plane.h" |
1c248b7d | 23 | |
63498e30 | 24 | static void exynos_drm_crtc_enable(struct drm_crtc *crtc) |
1c248b7d | 25 | { |
d2716c89 | 26 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
1c248b7d | 27 | |
3cecda03 GP |
28 | if (exynos_crtc->ops->enable) |
29 | exynos_crtc->ops->enable(exynos_crtc); | |
080be03d | 30 | |
63498e30 | 31 | drm_crtc_vblank_on(crtc); |
1c248b7d ID |
32 | } |
33 | ||
3fc4867c GP |
34 | static void exynos_drm_crtc_disable(struct drm_crtc *crtc) |
35 | { | |
63498e30 | 36 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
3fc4867c | 37 | |
63498e30 GP |
38 | drm_crtc_vblank_off(crtc); |
39 | ||
3cecda03 GP |
40 | if (exynos_crtc->ops->disable) |
41 | exynos_crtc->ops->disable(exynos_crtc); | |
3fc4867c GP |
42 | } |
43 | ||
199329cb GP |
44 | static void |
45 | exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) | |
1c248b7d | 46 | { |
4070d212 | 47 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
32aeab17 | 48 | |
199329cb GP |
49 | if (exynos_crtc->ops->commit) |
50 | exynos_crtc->ops->commit(exynos_crtc); | |
1c248b7d ID |
51 | } |
52 | ||
5625b341 AH |
53 | static int exynos_crtc_atomic_check(struct drm_crtc *crtc, |
54 | struct drm_crtc_state *state) | |
55 | { | |
56 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
57 | ||
c4e07407 AH |
58 | if (!state->enable) |
59 | return 0; | |
60 | ||
5625b341 AH |
61 | if (exynos_crtc->ops->atomic_check) |
62 | return exynos_crtc->ops->atomic_check(exynos_crtc, state); | |
63 | ||
64 | return 0; | |
65 | } | |
66 | ||
613d2b27 ML |
67 | static void exynos_crtc_atomic_begin(struct drm_crtc *crtc, |
68 | struct drm_crtc_state *old_crtc_state) | |
9d5ab6a0 GP |
69 | { |
70 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
71 | ||
c4533665 | 72 | exynos_crtc->event = crtc->state->event; |
d9220d47 | 73 | |
d29c2c14 MS |
74 | if (exynos_crtc->ops->atomic_begin) |
75 | exynos_crtc->ops->atomic_begin(exynos_crtc); | |
9d5ab6a0 GP |
76 | } |
77 | ||
613d2b27 ML |
78 | static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, |
79 | struct drm_crtc_state *old_crtc_state) | |
9d5ab6a0 | 80 | { |
d9220d47 | 81 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
d9220d47 | 82 | |
d29c2c14 MS |
83 | if (exynos_crtc->ops->atomic_flush) |
84 | exynos_crtc->ops->atomic_flush(exynos_crtc); | |
9d5ab6a0 GP |
85 | } |
86 | ||
800ba2b5 | 87 | static const struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { |
63498e30 | 88 | .enable = exynos_drm_crtc_enable, |
3fc4867c | 89 | .disable = exynos_drm_crtc_disable, |
199329cb | 90 | .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, |
5625b341 | 91 | .atomic_check = exynos_crtc_atomic_check, |
9d5ab6a0 GP |
92 | .atomic_begin = exynos_crtc_atomic_begin, |
93 | .atomic_flush = exynos_crtc_atomic_flush, | |
1c248b7d ID |
94 | }; |
95 | ||
1c248b7d ID |
96 | static void exynos_drm_crtc_destroy(struct drm_crtc *crtc) |
97 | { | |
98 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
99 | struct exynos_drm_private *private = crtc->dev->dev_private; | |
100 | ||
1c248b7d ID |
101 | private->crtc[exynos_crtc->pipe] = NULL; |
102 | ||
103 | drm_crtc_cleanup(crtc); | |
104 | kfree(exynos_crtc); | |
105 | } | |
106 | ||
800ba2b5 | 107 | static const struct drm_crtc_funcs exynos_crtc_funcs = { |
47a7deff | 108 | .set_config = drm_atomic_helper_set_config, |
9d5ab6a0 | 109 | .page_flip = drm_atomic_helper_page_flip, |
1c248b7d | 110 | .destroy = exynos_drm_crtc_destroy, |
4ea9526b GP |
111 | .reset = drm_atomic_helper_crtc_reset, |
112 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
113 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
1c248b7d ID |
114 | }; |
115 | ||
93bca243 | 116 | struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev, |
f3aaf762 KK |
117 | struct drm_plane *plane, |
118 | int pipe, | |
119 | enum exynos_drm_output_type type, | |
120 | const struct exynos_drm_crtc_ops *ops, | |
121 | void *ctx) | |
1c248b7d ID |
122 | { |
123 | struct exynos_drm_crtc *exynos_crtc; | |
eb88e422 | 124 | struct exynos_drm_private *private = drm_dev->dev_private; |
1c248b7d | 125 | struct drm_crtc *crtc; |
72ed6ccd | 126 | int ret; |
1c248b7d | 127 | |
1c248b7d | 128 | exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL); |
38bb5253 | 129 | if (!exynos_crtc) |
93bca243 | 130 | return ERR_PTR(-ENOMEM); |
1c248b7d | 131 | |
e09f2b0d | 132 | exynos_crtc->pipe = pipe; |
5d1741ad | 133 | exynos_crtc->type = type; |
93bca243 GP |
134 | exynos_crtc->ops = ops; |
135 | exynos_crtc->ctx = ctx; | |
b5d2eb3b | 136 | |
c4533665 GP |
137 | init_waitqueue_head(&exynos_crtc->wait_update); |
138 | ||
357193cd | 139 | crtc = &exynos_crtc->base; |
1c248b7d | 140 | |
e09f2b0d | 141 | private->crtc[pipe] = crtc; |
1c248b7d | 142 | |
eb88e422 | 143 | ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, |
f9882876 | 144 | &exynos_crtc_funcs, NULL); |
72ed6ccd AH |
145 | if (ret < 0) |
146 | goto err_crtc; | |
147 | ||
1c248b7d ID |
148 | drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs); |
149 | ||
93bca243 | 150 | return exynos_crtc; |
72ed6ccd AH |
151 | |
152 | err_crtc: | |
153 | plane->funcs->destroy(plane); | |
72ed6ccd | 154 | kfree(exynos_crtc); |
93bca243 | 155 | return ERR_PTR(ret); |
1c248b7d ID |
156 | } |
157 | ||
88e72717 | 158 | int exynos_drm_crtc_enable_vblank(struct drm_device *dev, unsigned int pipe) |
1c248b7d | 159 | { |
27019328 AH |
160 | struct exynos_drm_crtc *exynos_crtc = exynos_drm_crtc_from_pipe(dev, |
161 | pipe); | |
1c248b7d | 162 | |
93bca243 | 163 | if (exynos_crtc->ops->enable_vblank) |
08dd2009 | 164 | return exynos_crtc->ops->enable_vblank(exynos_crtc); |
1c248b7d ID |
165 | |
166 | return 0; | |
167 | } | |
168 | ||
88e72717 | 169 | void exynos_drm_crtc_disable_vblank(struct drm_device *dev, unsigned int pipe) |
1c248b7d | 170 | { |
27019328 AH |
171 | struct exynos_drm_crtc *exynos_crtc = exynos_drm_crtc_from_pipe(dev, |
172 | pipe); | |
1c248b7d | 173 | |
93bca243 GP |
174 | if (exynos_crtc->ops->disable_vblank) |
175 | exynos_crtc->ops->disable_vblank(exynos_crtc); | |
1c248b7d | 176 | } |
663d8766 | 177 | |
c4533665 GP |
178 | void exynos_drm_crtc_wait_pending_update(struct exynos_drm_crtc *exynos_crtc) |
179 | { | |
180 | wait_event_timeout(exynos_crtc->wait_update, | |
181 | (atomic_read(&exynos_crtc->pending_update) == 0), | |
182 | msecs_to_jiffies(50)); | |
183 | } | |
184 | ||
822f6dfd GP |
185 | void exynos_drm_crtc_finish_update(struct exynos_drm_crtc *exynos_crtc, |
186 | struct exynos_drm_plane *exynos_plane) | |
663d8766 | 187 | { |
eafd540a | 188 | struct drm_crtc *crtc = &exynos_crtc->base; |
663d8766 RS |
189 | unsigned long flags; |
190 | ||
822f6dfd GP |
191 | exynos_plane->pending_fb = NULL; |
192 | ||
c4533665 GP |
193 | if (atomic_dec_and_test(&exynos_crtc->pending_update)) |
194 | wake_up(&exynos_crtc->wait_update); | |
195 | ||
eafd540a | 196 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
7cf23eaf | 197 | if (exynos_crtc->event) |
eafd540a | 198 | drm_crtc_send_vblank_event(crtc, exynos_crtc->event); |
663d8766 | 199 | |
e752747b | 200 | exynos_crtc->event = NULL; |
eafd540a | 201 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
663d8766 | 202 | } |
080be03d | 203 | |
f37cd5e8 | 204 | int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, |
cf67cc9a | 205 | enum exynos_drm_output_type out_type) |
f37cd5e8 ID |
206 | { |
207 | struct drm_crtc *crtc; | |
208 | ||
209 | list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { | |
210 | struct exynos_drm_crtc *exynos_crtc; | |
211 | ||
212 | exynos_crtc = to_exynos_crtc(crtc); | |
5d1741ad | 213 | if (exynos_crtc->type == out_type) |
8a326edd | 214 | return exynos_crtc->pipe; |
f37cd5e8 ID |
215 | } |
216 | ||
217 | return -EPERM; | |
218 | } | |
5595d4d8 YC |
219 | |
220 | void exynos_drm_crtc_te_handler(struct drm_crtc *crtc) | |
221 | { | |
93bca243 | 222 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
5595d4d8 | 223 | |
93bca243 GP |
224 | if (exynos_crtc->ops->te_handler) |
225 | exynos_crtc->ops->te_handler(exynos_crtc); | |
5595d4d8 | 226 | } |
c74d8eb5 ID |
227 | |
228 | void exynos_drm_crtc_cancel_page_flip(struct drm_crtc *crtc, | |
229 | struct drm_file *file) | |
230 | { | |
231 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
232 | struct drm_pending_vblank_event *e; | |
233 | unsigned long flags; | |
234 | ||
235 | spin_lock_irqsave(&crtc->dev->event_lock, flags); | |
fc173ae6 | 236 | |
c74d8eb5 ID |
237 | e = exynos_crtc->event; |
238 | if (e && e->base.file_priv == file) { | |
239 | exynos_crtc->event = NULL; | |
c74d8eb5 ID |
240 | atomic_dec(&exynos_crtc->pending_update); |
241 | } | |
fc173ae6 | 242 | |
c74d8eb5 | 243 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
fc173ae6 AH |
244 | |
245 | if (e && e->base.file_priv == file) | |
246 | drm_event_cancel_free(crtc->dev, &e->base); | |
c74d8eb5 | 247 | } |