Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* exynos_drm_crtc.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authors: | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
7 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
8 | * | |
d81aecb5 ID |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
1c248b7d ID |
13 | */ |
14 | ||
760285e7 DH |
15 | #include <drm/drmP.h> |
16 | #include <drm/drm_crtc_helper.h> | |
4ea9526b GP |
17 | #include <drm/drm_atomic.h> |
18 | #include <drm/drm_atomic_helper.h> | |
1c248b7d | 19 | |
e30655d0 | 20 | #include "exynos_drm_crtc.h" |
1c248b7d | 21 | #include "exynos_drm_drv.h" |
1c248b7d | 22 | #include "exynos_drm_encoder.h" |
b5d2eb3b | 23 | #include "exynos_drm_plane.h" |
1c248b7d | 24 | |
1c248b7d ID |
25 | static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode) |
26 | { | |
d2716c89 | 27 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
1c248b7d | 28 | |
d2716c89 JS |
29 | DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode); |
30 | ||
ec05da95 ID |
31 | if (exynos_crtc->dpms == mode) { |
32 | DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n"); | |
33 | return; | |
34 | } | |
35 | ||
20cd2640 ID |
36 | if (mode > DRM_MODE_DPMS_ON) { |
37 | /* wait for the completion of page flip. */ | |
e35d7223 | 38 | if (!wait_event_timeout(exynos_crtc->pending_flip_queue, |
e752747b MSB |
39 | (exynos_crtc->event == NULL), HZ/20)) |
40 | exynos_crtc->event = NULL; | |
d6948b2f | 41 | drm_crtc_vblank_off(crtc); |
20cd2640 ID |
42 | } |
43 | ||
93bca243 GP |
44 | if (exynos_crtc->ops->dpms) |
45 | exynos_crtc->ops->dpms(exynos_crtc, mode); | |
080be03d | 46 | |
cf5188ac | 47 | exynos_crtc->dpms = mode; |
d6948b2f AH |
48 | |
49 | if (mode == DRM_MODE_DPMS_ON) | |
50 | drm_crtc_vblank_on(crtc); | |
1c248b7d ID |
51 | } |
52 | ||
1c248b7d ID |
53 | static void exynos_drm_crtc_commit(struct drm_crtc *crtc) |
54 | { | |
d2716c89 | 55 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
9d5310c0 | 56 | struct exynos_drm_plane *exynos_plane = to_exynos_plane(crtc->primary); |
d2716c89 | 57 | |
50caf25c | 58 | exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON); |
080be03d | 59 | |
93bca243 GP |
60 | if (exynos_crtc->ops->win_commit) |
61 | exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos); | |
1c248b7d ID |
62 | } |
63 | ||
64 | static bool | |
65 | exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc, | |
e811f5ae | 66 | const struct drm_display_mode *mode, |
1c248b7d ID |
67 | struct drm_display_mode *adjusted_mode) |
68 | { | |
4b405269 | 69 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
4b405269 | 70 | |
93bca243 GP |
71 | if (exynos_crtc->ops->mode_fixup) |
72 | return exynos_crtc->ops->mode_fixup(exynos_crtc, mode, | |
73 | adjusted_mode); | |
4b405269 | 74 | |
1c248b7d ID |
75 | return true; |
76 | } | |
77 | ||
199329cb GP |
78 | static void |
79 | exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) | |
1c248b7d | 80 | { |
4070d212 | 81 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
32aeab17 | 82 | |
199329cb GP |
83 | if (exynos_crtc->ops->commit) |
84 | exynos_crtc->ops->commit(exynos_crtc); | |
1c248b7d ID |
85 | } |
86 | ||
a365d9eb JS |
87 | static void exynos_drm_crtc_disable(struct drm_crtc *crtc) |
88 | { | |
a9c4cd21 SP |
89 | struct drm_plane *plane; |
90 | int ret; | |
a365d9eb | 91 | |
a365d9eb | 92 | exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); |
a9c4cd21 | 93 | |
0886327a | 94 | drm_for_each_legacy_plane(plane, &crtc->dev->mode_config.plane_list) { |
a9c4cd21 SP |
95 | if (plane->crtc != crtc) |
96 | continue; | |
97 | ||
98 | ret = plane->funcs->disable_plane(plane); | |
99 | if (ret) | |
100 | DRM_ERROR("Failed to disable plane %d\n", ret); | |
101 | } | |
a365d9eb JS |
102 | } |
103 | ||
1c248b7d ID |
104 | static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { |
105 | .dpms = exynos_drm_crtc_dpms, | |
1c248b7d ID |
106 | .commit = exynos_drm_crtc_commit, |
107 | .mode_fixup = exynos_drm_crtc_mode_fixup, | |
199329cb | 108 | .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, |
a365d9eb | 109 | .disable = exynos_drm_crtc_disable, |
1c248b7d ID |
110 | }; |
111 | ||
112 | static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, | |
ed8d1975 KP |
113 | struct drm_framebuffer *fb, |
114 | struct drm_pending_vblank_event *event, | |
115 | uint32_t page_flip_flags) | |
1c248b7d ID |
116 | { |
117 | struct drm_device *dev = crtc->dev; | |
1c248b7d | 118 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
8b9c4505 | 119 | unsigned int crtc_w, crtc_h; |
e752747b | 120 | int ret; |
1c248b7d | 121 | |
ef6223dc ID |
122 | /* when the page flip is requested, crtc's dpms should be on */ |
123 | if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) { | |
124 | DRM_ERROR("failed page flip request.\n"); | |
125 | return -EINVAL; | |
126 | } | |
127 | ||
e752747b MSB |
128 | if (!event) |
129 | return -EINVAL; | |
1c248b7d | 130 | |
e752747b MSB |
131 | spin_lock_irq(&dev->event_lock); |
132 | if (exynos_crtc->event) { | |
133 | ret = -EBUSY; | |
134 | goto out; | |
135 | } | |
ccf4d883 | 136 | |
43dbdad2 GP |
137 | ret = exynos_check_plane(crtc->primary, fb); |
138 | if (ret) | |
139 | goto out; | |
140 | ||
e752747b MSB |
141 | ret = drm_vblank_get(dev, exynos_crtc->pipe); |
142 | if (ret) { | |
143 | DRM_DEBUG("failed to acquire vblank counter\n"); | |
144 | goto out; | |
145 | } | |
ccf4d883 | 146 | |
e752747b MSB |
147 | exynos_crtc->event = event; |
148 | spin_unlock_irq(&dev->event_lock); | |
1c248b7d | 149 | |
e752747b MSB |
150 | /* |
151 | * the pipe from user always is 0 so we can set pipe number | |
152 | * of current owner to event. | |
153 | */ | |
154 | event->pipe = exynos_crtc->pipe; | |
155 | ||
156 | crtc->primary->fb = fb; | |
157 | crtc_w = fb->width - crtc->x; | |
158 | crtc_h = fb->height - crtc->y; | |
43dbdad2 GP |
159 | exynos_update_plane(crtc->primary, crtc, fb, 0, 0, |
160 | crtc_w, crtc_h, crtc->x << 16, crtc->y << 16, | |
161 | crtc_w << 16, crtc_h << 16); | |
e752747b | 162 | |
7cf1ff25 GP |
163 | if (crtc->primary->state) |
164 | drm_atomic_set_fb_for_plane(crtc->primary->state, fb); | |
165 | ||
e752747b MSB |
166 | return 0; |
167 | ||
1c248b7d | 168 | out: |
e752747b | 169 | spin_unlock_irq(&dev->event_lock); |
1c248b7d ID |
170 | return ret; |
171 | } | |
172 | ||
173 | static void exynos_drm_crtc_destroy(struct drm_crtc *crtc) | |
174 | { | |
175 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
176 | struct exynos_drm_private *private = crtc->dev->dev_private; | |
177 | ||
1c248b7d ID |
178 | private->crtc[exynos_crtc->pipe] = NULL; |
179 | ||
180 | drm_crtc_cleanup(crtc); | |
181 | kfree(exynos_crtc); | |
182 | } | |
183 | ||
184 | static struct drm_crtc_funcs exynos_crtc_funcs = { | |
47a7deff | 185 | .set_config = drm_atomic_helper_set_config, |
1c248b7d ID |
186 | .page_flip = exynos_drm_crtc_page_flip, |
187 | .destroy = exynos_drm_crtc_destroy, | |
4ea9526b GP |
188 | .reset = drm_atomic_helper_crtc_reset, |
189 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
190 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
1c248b7d ID |
191 | }; |
192 | ||
93bca243 | 193 | struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev, |
f3aaf762 KK |
194 | struct drm_plane *plane, |
195 | int pipe, | |
196 | enum exynos_drm_output_type type, | |
197 | const struct exynos_drm_crtc_ops *ops, | |
198 | void *ctx) | |
1c248b7d ID |
199 | { |
200 | struct exynos_drm_crtc *exynos_crtc; | |
eb88e422 | 201 | struct exynos_drm_private *private = drm_dev->dev_private; |
1c248b7d | 202 | struct drm_crtc *crtc; |
72ed6ccd | 203 | int ret; |
1c248b7d | 204 | |
1c248b7d | 205 | exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL); |
38bb5253 | 206 | if (!exynos_crtc) |
93bca243 | 207 | return ERR_PTR(-ENOMEM); |
1c248b7d | 208 | |
20cd2640 | 209 | init_waitqueue_head(&exynos_crtc->pending_flip_queue); |
080be03d SP |
210 | |
211 | exynos_crtc->dpms = DRM_MODE_DPMS_OFF; | |
e09f2b0d | 212 | exynos_crtc->pipe = pipe; |
5d1741ad | 213 | exynos_crtc->type = type; |
93bca243 GP |
214 | exynos_crtc->ops = ops; |
215 | exynos_crtc->ctx = ctx; | |
b5d2eb3b | 216 | |
357193cd | 217 | crtc = &exynos_crtc->base; |
1c248b7d | 218 | |
e09f2b0d | 219 | private->crtc[pipe] = crtc; |
1c248b7d | 220 | |
eb88e422 | 221 | ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, |
72ed6ccd AH |
222 | &exynos_crtc_funcs); |
223 | if (ret < 0) | |
224 | goto err_crtc; | |
225 | ||
1c248b7d ID |
226 | drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs); |
227 | ||
93bca243 | 228 | return exynos_crtc; |
72ed6ccd AH |
229 | |
230 | err_crtc: | |
231 | plane->funcs->destroy(plane); | |
72ed6ccd | 232 | kfree(exynos_crtc); |
93bca243 | 233 | return ERR_PTR(ret); |
1c248b7d ID |
234 | } |
235 | ||
080be03d | 236 | int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int pipe) |
1c248b7d ID |
237 | { |
238 | struct exynos_drm_private *private = dev->dev_private; | |
ec05da95 | 239 | struct exynos_drm_crtc *exynos_crtc = |
080be03d | 240 | to_exynos_crtc(private->crtc[pipe]); |
1c248b7d | 241 | |
ec05da95 ID |
242 | if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) |
243 | return -EPERM; | |
244 | ||
93bca243 GP |
245 | if (exynos_crtc->ops->enable_vblank) |
246 | exynos_crtc->ops->enable_vblank(exynos_crtc); | |
1c248b7d ID |
247 | |
248 | return 0; | |
249 | } | |
250 | ||
080be03d | 251 | void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe) |
1c248b7d ID |
252 | { |
253 | struct exynos_drm_private *private = dev->dev_private; | |
ec05da95 | 254 | struct exynos_drm_crtc *exynos_crtc = |
080be03d | 255 | to_exynos_crtc(private->crtc[pipe]); |
1c248b7d | 256 | |
ec05da95 ID |
257 | if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) |
258 | return; | |
259 | ||
93bca243 GP |
260 | if (exynos_crtc->ops->disable_vblank) |
261 | exynos_crtc->ops->disable_vblank(exynos_crtc); | |
1c248b7d | 262 | } |
663d8766 | 263 | |
080be03d | 264 | void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe) |
663d8766 RS |
265 | { |
266 | struct exynos_drm_private *dev_priv = dev->dev_private; | |
080be03d | 267 | struct drm_crtc *drm_crtc = dev_priv->crtc[pipe]; |
20cd2640 | 268 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(drm_crtc); |
663d8766 RS |
269 | unsigned long flags; |
270 | ||
663d8766 | 271 | spin_lock_irqsave(&dev->event_lock, flags); |
e752747b | 272 | if (exynos_crtc->event) { |
663d8766 | 273 | |
e752747b | 274 | drm_send_vblank_event(dev, -1, exynos_crtc->event); |
080be03d | 275 | drm_vblank_put(dev, pipe); |
20cd2640 | 276 | wake_up(&exynos_crtc->pending_flip_queue); |
e752747b | 277 | |
663d8766 RS |
278 | } |
279 | ||
e752747b | 280 | exynos_crtc->event = NULL; |
663d8766 RS |
281 | spin_unlock_irqrestore(&dev->event_lock, flags); |
282 | } | |
080be03d | 283 | |
080be03d SP |
284 | void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb) |
285 | { | |
93bca243 | 286 | struct exynos_drm_crtc *exynos_crtc; |
080be03d SP |
287 | struct drm_device *dev = fb->dev; |
288 | struct drm_crtc *crtc; | |
289 | ||
290 | /* | |
291 | * make sure that overlay data are updated to real hardware | |
292 | * for all encoders. | |
293 | */ | |
294 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
93bca243 | 295 | exynos_crtc = to_exynos_crtc(crtc); |
080be03d SP |
296 | |
297 | /* | |
298 | * wait for vblank interrupt | |
299 | * - this makes sure that overlay data are updated to | |
300 | * real hardware. | |
301 | */ | |
93bca243 GP |
302 | if (exynos_crtc->ops->wait_for_vblank) |
303 | exynos_crtc->ops->wait_for_vblank(exynos_crtc); | |
080be03d SP |
304 | } |
305 | } | |
f37cd5e8 ID |
306 | |
307 | int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, | |
308 | unsigned int out_type) | |
309 | { | |
310 | struct drm_crtc *crtc; | |
311 | ||
312 | list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { | |
313 | struct exynos_drm_crtc *exynos_crtc; | |
314 | ||
315 | exynos_crtc = to_exynos_crtc(crtc); | |
5d1741ad | 316 | if (exynos_crtc->type == out_type) |
8a326edd | 317 | return exynos_crtc->pipe; |
f37cd5e8 ID |
318 | } |
319 | ||
320 | return -EPERM; | |
321 | } | |
5595d4d8 YC |
322 | |
323 | void exynos_drm_crtc_te_handler(struct drm_crtc *crtc) | |
324 | { | |
93bca243 | 325 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
5595d4d8 | 326 | |
93bca243 GP |
327 | if (exynos_crtc->ops->te_handler) |
328 | exynos_crtc->ops->te_handler(exynos_crtc); | |
5595d4d8 | 329 | } |