Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* exynos_drm_crtc.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authors: | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
7 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
8 | * | |
d81aecb5 ID |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
1c248b7d ID |
13 | */ |
14 | ||
760285e7 DH |
15 | #include <drm/drmP.h> |
16 | #include <drm/drm_crtc_helper.h> | |
4ea9526b GP |
17 | #include <drm/drm_atomic.h> |
18 | #include <drm/drm_atomic_helper.h> | |
1c248b7d | 19 | |
e30655d0 | 20 | #include "exynos_drm_crtc.h" |
1c248b7d | 21 | #include "exynos_drm_drv.h" |
1c248b7d | 22 | #include "exynos_drm_encoder.h" |
b5d2eb3b | 23 | #include "exynos_drm_plane.h" |
1c248b7d | 24 | |
1c248b7d ID |
25 | static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode) |
26 | { | |
d2716c89 | 27 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
1c248b7d | 28 | |
d2716c89 JS |
29 | DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode); |
30 | ||
ec05da95 ID |
31 | if (exynos_crtc->dpms == mode) { |
32 | DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n"); | |
33 | return; | |
34 | } | |
35 | ||
20cd2640 ID |
36 | if (mode > DRM_MODE_DPMS_ON) { |
37 | /* wait for the completion of page flip. */ | |
e35d7223 | 38 | if (!wait_event_timeout(exynos_crtc->pending_flip_queue, |
e752747b MSB |
39 | (exynos_crtc->event == NULL), HZ/20)) |
40 | exynos_crtc->event = NULL; | |
d6948b2f | 41 | drm_crtc_vblank_off(crtc); |
20cd2640 ID |
42 | } |
43 | ||
93bca243 GP |
44 | if (exynos_crtc->ops->dpms) |
45 | exynos_crtc->ops->dpms(exynos_crtc, mode); | |
080be03d | 46 | |
cf5188ac | 47 | exynos_crtc->dpms = mode; |
d6948b2f AH |
48 | |
49 | if (mode == DRM_MODE_DPMS_ON) | |
50 | drm_crtc_vblank_on(crtc); | |
1c248b7d ID |
51 | } |
52 | ||
53 | static void exynos_drm_crtc_prepare(struct drm_crtc *crtc) | |
54 | { | |
1c248b7d ID |
55 | /* drm framework doesn't check NULL. */ |
56 | } | |
57 | ||
58 | static void exynos_drm_crtc_commit(struct drm_crtc *crtc) | |
59 | { | |
d2716c89 | 60 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
9d5310c0 | 61 | struct exynos_drm_plane *exynos_plane = to_exynos_plane(crtc->primary); |
d2716c89 | 62 | |
50caf25c | 63 | exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON); |
080be03d | 64 | |
93bca243 GP |
65 | if (exynos_crtc->ops->win_commit) |
66 | exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos); | |
1c248b7d ID |
67 | } |
68 | ||
69 | static bool | |
70 | exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc, | |
e811f5ae | 71 | const struct drm_display_mode *mode, |
1c248b7d ID |
72 | struct drm_display_mode *adjusted_mode) |
73 | { | |
4b405269 | 74 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
4b405269 | 75 | |
93bca243 GP |
76 | if (exynos_crtc->ops->mode_fixup) |
77 | return exynos_crtc->ops->mode_fixup(exynos_crtc, mode, | |
78 | adjusted_mode); | |
4b405269 | 79 | |
1c248b7d ID |
80 | return true; |
81 | } | |
82 | ||
199329cb GP |
83 | static void |
84 | exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) | |
1c248b7d | 85 | { |
4070d212 | 86 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
32aeab17 | 87 | |
199329cb GP |
88 | if (exynos_crtc->ops->commit) |
89 | exynos_crtc->ops->commit(exynos_crtc); | |
1c248b7d ID |
90 | } |
91 | ||
a365d9eb JS |
92 | static void exynos_drm_crtc_disable(struct drm_crtc *crtc) |
93 | { | |
a9c4cd21 SP |
94 | struct drm_plane *plane; |
95 | int ret; | |
a365d9eb | 96 | |
a365d9eb | 97 | exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); |
a9c4cd21 | 98 | |
0886327a | 99 | drm_for_each_legacy_plane(plane, &crtc->dev->mode_config.plane_list) { |
a9c4cd21 SP |
100 | if (plane->crtc != crtc) |
101 | continue; | |
102 | ||
103 | ret = plane->funcs->disable_plane(plane); | |
104 | if (ret) | |
105 | DRM_ERROR("Failed to disable plane %d\n", ret); | |
106 | } | |
a365d9eb JS |
107 | } |
108 | ||
1c248b7d ID |
109 | static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { |
110 | .dpms = exynos_drm_crtc_dpms, | |
111 | .prepare = exynos_drm_crtc_prepare, | |
112 | .commit = exynos_drm_crtc_commit, | |
113 | .mode_fixup = exynos_drm_crtc_mode_fixup, | |
199329cb GP |
114 | .mode_set = drm_helper_crtc_mode_set, |
115 | .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, | |
116 | .mode_set_base = drm_helper_crtc_mode_set_base, | |
a365d9eb | 117 | .disable = exynos_drm_crtc_disable, |
1c248b7d ID |
118 | }; |
119 | ||
120 | static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc, | |
ed8d1975 KP |
121 | struct drm_framebuffer *fb, |
122 | struct drm_pending_vblank_event *event, | |
123 | uint32_t page_flip_flags) | |
1c248b7d ID |
124 | { |
125 | struct drm_device *dev = crtc->dev; | |
1c248b7d | 126 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
8b9c4505 | 127 | unsigned int crtc_w, crtc_h; |
e752747b | 128 | int ret; |
1c248b7d | 129 | |
ef6223dc ID |
130 | /* when the page flip is requested, crtc's dpms should be on */ |
131 | if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) { | |
132 | DRM_ERROR("failed page flip request.\n"); | |
133 | return -EINVAL; | |
134 | } | |
135 | ||
e752747b MSB |
136 | if (!event) |
137 | return -EINVAL; | |
1c248b7d | 138 | |
e752747b MSB |
139 | spin_lock_irq(&dev->event_lock); |
140 | if (exynos_crtc->event) { | |
141 | ret = -EBUSY; | |
142 | goto out; | |
143 | } | |
ccf4d883 | 144 | |
43dbdad2 GP |
145 | ret = exynos_check_plane(crtc->primary, fb); |
146 | if (ret) | |
147 | goto out; | |
148 | ||
e752747b MSB |
149 | ret = drm_vblank_get(dev, exynos_crtc->pipe); |
150 | if (ret) { | |
151 | DRM_DEBUG("failed to acquire vblank counter\n"); | |
152 | goto out; | |
153 | } | |
ccf4d883 | 154 | |
e752747b MSB |
155 | exynos_crtc->event = event; |
156 | spin_unlock_irq(&dev->event_lock); | |
1c248b7d | 157 | |
e752747b MSB |
158 | /* |
159 | * the pipe from user always is 0 so we can set pipe number | |
160 | * of current owner to event. | |
161 | */ | |
162 | event->pipe = exynos_crtc->pipe; | |
163 | ||
164 | crtc->primary->fb = fb; | |
165 | crtc_w = fb->width - crtc->x; | |
166 | crtc_h = fb->height - crtc->y; | |
43dbdad2 GP |
167 | exynos_update_plane(crtc->primary, crtc, fb, 0, 0, |
168 | crtc_w, crtc_h, crtc->x << 16, crtc->y << 16, | |
169 | crtc_w << 16, crtc_h << 16); | |
e752747b | 170 | |
7cf1ff25 GP |
171 | if (crtc->primary->state) |
172 | drm_atomic_set_fb_for_plane(crtc->primary->state, fb); | |
173 | ||
e752747b MSB |
174 | return 0; |
175 | ||
1c248b7d | 176 | out: |
e752747b | 177 | spin_unlock_irq(&dev->event_lock); |
1c248b7d ID |
178 | return ret; |
179 | } | |
180 | ||
181 | static void exynos_drm_crtc_destroy(struct drm_crtc *crtc) | |
182 | { | |
183 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
184 | struct exynos_drm_private *private = crtc->dev->dev_private; | |
185 | ||
1c248b7d ID |
186 | private->crtc[exynos_crtc->pipe] = NULL; |
187 | ||
188 | drm_crtc_cleanup(crtc); | |
189 | kfree(exynos_crtc); | |
190 | } | |
191 | ||
192 | static struct drm_crtc_funcs exynos_crtc_funcs = { | |
193 | .set_config = drm_crtc_helper_set_config, | |
194 | .page_flip = exynos_drm_crtc_page_flip, | |
195 | .destroy = exynos_drm_crtc_destroy, | |
4ea9526b GP |
196 | .reset = drm_atomic_helper_crtc_reset, |
197 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
198 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
1c248b7d ID |
199 | }; |
200 | ||
93bca243 | 201 | struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev, |
f3aaf762 KK |
202 | struct drm_plane *plane, |
203 | int pipe, | |
204 | enum exynos_drm_output_type type, | |
205 | const struct exynos_drm_crtc_ops *ops, | |
206 | void *ctx) | |
1c248b7d ID |
207 | { |
208 | struct exynos_drm_crtc *exynos_crtc; | |
eb88e422 | 209 | struct exynos_drm_private *private = drm_dev->dev_private; |
1c248b7d | 210 | struct drm_crtc *crtc; |
72ed6ccd | 211 | int ret; |
1c248b7d | 212 | |
1c248b7d | 213 | exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL); |
38bb5253 | 214 | if (!exynos_crtc) |
93bca243 | 215 | return ERR_PTR(-ENOMEM); |
1c248b7d | 216 | |
20cd2640 | 217 | init_waitqueue_head(&exynos_crtc->pending_flip_queue); |
080be03d SP |
218 | |
219 | exynos_crtc->dpms = DRM_MODE_DPMS_OFF; | |
e09f2b0d | 220 | exynos_crtc->pipe = pipe; |
5d1741ad | 221 | exynos_crtc->type = type; |
93bca243 GP |
222 | exynos_crtc->ops = ops; |
223 | exynos_crtc->ctx = ctx; | |
b5d2eb3b | 224 | |
357193cd | 225 | crtc = &exynos_crtc->base; |
1c248b7d | 226 | |
e09f2b0d | 227 | private->crtc[pipe] = crtc; |
1c248b7d | 228 | |
eb88e422 | 229 | ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, |
72ed6ccd AH |
230 | &exynos_crtc_funcs); |
231 | if (ret < 0) | |
232 | goto err_crtc; | |
233 | ||
1c248b7d ID |
234 | drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs); |
235 | ||
93bca243 | 236 | return exynos_crtc; |
72ed6ccd AH |
237 | |
238 | err_crtc: | |
239 | plane->funcs->destroy(plane); | |
72ed6ccd | 240 | kfree(exynos_crtc); |
93bca243 | 241 | return ERR_PTR(ret); |
1c248b7d ID |
242 | } |
243 | ||
080be03d | 244 | int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int pipe) |
1c248b7d ID |
245 | { |
246 | struct exynos_drm_private *private = dev->dev_private; | |
ec05da95 | 247 | struct exynos_drm_crtc *exynos_crtc = |
080be03d | 248 | to_exynos_crtc(private->crtc[pipe]); |
1c248b7d | 249 | |
ec05da95 ID |
250 | if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) |
251 | return -EPERM; | |
252 | ||
93bca243 GP |
253 | if (exynos_crtc->ops->enable_vblank) |
254 | exynos_crtc->ops->enable_vblank(exynos_crtc); | |
1c248b7d ID |
255 | |
256 | return 0; | |
257 | } | |
258 | ||
080be03d | 259 | void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe) |
1c248b7d ID |
260 | { |
261 | struct exynos_drm_private *private = dev->dev_private; | |
ec05da95 | 262 | struct exynos_drm_crtc *exynos_crtc = |
080be03d | 263 | to_exynos_crtc(private->crtc[pipe]); |
1c248b7d | 264 | |
ec05da95 ID |
265 | if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) |
266 | return; | |
267 | ||
93bca243 GP |
268 | if (exynos_crtc->ops->disable_vblank) |
269 | exynos_crtc->ops->disable_vblank(exynos_crtc); | |
1c248b7d | 270 | } |
663d8766 | 271 | |
080be03d | 272 | void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe) |
663d8766 RS |
273 | { |
274 | struct exynos_drm_private *dev_priv = dev->dev_private; | |
080be03d | 275 | struct drm_crtc *drm_crtc = dev_priv->crtc[pipe]; |
20cd2640 | 276 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(drm_crtc); |
663d8766 RS |
277 | unsigned long flags; |
278 | ||
663d8766 | 279 | spin_lock_irqsave(&dev->event_lock, flags); |
e752747b | 280 | if (exynos_crtc->event) { |
663d8766 | 281 | |
e752747b | 282 | drm_send_vblank_event(dev, -1, exynos_crtc->event); |
080be03d | 283 | drm_vblank_put(dev, pipe); |
20cd2640 | 284 | wake_up(&exynos_crtc->pending_flip_queue); |
e752747b | 285 | |
663d8766 RS |
286 | } |
287 | ||
e752747b | 288 | exynos_crtc->event = NULL; |
663d8766 RS |
289 | spin_unlock_irqrestore(&dev->event_lock, flags); |
290 | } | |
080be03d | 291 | |
080be03d SP |
292 | void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb) |
293 | { | |
93bca243 | 294 | struct exynos_drm_crtc *exynos_crtc; |
080be03d SP |
295 | struct drm_device *dev = fb->dev; |
296 | struct drm_crtc *crtc; | |
297 | ||
298 | /* | |
299 | * make sure that overlay data are updated to real hardware | |
300 | * for all encoders. | |
301 | */ | |
302 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
93bca243 | 303 | exynos_crtc = to_exynos_crtc(crtc); |
080be03d SP |
304 | |
305 | /* | |
306 | * wait for vblank interrupt | |
307 | * - this makes sure that overlay data are updated to | |
308 | * real hardware. | |
309 | */ | |
93bca243 GP |
310 | if (exynos_crtc->ops->wait_for_vblank) |
311 | exynos_crtc->ops->wait_for_vblank(exynos_crtc); | |
080be03d SP |
312 | } |
313 | } | |
f37cd5e8 ID |
314 | |
315 | int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, | |
316 | unsigned int out_type) | |
317 | { | |
318 | struct drm_crtc *crtc; | |
319 | ||
320 | list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { | |
321 | struct exynos_drm_crtc *exynos_crtc; | |
322 | ||
323 | exynos_crtc = to_exynos_crtc(crtc); | |
5d1741ad | 324 | if (exynos_crtc->type == out_type) |
8a326edd | 325 | return exynos_crtc->pipe; |
f37cd5e8 ID |
326 | } |
327 | ||
328 | return -EPERM; | |
329 | } | |
5595d4d8 YC |
330 | |
331 | void exynos_drm_crtc_te_handler(struct drm_crtc *crtc) | |
332 | { | |
93bca243 | 333 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
5595d4d8 | 334 | |
93bca243 GP |
335 | if (exynos_crtc->ops->te_handler) |
336 | exynos_crtc->ops->te_handler(exynos_crtc); | |
5595d4d8 | 337 | } |