Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_drv.c
CommitLineData
1c248b7d
ID
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * Authors:
4 * Inki Dae <inki.dae@samsung.com>
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 *
d81aecb5
ID
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
1c248b7d
ID
12 */
13
af65c804 14#include <linux/pm_runtime.h>
760285e7 15#include <drm/drmP.h>
a379df19
GP
16#include <drm/drm_atomic.h>
17#include <drm/drm_atomic_helper.h>
760285e7 18#include <drm/drm_crtc_helper.h>
1c248b7d 19
f37cd5e8 20#include <linux/component.h>
96f54215 21
1c248b7d
ID
22#include <drm/exynos_drm.h>
23
24#include "exynos_drm_drv.h"
25#include "exynos_drm_crtc.h"
26#include "exynos_drm_fbdev.h"
27#include "exynos_drm_fb.h"
28#include "exynos_drm_gem.h"
864ee9e6 29#include "exynos_drm_plane.h"
b73d1230 30#include "exynos_drm_vidi.h"
d7f1642c 31#include "exynos_drm_g2d.h"
cb471f14 32#include "exynos_drm_ipp.h"
0519f9a1 33#include "exynos_drm_iommu.h"
1c248b7d 34
0edf9936 35#define DRIVER_NAME "exynos"
1c248b7d
ID
36#define DRIVER_DESC "Samsung SoC DRM"
37#define DRIVER_DATE "20110530"
38#define DRIVER_MAJOR 1
39#define DRIVER_MINOR 0
40
a379df19
GP
41struct exynos_atomic_commit {
42 struct work_struct work;
43 struct drm_device *dev;
44 struct drm_atomic_state *state;
45 u32 crtcs;
46};
47
c4533665
GP
48static void exynos_atomic_wait_for_commit(struct drm_atomic_state *state)
49{
50 struct drm_crtc_state *crtc_state;
51 struct drm_crtc *crtc;
52 int i, ret;
53
54 for_each_crtc_in_state(state, crtc, crtc_state, i) {
55 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
56
57 if (!crtc->state->enable)
58 continue;
59
60 ret = drm_crtc_vblank_get(crtc);
61 if (ret)
62 continue;
63
64 exynos_drm_crtc_wait_pending_update(exynos_crtc);
65 drm_crtc_vblank_put(crtc);
66 }
67}
68
a379df19
GP
69static void exynos_atomic_commit_complete(struct exynos_atomic_commit *commit)
70{
71 struct drm_device *dev = commit->dev;
72 struct exynos_drm_private *priv = dev->dev_private;
73 struct drm_atomic_state *state = commit->state;
c4533665
GP
74 struct drm_plane *plane;
75 struct drm_crtc *crtc;
76 struct drm_plane_state *plane_state;
77 struct drm_crtc_state *crtc_state;
78 int i;
a379df19
GP
79
80 drm_atomic_helper_commit_modeset_disables(dev, state);
81
82 drm_atomic_helper_commit_modeset_enables(dev, state);
83
84 /*
85 * Exynos can't update planes with CRTCs and encoders disabled,
86 * its updates routines, specially for FIMD, requires the clocks
87 * to be enabled. So it is necessary to handle the modeset operations
88 * *before* the commit_planes() step, this way it will always
89 * have the relevant clocks enabled to perform the update.
90 */
91
c4533665
GP
92 for_each_crtc_in_state(state, crtc, crtc_state, i) {
93 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
94
95 atomic_set(&exynos_crtc->pending_update, 0);
96 }
97
98 for_each_plane_in_state(state, plane, plane_state, i) {
99 struct exynos_drm_crtc *exynos_crtc =
100 to_exynos_crtc(plane->crtc);
101
102 if (!plane->crtc)
103 continue;
104
105 atomic_inc(&exynos_crtc->pending_update);
106 }
107
aef9dbb8 108 drm_atomic_helper_commit_planes(dev, state, false);
a379df19 109
c4533665 110 exynos_atomic_wait_for_commit(state);
a379df19
GP
111
112 drm_atomic_helper_cleanup_planes(dev, state);
113
114 drm_atomic_state_free(state);
115
116 spin_lock(&priv->lock);
117 priv->pending &= ~commit->crtcs;
118 spin_unlock(&priv->lock);
119
120 wake_up_all(&priv->wait);
121
122 kfree(commit);
123}
124
125static void exynos_drm_atomic_work(struct work_struct *work)
126{
127 struct exynos_atomic_commit *commit = container_of(work,
128 struct exynos_atomic_commit, work);
129
130 exynos_atomic_commit_complete(commit);
131}
132
f43c3596
MS
133static struct device *exynos_drm_get_dma_device(void);
134
1c248b7d
ID
135static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
136{
137 struct exynos_drm_private *private;
6cf27275
GP
138 struct drm_encoder *encoder;
139 unsigned int clone_mask;
140 int cnt, ret;
1c248b7d 141
1c248b7d 142 private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL);
38bb5253 143 if (!private)
1c248b7d 144 return -ENOMEM;
1c248b7d 145
a379df19
GP
146 init_waitqueue_head(&private->wait);
147 spin_lock_init(&private->lock);
148
af65c804 149 dev_set_drvdata(dev->dev, dev);
1c248b7d
ID
150 dev->dev_private = (void *)private;
151
f43c3596
MS
152 /* the first real CRTC device is used for all dma mapping operations */
153 private->dma_dev = exynos_drm_get_dma_device();
154 if (!private->dma_dev) {
155 DRM_ERROR("no device found for DMA mapping operations.\n");
156 ret = -ENODEV;
157 goto err_free_private;
158 }
159 DRM_INFO("Exynos DRM: using %s device for DMA mapping operations\n",
160 dev_name(private->dma_dev));
161
0519f9a1
ID
162 /*
163 * create mapping to manage iommu table and set a pointer to iommu
164 * mapping structure to iommu_mapping of private data.
165 * also this iommu_mapping can be used to check if iommu is supported
166 * or not.
167 */
168 ret = drm_create_iommu_mapping(dev);
169 if (ret < 0) {
170 DRM_ERROR("failed to create iommu mapping.\n");
d2ba65f6 171 goto err_free_private;
0519f9a1
ID
172 }
173
1c248b7d
ID
174 drm_mode_config_init(dev);
175
176 exynos_drm_mode_config_init(dev);
177
d081f566 178 /* setup possible_clones. */
6cf27275
GP
179 cnt = 0;
180 clone_mask = 0;
181 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
182 clone_mask |= (1 << (cnt++));
183
184 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
185 encoder->possible_clones = clone_mask;
d081f566 186
a9a346d6
DV
187 platform_set_drvdata(dev->platformdev, dev);
188
f37cd5e8
ID
189 /* Try to bind all sub drivers. */
190 ret = component_bind_all(dev->dev, dev);
191 if (ret)
c52142e6
AH
192 goto err_mode_config_cleanup;
193
194 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
195 if (ret)
196 goto err_unbind_all;
f37cd5e8 197
d1afe7d4 198 /* Probe non kms sub drivers and virtual display driver. */
f37cd5e8
ID
199 ret = exynos_drm_device_subdrv_probe(dev);
200 if (ret)
c52142e6 201 goto err_cleanup_vblank;
f37cd5e8 202
4ea9526b
GP
203 drm_mode_config_reset(dev);
204
4a3ffedd
JS
205 /*
206 * enable drm irq mode.
207 * - with irq_enabled = true, we can use the vblank feature.
208 *
209 * P.S. note that we wouldn't use drm irq handler but
210 * just specific driver own one instead because
211 * drm framework supports only one irq handler.
212 */
213 dev->irq_enabled = true;
214
3cb6830a
AH
215 /* init kms poll for handling hpd */
216 drm_kms_helper_poll_init(dev);
217
218 /* force connectors detection */
219 drm_helper_hpd_irq_event(dev);
220
1c248b7d
ID
221 return 0;
222
f37cd5e8 223err_cleanup_vblank:
1c248b7d 224 drm_vblank_cleanup(dev);
c52142e6
AH
225err_unbind_all:
226 component_unbind_all(dev->dev, dev);
080be03d
SP
227err_mode_config_cleanup:
228 drm_mode_config_cleanup(dev);
0519f9a1 229 drm_release_iommu_mapping(dev);
d2ba65f6 230err_free_private:
1c248b7d
ID
231 kfree(private);
232
233 return ret;
234}
235
236static int exynos_drm_unload(struct drm_device *dev)
237{
f37cd5e8
ID
238 exynos_drm_device_subdrv_remove(dev);
239
1c248b7d 240 exynos_drm_fbdev_fini(dev);
7db3eba6 241 drm_kms_helper_poll_fini(dev);
0519f9a1 242
9f3dd7db 243 drm_vblank_cleanup(dev);
c52142e6 244 component_unbind_all(dev->dev, dev);
9f3dd7db 245 drm_mode_config_cleanup(dev);
0519f9a1 246 drm_release_iommu_mapping(dev);
1c248b7d 247
9f3dd7db 248 kfree(dev->dev_private);
1c248b7d
ID
249 dev->dev_private = NULL;
250
251 return 0;
252}
253
a379df19
GP
254static int commit_is_pending(struct exynos_drm_private *priv, u32 crtcs)
255{
256 bool pending;
257
258 spin_lock(&priv->lock);
259 pending = priv->pending & crtcs;
260 spin_unlock(&priv->lock);
261
262 return pending;
263}
264
265int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
1b3f09d8 266 bool nonblock)
a379df19
GP
267{
268 struct exynos_drm_private *priv = dev->dev_private;
269 struct exynos_atomic_commit *commit;
270 int i, ret;
271
272 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
273 if (!commit)
274 return -ENOMEM;
275
276 ret = drm_atomic_helper_prepare_planes(dev, state);
277 if (ret) {
278 kfree(commit);
279 return ret;
280 }
281
282 /* This is the point of no return */
283
284 INIT_WORK(&commit->work, exynos_drm_atomic_work);
285 commit->dev = dev;
286 commit->state = state;
287
288 /* Wait until all affected CRTCs have completed previous commits and
289 * mark them as pending.
290 */
291 for (i = 0; i < dev->mode_config.num_crtc; ++i) {
292 if (state->crtcs[i])
293 commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
294 }
295
296 wait_event(priv->wait, !commit_is_pending(priv, commit->crtcs));
297
298 spin_lock(&priv->lock);
299 priv->pending |= commit->crtcs;
300 spin_unlock(&priv->lock);
301
302 drm_atomic_helper_swap_state(dev, state);
303
1b3f09d8 304 if (nonblock)
a379df19
GP
305 schedule_work(&commit->work);
306 else
307 exynos_atomic_commit_complete(commit);
308
309 return 0;
310}
311
9084f7b8
JS
312static int exynos_drm_open(struct drm_device *dev, struct drm_file *file)
313{
d7f1642c 314 struct drm_exynos_file_private *file_priv;
ba3706c0 315 int ret;
d7f1642c 316
d7f1642c
JS
317 file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL);
318 if (!file_priv)
319 return -ENOMEM;
320
d7f1642c 321 file->driver_priv = file_priv;
b2df26c1 322
ba3706c0 323 ret = exynos_drm_subdrv_open(dev, file);
6ca605f7 324 if (ret)
307ceaff 325 goto err_file_priv_free;
ba3706c0 326
6ca605f7 327 return ret;
307ceaff 328
307ceaff 329err_file_priv_free:
6ca605f7
SK
330 kfree(file_priv);
331 file->driver_priv = NULL;
ba3706c0 332 return ret;
9084f7b8
JS
333}
334
ccf4d883 335static void exynos_drm_preclose(struct drm_device *dev,
6f811502 336 struct drm_file *file)
0cbc330e 337{
c74d8eb5
ID
338 struct drm_crtc *crtc;
339
0cbc330e 340 exynos_drm_subdrv_close(dev, file);
c74d8eb5
ID
341
342 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
343 exynos_drm_crtc_cancel_page_flip(crtc, file);
0cbc330e
ID
344}
345
346static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
ccf4d883 347{
53ef299f
ID
348 kfree(file->driver_priv);
349 file->driver_priv = NULL;
350}
351
1c248b7d
ID
352static void exynos_drm_lastclose(struct drm_device *dev)
353{
1c248b7d
ID
354 exynos_drm_fbdev_restore_mode(dev);
355}
356
78b68556 357static const struct vm_operations_struct exynos_drm_gem_vm_ops = {
1c248b7d
ID
358 .fault = exynos_drm_gem_fault,
359 .open = drm_gem_vm_open,
360 .close = drm_gem_vm_close,
361};
362
baa70943 363static const struct drm_ioctl_desc exynos_ioctls[] = {
1c248b7d 364 DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl,
f8c47144 365 DRM_AUTH | DRM_RENDER_ALLOW),
6564c65f
JS
366 DRM_IOCTL_DEF_DRV(EXYNOS_GEM_MAP, exynos_drm_gem_map_ioctl,
367 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 368 DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET, exynos_drm_gem_get_ioctl,
f8c47144 369 DRM_RENDER_ALLOW),
74f230d2 370 DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION, vidi_connection_ioctl,
f8c47144 371 DRM_AUTH),
74f230d2 372 DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER, exynos_g2d_get_ver_ioctl,
f8c47144 373 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 374 DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST, exynos_g2d_set_cmdlist_ioctl,
f8c47144 375 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 376 DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC, exynos_g2d_exec_ioctl,
f8c47144 377 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 378 DRM_IOCTL_DEF_DRV(EXYNOS_IPP_GET_PROPERTY, exynos_drm_ipp_get_property,
f8c47144 379 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 380 DRM_IOCTL_DEF_DRV(EXYNOS_IPP_SET_PROPERTY, exynos_drm_ipp_set_property,
f8c47144 381 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 382 DRM_IOCTL_DEF_DRV(EXYNOS_IPP_QUEUE_BUF, exynos_drm_ipp_queue_buf,
f8c47144 383 DRM_AUTH | DRM_RENDER_ALLOW),
74f230d2 384 DRM_IOCTL_DEF_DRV(EXYNOS_IPP_CMD_CTRL, exynos_drm_ipp_cmd_ctrl,
f8c47144 385 DRM_AUTH | DRM_RENDER_ALLOW),
1c248b7d
ID
386};
387
ac2bdf73
JS
388static const struct file_operations exynos_drm_driver_fops = {
389 .owner = THIS_MODULE,
390 .open = drm_open,
391 .mmap = exynos_drm_gem_mmap,
392 .poll = drm_poll,
393 .read = drm_read,
394 .unlocked_ioctl = drm_ioctl,
804d74ab
KP
395#ifdef CONFIG_COMPAT
396 .compat_ioctl = drm_compat_ioctl,
397#endif
ac2bdf73
JS
398 .release = drm_release,
399};
400
1c248b7d 401static struct drm_driver exynos_drm_driver = {
c8c38ccf 402 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME
74f230d2 403 | DRIVER_ATOMIC | DRIVER_RENDER,
1c248b7d
ID
404 .load = exynos_drm_load,
405 .unload = exynos_drm_unload,
9084f7b8 406 .open = exynos_drm_open,
ccf4d883 407 .preclose = exynos_drm_preclose,
1c248b7d 408 .lastclose = exynos_drm_lastclose,
53ef299f 409 .postclose = exynos_drm_postclose,
915b4d11 410 .set_busid = drm_platform_set_busid,
b44f8408 411 .get_vblank_counter = drm_vblank_no_hw_counter,
1c248b7d
ID
412 .enable_vblank = exynos_drm_crtc_enable_vblank,
413 .disable_vblank = exynos_drm_crtc_disable_vblank,
201f9b97 414 .gem_free_object_unlocked = exynos_drm_gem_free_object,
1c248b7d
ID
415 .gem_vm_ops = &exynos_drm_gem_vm_ops,
416 .dumb_create = exynos_drm_gem_dumb_create,
417 .dumb_map_offset = exynos_drm_gem_dumb_map_offset,
43387b37 418 .dumb_destroy = drm_gem_dumb_destroy,
b2df26c1
ID
419 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
420 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
01ed50dd
JS
421 .gem_prime_export = drm_gem_prime_export,
422 .gem_prime_import = drm_gem_prime_import,
423 .gem_prime_get_sg_table = exynos_drm_gem_prime_get_sg_table,
424 .gem_prime_import_sg_table = exynos_drm_gem_prime_import_sg_table,
425 .gem_prime_vmap = exynos_drm_gem_prime_vmap,
426 .gem_prime_vunmap = exynos_drm_gem_prime_vunmap,
5a0202f7 427 .gem_prime_mmap = exynos_drm_gem_prime_mmap,
1c248b7d 428 .ioctls = exynos_ioctls,
baa70943 429 .num_ioctls = ARRAY_SIZE(exynos_ioctls),
ac2bdf73 430 .fops = &exynos_drm_driver_fops,
1c248b7d
ID
431 .name = DRIVER_NAME,
432 .desc = DRIVER_DESC,
433 .date = DRIVER_DATE,
434 .major = DRIVER_MAJOR,
435 .minor = DRIVER_MINOR,
436};
437
af65c804 438#ifdef CONFIG_PM_SLEEP
082ca313 439static int exynos_drm_suspend(struct device *dev)
af65c804
SP
440{
441 struct drm_device *drm_dev = dev_get_drvdata(dev);
082ca313 442 struct drm_connector *connector;
af65c804 443
d50a1907 444 if (pm_runtime_suspended(dev) || !drm_dev)
af65c804
SP
445 return 0;
446
082ca313
AH
447 drm_modeset_lock_all(drm_dev);
448 drm_for_each_connector(connector, drm_dev) {
449 int old_dpms = connector->dpms;
450
451 if (connector->funcs->dpms)
452 connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF);
453
454 /* Set the old mode back to the connector for resume */
455 connector->dpms = old_dpms;
456 }
457 drm_modeset_unlock_all(drm_dev);
458
459 return 0;
af65c804
SP
460}
461
082ca313 462static int exynos_drm_resume(struct device *dev)
af65c804
SP
463{
464 struct drm_device *drm_dev = dev_get_drvdata(dev);
082ca313 465 struct drm_connector *connector;
af65c804 466
d50a1907 467 if (pm_runtime_suspended(dev) || !drm_dev)
af65c804
SP
468 return 0;
469
082ca313
AH
470 drm_modeset_lock_all(drm_dev);
471 drm_for_each_connector(connector, drm_dev) {
472 if (connector->funcs->dpms) {
473 int dpms = connector->dpms;
474
475 connector->dpms = DRM_MODE_DPMS_OFF;
476 connector->funcs->dpms(connector, dpms);
477 }
478 }
479 drm_modeset_unlock_all(drm_dev);
480
481 return 0;
af65c804
SP
482}
483#endif
484
af65c804 485static const struct dev_pm_ops exynos_drm_pm_ops = {
082ca313 486 SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_suspend, exynos_drm_resume)
af65c804
SP
487};
488
86650408
AH
489/* forward declaration */
490static struct platform_driver exynos_drm_platform_driver;
f37cd5e8 491
a5fb26cd
MS
492struct exynos_drm_driver_info {
493 struct platform_driver *driver;
494 unsigned int flags;
495};
496
497#define DRM_COMPONENT_DRIVER BIT(0) /* supports component framework */
498#define DRM_VIRTUAL_DEVICE BIT(1) /* create virtual platform device */
f43c3596 499#define DRM_DMA_DEVICE BIT(2) /* can be used for dma allocations */
a5fb26cd
MS
500
501#define DRV_PTR(drv, cond) (IS_ENABLED(cond) ? &drv : NULL)
502
86650408
AH
503/*
504 * Connector drivers should not be placed before associated crtc drivers,
505 * because connector requires pipe number of its crtc during initialization.
506 */
a5fb26cd
MS
507static struct exynos_drm_driver_info exynos_drm_drivers[] = {
508 {
509 DRV_PTR(fimd_driver, CONFIG_DRM_EXYNOS_FIMD),
f43c3596 510 DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE
a5fb26cd
MS
511 }, {
512 DRV_PTR(exynos5433_decon_driver, CONFIG_DRM_EXYNOS5433_DECON),
f43c3596 513 DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE
a5fb26cd
MS
514 }, {
515 DRV_PTR(decon_driver, CONFIG_DRM_EXYNOS7_DECON),
f43c3596 516 DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE
a5fb26cd
MS
517 }, {
518 DRV_PTR(mixer_driver, CONFIG_DRM_EXYNOS_MIXER),
f43c3596 519 DRM_COMPONENT_DRIVER | DRM_DMA_DEVICE
a5fb26cd
MS
520 }, {
521 DRV_PTR(mic_driver, CONFIG_DRM_EXYNOS_MIC),
522 DRM_COMPONENT_DRIVER
523 }, {
524 DRV_PTR(dp_driver, CONFIG_DRM_EXYNOS_DP),
525 DRM_COMPONENT_DRIVER
526 }, {
527 DRV_PTR(dsi_driver, CONFIG_DRM_EXYNOS_DSI),
528 DRM_COMPONENT_DRIVER
529 }, {
530 DRV_PTR(hdmi_driver, CONFIG_DRM_EXYNOS_HDMI),
531 DRM_COMPONENT_DRIVER
532 }, {
533 DRV_PTR(vidi_driver, CONFIG_DRM_EXYNOS_VIDI),
534 DRM_COMPONENT_DRIVER | DRM_VIRTUAL_DEVICE
535 }, {
536 DRV_PTR(g2d_driver, CONFIG_DRM_EXYNOS_G2D),
537 }, {
538 DRV_PTR(fimc_driver, CONFIG_DRM_EXYNOS_FIMC),
539 }, {
540 DRV_PTR(rotator_driver, CONFIG_DRM_EXYNOS_ROTATOR),
541 }, {
542 DRV_PTR(gsc_driver, CONFIG_DRM_EXYNOS_GSC),
543 }, {
544 DRV_PTR(ipp_driver, CONFIG_DRM_EXYNOS_IPP),
545 DRM_VIRTUAL_DEVICE
546 }, {
547 &exynos_drm_platform_driver,
548 DRM_VIRTUAL_DEVICE
549 }
86650408 550};
f37cd5e8 551
53c5558d 552static int compare_dev(struct device *dev, void *data)
f37cd5e8
ID
553{
554 return dev == (struct device *)data;
555}
556
53c5558d 557static struct component_match *exynos_drm_match_add(struct device *dev)
f37cd5e8 558{
53c5558d 559 struct component_match *match = NULL;
86650408 560 int i;
f37cd5e8 561
a5fb26cd
MS
562 for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) {
563 struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
86650408 564 struct device *p = NULL, *d;
f7c2f36f 565
a5fb26cd
MS
566 if (!info->driver || !(info->flags & DRM_COMPONENT_DRIVER))
567 continue;
568
569 while ((d = bus_find_device(&platform_bus_type, p,
570 &info->driver->driver,
86650408
AH
571 (void *)platform_bus_type.match))) {
572 put_device(p);
573 component_match_add(dev, &match, compare_dev, d);
574 p = d;
df5225bc 575 }
86650408 576 put_device(p);
f37cd5e8
ID
577 }
578
86650408 579 return match ?: ERR_PTR(-ENODEV);
f37cd5e8
ID
580}
581
582static int exynos_drm_bind(struct device *dev)
583{
f37cd5e8
ID
584 return drm_platform_init(&exynos_drm_driver, to_platform_device(dev));
585}
586
587static void exynos_drm_unbind(struct device *dev)
588{
589 drm_put_dev(dev_get_drvdata(dev));
590}
591
592static const struct component_master_ops exynos_drm_ops = {
f37cd5e8
ID
593 .bind = exynos_drm_bind,
594 .unbind = exynos_drm_unbind,
1c248b7d
ID
595};
596
417133e4
AH
597static int exynos_drm_platform_probe(struct platform_device *pdev)
598{
599 struct component_match *match;
600
601 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
602 exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls);
603
604 match = exynos_drm_match_add(&pdev->dev);
605 if (IS_ERR(match))
606 return PTR_ERR(match);
607
608 return component_master_add_with_match(&pdev->dev, &exynos_drm_ops,
609 match);
610}
611
612static int exynos_drm_platform_remove(struct platform_device *pdev)
613{
614 component_master_del(&pdev->dev, &exynos_drm_ops);
615 return 0;
616}
617
618static struct platform_driver exynos_drm_platform_driver = {
619 .probe = exynos_drm_platform_probe,
620 .remove = exynos_drm_platform_remove,
621 .driver = {
622 .name = "exynos-drm",
623 .pm = &exynos_drm_pm_ops,
624 },
625};
626
f43c3596
MS
627static struct device *exynos_drm_get_dma_device(void)
628{
629 int i;
630
631 for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) {
632 struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
633 struct device *dev;
634
635 if (!info->driver || !(info->flags & DRM_DMA_DEVICE))
636 continue;
637
638 while ((dev = bus_find_device(&platform_bus_type, NULL,
639 &info->driver->driver,
640 (void *)platform_bus_type.match))) {
641 put_device(dev);
642 return dev;
643 }
644 }
645 return NULL;
646}
647
417133e4 648static void exynos_drm_unregister_devices(void)
72390677 649{
a5fb26cd
MS
650 int i;
651
652 for (i = ARRAY_SIZE(exynos_drm_drivers) - 1; i >= 0; --i) {
653 struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
654 struct device *dev;
25928a39 655
a5fb26cd
MS
656 if (!info->driver || !(info->flags & DRM_VIRTUAL_DEVICE))
657 continue;
658
659 while ((dev = bus_find_device(&platform_bus_type, NULL,
660 &info->driver->driver,
661 (void *)platform_bus_type.match))) {
662 put_device(dev);
663 platform_device_unregister(to_platform_device(dev));
664 }
417133e4
AH
665 }
666}
7eb8f069 667
417133e4
AH
668static int exynos_drm_register_devices(void)
669{
a5fb26cd 670 struct platform_device *pdev;
417133e4
AH
671 int i;
672
a5fb26cd
MS
673 for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) {
674 struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
417133e4 675
a5fb26cd 676 if (!info->driver || !(info->flags & DRM_VIRTUAL_DEVICE))
417133e4 677 continue;
417133e4 678
a5fb26cd
MS
679 pdev = platform_device_register_simple(
680 info->driver->driver.name, -1, NULL, 0);
681 if (IS_ERR(pdev))
682 goto fail;
72390677 683 }
f37cd5e8 684
417133e4 685 return 0;
a5fb26cd
MS
686fail:
687 exynos_drm_unregister_devices();
688 return PTR_ERR(pdev);
1c248b7d
ID
689}
690
a5fb26cd 691static void exynos_drm_unregister_drivers(void)
1c248b7d 692{
a5fb26cd 693 int i;
417133e4 694
a5fb26cd
MS
695 for (i = ARRAY_SIZE(exynos_drm_drivers) - 1; i >= 0; --i) {
696 struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
417133e4 697
a5fb26cd 698 if (!info->driver)
417133e4
AH
699 continue;
700
a5fb26cd 701 platform_driver_unregister(info->driver);
417133e4 702 }
f37cd5e8
ID
703}
704
a5fb26cd 705static int exynos_drm_register_drivers(void)
417133e4 706{
a5fb26cd 707 int i, ret;
417133e4 708
a5fb26cd
MS
709 for (i = 0; i < ARRAY_SIZE(exynos_drm_drivers); ++i) {
710 struct exynos_drm_driver_info *info = &exynos_drm_drivers[i];
417133e4 711
a5fb26cd
MS
712 if (!info->driver)
713 continue;
417133e4 714
a5fb26cd
MS
715 ret = platform_driver_register(info->driver);
716 if (ret)
717 goto fail;
718 }
719 return 0;
720fail:
721 exynos_drm_unregister_drivers();
722 return ret;
417133e4
AH
723}
724
f37cd5e8
ID
725static int exynos_drm_init(void)
726{
e3b9e460 727 int ret;
f37cd5e8 728
417133e4
AH
729 ret = exynos_drm_register_devices();
730 if (ret)
731 return ret;
820687be 732
a5fb26cd 733 ret = exynos_drm_register_drivers();
417133e4
AH
734 if (ret)
735 goto err_unregister_pdevs;
f37cd5e8 736
f37cd5e8
ID
737 return 0;
738
417133e4
AH
739err_unregister_pdevs:
740 exynos_drm_unregister_devices();
f37cd5e8
ID
741
742 return ret;
743}
744
745static void exynos_drm_exit(void)
746{
a5fb26cd 747 exynos_drm_unregister_drivers();
417133e4 748 exynos_drm_unregister_devices();
1c248b7d
ID
749}
750
751module_init(exynos_drm_init);
752module_exit(exynos_drm_exit);
753
754MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
755MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
756MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
757MODULE_DESCRIPTION("Samsung SoC DRM Driver");
758MODULE_LICENSE("GPL");
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