Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * Authors: | |
4 | * Inki Dae <inki.dae@samsung.com> | |
5 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
6 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
7 | * | |
d81aecb5 ID |
8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
1c248b7d ID |
12 | */ |
13 | ||
af65c804 | 14 | #include <linux/pm_runtime.h> |
760285e7 | 15 | #include <drm/drmP.h> |
a379df19 GP |
16 | #include <drm/drm_atomic.h> |
17 | #include <drm/drm_atomic_helper.h> | |
760285e7 | 18 | #include <drm/drm_crtc_helper.h> |
1c248b7d | 19 | |
f37cd5e8 | 20 | #include <linux/component.h> |
96f54215 | 21 | |
1c248b7d ID |
22 | #include <drm/exynos_drm.h> |
23 | ||
24 | #include "exynos_drm_drv.h" | |
25 | #include "exynos_drm_crtc.h" | |
26 | #include "exynos_drm_fbdev.h" | |
27 | #include "exynos_drm_fb.h" | |
28 | #include "exynos_drm_gem.h" | |
864ee9e6 | 29 | #include "exynos_drm_plane.h" |
b73d1230 | 30 | #include "exynos_drm_vidi.h" |
d7f1642c | 31 | #include "exynos_drm_g2d.h" |
cb471f14 | 32 | #include "exynos_drm_ipp.h" |
0519f9a1 | 33 | #include "exynos_drm_iommu.h" |
1c248b7d | 34 | |
0edf9936 | 35 | #define DRIVER_NAME "exynos" |
1c248b7d ID |
36 | #define DRIVER_DESC "Samsung SoC DRM" |
37 | #define DRIVER_DATE "20110530" | |
38 | #define DRIVER_MAJOR 1 | |
39 | #define DRIVER_MINOR 0 | |
40 | ||
a379df19 GP |
41 | struct exynos_atomic_commit { |
42 | struct work_struct work; | |
43 | struct drm_device *dev; | |
44 | struct drm_atomic_state *state; | |
45 | u32 crtcs; | |
46 | }; | |
47 | ||
c4533665 GP |
48 | static void exynos_atomic_wait_for_commit(struct drm_atomic_state *state) |
49 | { | |
50 | struct drm_crtc_state *crtc_state; | |
51 | struct drm_crtc *crtc; | |
52 | int i, ret; | |
53 | ||
54 | for_each_crtc_in_state(state, crtc, crtc_state, i) { | |
55 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
56 | ||
57 | if (!crtc->state->enable) | |
58 | continue; | |
59 | ||
60 | ret = drm_crtc_vblank_get(crtc); | |
61 | if (ret) | |
62 | continue; | |
63 | ||
64 | exynos_drm_crtc_wait_pending_update(exynos_crtc); | |
65 | drm_crtc_vblank_put(crtc); | |
66 | } | |
67 | } | |
68 | ||
a379df19 GP |
69 | static void exynos_atomic_commit_complete(struct exynos_atomic_commit *commit) |
70 | { | |
71 | struct drm_device *dev = commit->dev; | |
72 | struct exynos_drm_private *priv = dev->dev_private; | |
73 | struct drm_atomic_state *state = commit->state; | |
c4533665 GP |
74 | struct drm_plane *plane; |
75 | struct drm_crtc *crtc; | |
76 | struct drm_plane_state *plane_state; | |
77 | struct drm_crtc_state *crtc_state; | |
78 | int i; | |
a379df19 GP |
79 | |
80 | drm_atomic_helper_commit_modeset_disables(dev, state); | |
81 | ||
82 | drm_atomic_helper_commit_modeset_enables(dev, state); | |
83 | ||
84 | /* | |
85 | * Exynos can't update planes with CRTCs and encoders disabled, | |
86 | * its updates routines, specially for FIMD, requires the clocks | |
87 | * to be enabled. So it is necessary to handle the modeset operations | |
88 | * *before* the commit_planes() step, this way it will always | |
89 | * have the relevant clocks enabled to perform the update. | |
90 | */ | |
91 | ||
c4533665 GP |
92 | for_each_crtc_in_state(state, crtc, crtc_state, i) { |
93 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
94 | ||
95 | atomic_set(&exynos_crtc->pending_update, 0); | |
96 | } | |
97 | ||
98 | for_each_plane_in_state(state, plane, plane_state, i) { | |
99 | struct exynos_drm_crtc *exynos_crtc = | |
100 | to_exynos_crtc(plane->crtc); | |
101 | ||
102 | if (!plane->crtc) | |
103 | continue; | |
104 | ||
105 | atomic_inc(&exynos_crtc->pending_update); | |
106 | } | |
107 | ||
aef9dbb8 | 108 | drm_atomic_helper_commit_planes(dev, state, false); |
a379df19 | 109 | |
c4533665 | 110 | exynos_atomic_wait_for_commit(state); |
a379df19 GP |
111 | |
112 | drm_atomic_helper_cleanup_planes(dev, state); | |
113 | ||
114 | drm_atomic_state_free(state); | |
115 | ||
116 | spin_lock(&priv->lock); | |
117 | priv->pending &= ~commit->crtcs; | |
118 | spin_unlock(&priv->lock); | |
119 | ||
120 | wake_up_all(&priv->wait); | |
121 | ||
122 | kfree(commit); | |
123 | } | |
124 | ||
125 | static void exynos_drm_atomic_work(struct work_struct *work) | |
126 | { | |
127 | struct exynos_atomic_commit *commit = container_of(work, | |
128 | struct exynos_atomic_commit, work); | |
129 | ||
130 | exynos_atomic_commit_complete(commit); | |
131 | } | |
132 | ||
1c248b7d ID |
133 | static int exynos_drm_load(struct drm_device *dev, unsigned long flags) |
134 | { | |
135 | struct exynos_drm_private *private; | |
6cf27275 GP |
136 | struct drm_encoder *encoder; |
137 | unsigned int clone_mask; | |
138 | int cnt, ret; | |
1c248b7d | 139 | |
1c248b7d | 140 | private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL); |
38bb5253 | 141 | if (!private) |
1c248b7d | 142 | return -ENOMEM; |
1c248b7d | 143 | |
a379df19 GP |
144 | init_waitqueue_head(&private->wait); |
145 | spin_lock_init(&private->lock); | |
146 | ||
af65c804 | 147 | dev_set_drvdata(dev->dev, dev); |
1c248b7d ID |
148 | dev->dev_private = (void *)private; |
149 | ||
0519f9a1 ID |
150 | /* |
151 | * create mapping to manage iommu table and set a pointer to iommu | |
152 | * mapping structure to iommu_mapping of private data. | |
153 | * also this iommu_mapping can be used to check if iommu is supported | |
154 | * or not. | |
155 | */ | |
156 | ret = drm_create_iommu_mapping(dev); | |
157 | if (ret < 0) { | |
158 | DRM_ERROR("failed to create iommu mapping.\n"); | |
d2ba65f6 | 159 | goto err_free_private; |
0519f9a1 ID |
160 | } |
161 | ||
1c248b7d ID |
162 | drm_mode_config_init(dev); |
163 | ||
164 | exynos_drm_mode_config_init(dev); | |
165 | ||
d081f566 | 166 | /* setup possible_clones. */ |
6cf27275 GP |
167 | cnt = 0; |
168 | clone_mask = 0; | |
169 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | |
170 | clone_mask |= (1 << (cnt++)); | |
171 | ||
172 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | |
173 | encoder->possible_clones = clone_mask; | |
d081f566 | 174 | |
a9a346d6 DV |
175 | platform_set_drvdata(dev->platformdev, dev); |
176 | ||
f37cd5e8 ID |
177 | /* Try to bind all sub drivers. */ |
178 | ret = component_bind_all(dev->dev, dev); | |
179 | if (ret) | |
c52142e6 AH |
180 | goto err_mode_config_cleanup; |
181 | ||
182 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
183 | if (ret) | |
184 | goto err_unbind_all; | |
f37cd5e8 | 185 | |
d1afe7d4 | 186 | /* Probe non kms sub drivers and virtual display driver. */ |
f37cd5e8 ID |
187 | ret = exynos_drm_device_subdrv_probe(dev); |
188 | if (ret) | |
c52142e6 | 189 | goto err_cleanup_vblank; |
f37cd5e8 | 190 | |
4ea9526b GP |
191 | drm_mode_config_reset(dev); |
192 | ||
4a3ffedd JS |
193 | /* |
194 | * enable drm irq mode. | |
195 | * - with irq_enabled = true, we can use the vblank feature. | |
196 | * | |
197 | * P.S. note that we wouldn't use drm irq handler but | |
198 | * just specific driver own one instead because | |
199 | * drm framework supports only one irq handler. | |
200 | */ | |
201 | dev->irq_enabled = true; | |
202 | ||
203 | /* | |
204 | * with vblank_disable_allowed = true, vblank interrupt will be disabled | |
205 | * by drm timer once a current process gives up ownership of | |
206 | * vblank event.(after drm_vblank_put function is called) | |
207 | */ | |
208 | dev->vblank_disable_allowed = true; | |
209 | ||
3cb6830a AH |
210 | /* init kms poll for handling hpd */ |
211 | drm_kms_helper_poll_init(dev); | |
212 | ||
213 | /* force connectors detection */ | |
214 | drm_helper_hpd_irq_event(dev); | |
215 | ||
1c248b7d ID |
216 | return 0; |
217 | ||
f37cd5e8 | 218 | err_cleanup_vblank: |
1c248b7d | 219 | drm_vblank_cleanup(dev); |
c52142e6 AH |
220 | err_unbind_all: |
221 | component_unbind_all(dev->dev, dev); | |
080be03d SP |
222 | err_mode_config_cleanup: |
223 | drm_mode_config_cleanup(dev); | |
0519f9a1 | 224 | drm_release_iommu_mapping(dev); |
d2ba65f6 | 225 | err_free_private: |
1c248b7d ID |
226 | kfree(private); |
227 | ||
228 | return ret; | |
229 | } | |
230 | ||
231 | static int exynos_drm_unload(struct drm_device *dev) | |
232 | { | |
f37cd5e8 ID |
233 | exynos_drm_device_subdrv_remove(dev); |
234 | ||
1c248b7d | 235 | exynos_drm_fbdev_fini(dev); |
7db3eba6 | 236 | drm_kms_helper_poll_fini(dev); |
0519f9a1 | 237 | |
9f3dd7db | 238 | drm_vblank_cleanup(dev); |
c52142e6 | 239 | component_unbind_all(dev->dev, dev); |
9f3dd7db | 240 | drm_mode_config_cleanup(dev); |
0519f9a1 | 241 | drm_release_iommu_mapping(dev); |
1c248b7d | 242 | |
9f3dd7db | 243 | kfree(dev->dev_private); |
1c248b7d ID |
244 | dev->dev_private = NULL; |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
a379df19 GP |
249 | static int commit_is_pending(struct exynos_drm_private *priv, u32 crtcs) |
250 | { | |
251 | bool pending; | |
252 | ||
253 | spin_lock(&priv->lock); | |
254 | pending = priv->pending & crtcs; | |
255 | spin_unlock(&priv->lock); | |
256 | ||
257 | return pending; | |
258 | } | |
259 | ||
260 | int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state, | |
261 | bool async) | |
262 | { | |
263 | struct exynos_drm_private *priv = dev->dev_private; | |
264 | struct exynos_atomic_commit *commit; | |
265 | int i, ret; | |
266 | ||
267 | commit = kzalloc(sizeof(*commit), GFP_KERNEL); | |
268 | if (!commit) | |
269 | return -ENOMEM; | |
270 | ||
271 | ret = drm_atomic_helper_prepare_planes(dev, state); | |
272 | if (ret) { | |
273 | kfree(commit); | |
274 | return ret; | |
275 | } | |
276 | ||
277 | /* This is the point of no return */ | |
278 | ||
279 | INIT_WORK(&commit->work, exynos_drm_atomic_work); | |
280 | commit->dev = dev; | |
281 | commit->state = state; | |
282 | ||
283 | /* Wait until all affected CRTCs have completed previous commits and | |
284 | * mark them as pending. | |
285 | */ | |
286 | for (i = 0; i < dev->mode_config.num_crtc; ++i) { | |
287 | if (state->crtcs[i]) | |
288 | commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]); | |
289 | } | |
290 | ||
291 | wait_event(priv->wait, !commit_is_pending(priv, commit->crtcs)); | |
292 | ||
293 | spin_lock(&priv->lock); | |
294 | priv->pending |= commit->crtcs; | |
295 | spin_unlock(&priv->lock); | |
296 | ||
297 | drm_atomic_helper_swap_state(dev, state); | |
298 | ||
299 | if (async) | |
300 | schedule_work(&commit->work); | |
301 | else | |
302 | exynos_atomic_commit_complete(commit); | |
303 | ||
304 | return 0; | |
305 | } | |
306 | ||
9084f7b8 JS |
307 | static int exynos_drm_open(struct drm_device *dev, struct drm_file *file) |
308 | { | |
d7f1642c | 309 | struct drm_exynos_file_private *file_priv; |
ba3706c0 | 310 | int ret; |
d7f1642c | 311 | |
d7f1642c JS |
312 | file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL); |
313 | if (!file_priv) | |
314 | return -ENOMEM; | |
315 | ||
d7f1642c | 316 | file->driver_priv = file_priv; |
b2df26c1 | 317 | |
ba3706c0 | 318 | ret = exynos_drm_subdrv_open(dev, file); |
6ca605f7 | 319 | if (ret) |
307ceaff | 320 | goto err_file_priv_free; |
ba3706c0 | 321 | |
6ca605f7 | 322 | return ret; |
307ceaff | 323 | |
307ceaff | 324 | err_file_priv_free: |
6ca605f7 SK |
325 | kfree(file_priv); |
326 | file->driver_priv = NULL; | |
ba3706c0 | 327 | return ret; |
9084f7b8 JS |
328 | } |
329 | ||
ccf4d883 | 330 | static void exynos_drm_preclose(struct drm_device *dev, |
6f811502 | 331 | struct drm_file *file) |
0cbc330e ID |
332 | { |
333 | exynos_drm_subdrv_close(dev, file); | |
334 | } | |
335 | ||
336 | static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file) | |
ccf4d883 | 337 | { |
0cbc330e | 338 | struct drm_pending_event *e, *et; |
3ab09435 JS |
339 | unsigned long flags; |
340 | ||
0cbc330e ID |
341 | if (!file->driver_priv) |
342 | return; | |
343 | ||
3ab09435 | 344 | spin_lock_irqsave(&dev->event_lock, flags); |
0cbc330e ID |
345 | /* Release all events handled by page flip handler but not freed. */ |
346 | list_for_each_entry_safe(e, et, &file->event_list, link) { | |
347 | list_del(&e->link); | |
348 | e->destroy(e); | |
349 | } | |
350 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
ccf4d883 | 351 | |
53ef299f ID |
352 | kfree(file->driver_priv); |
353 | file->driver_priv = NULL; | |
354 | } | |
355 | ||
1c248b7d ID |
356 | static void exynos_drm_lastclose(struct drm_device *dev) |
357 | { | |
1c248b7d ID |
358 | exynos_drm_fbdev_restore_mode(dev); |
359 | } | |
360 | ||
78b68556 | 361 | static const struct vm_operations_struct exynos_drm_gem_vm_ops = { |
1c248b7d ID |
362 | .fault = exynos_drm_gem_fault, |
363 | .open = drm_gem_vm_open, | |
364 | .close = drm_gem_vm_close, | |
365 | }; | |
366 | ||
baa70943 | 367 | static const struct drm_ioctl_desc exynos_ioctls[] = { |
1c248b7d | 368 | DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl, |
f8c47144 | 369 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 370 | DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET, exynos_drm_gem_get_ioctl, |
f8c47144 | 371 | DRM_RENDER_ALLOW), |
74f230d2 | 372 | DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION, vidi_connection_ioctl, |
f8c47144 | 373 | DRM_AUTH), |
74f230d2 | 374 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER, exynos_g2d_get_ver_ioctl, |
f8c47144 | 375 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 376 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST, exynos_g2d_set_cmdlist_ioctl, |
f8c47144 | 377 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 378 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC, exynos_g2d_exec_ioctl, |
f8c47144 | 379 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 380 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_GET_PROPERTY, exynos_drm_ipp_get_property, |
f8c47144 | 381 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 382 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_SET_PROPERTY, exynos_drm_ipp_set_property, |
f8c47144 | 383 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 384 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_QUEUE_BUF, exynos_drm_ipp_queue_buf, |
f8c47144 | 385 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 386 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_CMD_CTRL, exynos_drm_ipp_cmd_ctrl, |
f8c47144 | 387 | DRM_AUTH | DRM_RENDER_ALLOW), |
1c248b7d ID |
388 | }; |
389 | ||
ac2bdf73 JS |
390 | static const struct file_operations exynos_drm_driver_fops = { |
391 | .owner = THIS_MODULE, | |
392 | .open = drm_open, | |
393 | .mmap = exynos_drm_gem_mmap, | |
394 | .poll = drm_poll, | |
395 | .read = drm_read, | |
396 | .unlocked_ioctl = drm_ioctl, | |
804d74ab KP |
397 | #ifdef CONFIG_COMPAT |
398 | .compat_ioctl = drm_compat_ioctl, | |
399 | #endif | |
ac2bdf73 JS |
400 | .release = drm_release, |
401 | }; | |
402 | ||
1c248b7d | 403 | static struct drm_driver exynos_drm_driver = { |
c8c38ccf | 404 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
74f230d2 | 405 | | DRIVER_ATOMIC | DRIVER_RENDER, |
1c248b7d ID |
406 | .load = exynos_drm_load, |
407 | .unload = exynos_drm_unload, | |
9084f7b8 | 408 | .open = exynos_drm_open, |
ccf4d883 | 409 | .preclose = exynos_drm_preclose, |
1c248b7d | 410 | .lastclose = exynos_drm_lastclose, |
53ef299f | 411 | .postclose = exynos_drm_postclose, |
915b4d11 | 412 | .set_busid = drm_platform_set_busid, |
b44f8408 | 413 | .get_vblank_counter = drm_vblank_no_hw_counter, |
1c248b7d ID |
414 | .enable_vblank = exynos_drm_crtc_enable_vblank, |
415 | .disable_vblank = exynos_drm_crtc_disable_vblank, | |
1c248b7d ID |
416 | .gem_free_object = exynos_drm_gem_free_object, |
417 | .gem_vm_ops = &exynos_drm_gem_vm_ops, | |
418 | .dumb_create = exynos_drm_gem_dumb_create, | |
419 | .dumb_map_offset = exynos_drm_gem_dumb_map_offset, | |
43387b37 | 420 | .dumb_destroy = drm_gem_dumb_destroy, |
b2df26c1 ID |
421 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
422 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
01ed50dd JS |
423 | .gem_prime_export = drm_gem_prime_export, |
424 | .gem_prime_import = drm_gem_prime_import, | |
425 | .gem_prime_get_sg_table = exynos_drm_gem_prime_get_sg_table, | |
426 | .gem_prime_import_sg_table = exynos_drm_gem_prime_import_sg_table, | |
427 | .gem_prime_vmap = exynos_drm_gem_prime_vmap, | |
428 | .gem_prime_vunmap = exynos_drm_gem_prime_vunmap, | |
1c248b7d | 429 | .ioctls = exynos_ioctls, |
baa70943 | 430 | .num_ioctls = ARRAY_SIZE(exynos_ioctls), |
ac2bdf73 | 431 | .fops = &exynos_drm_driver_fops, |
1c248b7d ID |
432 | .name = DRIVER_NAME, |
433 | .desc = DRIVER_DESC, | |
434 | .date = DRIVER_DATE, | |
435 | .major = DRIVER_MAJOR, | |
436 | .minor = DRIVER_MINOR, | |
437 | }; | |
438 | ||
af65c804 | 439 | #ifdef CONFIG_PM_SLEEP |
082ca313 | 440 | static int exynos_drm_suspend(struct device *dev) |
af65c804 SP |
441 | { |
442 | struct drm_device *drm_dev = dev_get_drvdata(dev); | |
082ca313 | 443 | struct drm_connector *connector; |
af65c804 | 444 | |
d50a1907 | 445 | if (pm_runtime_suspended(dev) || !drm_dev) |
af65c804 SP |
446 | return 0; |
447 | ||
082ca313 AH |
448 | drm_modeset_lock_all(drm_dev); |
449 | drm_for_each_connector(connector, drm_dev) { | |
450 | int old_dpms = connector->dpms; | |
451 | ||
452 | if (connector->funcs->dpms) | |
453 | connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF); | |
454 | ||
455 | /* Set the old mode back to the connector for resume */ | |
456 | connector->dpms = old_dpms; | |
457 | } | |
458 | drm_modeset_unlock_all(drm_dev); | |
459 | ||
460 | return 0; | |
af65c804 SP |
461 | } |
462 | ||
082ca313 | 463 | static int exynos_drm_resume(struct device *dev) |
af65c804 SP |
464 | { |
465 | struct drm_device *drm_dev = dev_get_drvdata(dev); | |
082ca313 | 466 | struct drm_connector *connector; |
af65c804 | 467 | |
d50a1907 | 468 | if (pm_runtime_suspended(dev) || !drm_dev) |
af65c804 SP |
469 | return 0; |
470 | ||
082ca313 AH |
471 | drm_modeset_lock_all(drm_dev); |
472 | drm_for_each_connector(connector, drm_dev) { | |
473 | if (connector->funcs->dpms) { | |
474 | int dpms = connector->dpms; | |
475 | ||
476 | connector->dpms = DRM_MODE_DPMS_OFF; | |
477 | connector->funcs->dpms(connector, dpms); | |
478 | } | |
479 | } | |
480 | drm_modeset_unlock_all(drm_dev); | |
481 | ||
482 | return 0; | |
af65c804 SP |
483 | } |
484 | #endif | |
485 | ||
af65c804 | 486 | static const struct dev_pm_ops exynos_drm_pm_ops = { |
082ca313 | 487 | SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_suspend, exynos_drm_resume) |
af65c804 SP |
488 | }; |
489 | ||
86650408 AH |
490 | /* forward declaration */ |
491 | static struct platform_driver exynos_drm_platform_driver; | |
f37cd5e8 | 492 | |
86650408 AH |
493 | /* |
494 | * Connector drivers should not be placed before associated crtc drivers, | |
495 | * because connector requires pipe number of its crtc during initialization. | |
496 | */ | |
497 | static struct platform_driver *const exynos_drm_kms_drivers[] = { | |
86650408 AH |
498 | #ifdef CONFIG_DRM_EXYNOS_FIMD |
499 | &fimd_driver, | |
500 | #endif | |
501 | #ifdef CONFIG_DRM_EXYNOS5433_DECON | |
502 | &exynos5433_decon_driver, | |
503 | #endif | |
504 | #ifdef CONFIG_DRM_EXYNOS7_DECON | |
505 | &decon_driver, | |
506 | #endif | |
77bbd891 HH |
507 | #ifdef CONFIG_DRM_EXYNOS_MIC |
508 | &mic_driver, | |
509 | #endif | |
86650408 AH |
510 | #ifdef CONFIG_DRM_EXYNOS_DP |
511 | &dp_driver, | |
512 | #endif | |
513 | #ifdef CONFIG_DRM_EXYNOS_DSI | |
514 | &dsi_driver, | |
515 | #endif | |
3cb02b4a | 516 | #ifdef CONFIG_DRM_EXYNOS_MIXER |
86650408 | 517 | &mixer_driver, |
3cb02b4a AH |
518 | #endif |
519 | #ifdef CONFIG_DRM_EXYNOS_HDMI | |
86650408 AH |
520 | &hdmi_driver, |
521 | #endif | |
735c21c3 JS |
522 | #ifdef CONFIG_DRM_EXYNOS_VIDI |
523 | &vidi_driver, | |
524 | #endif | |
86650408 | 525 | }; |
df5225bc | 526 | |
86650408 | 527 | static struct platform_driver *const exynos_drm_non_kms_drivers[] = { |
86650408 AH |
528 | #ifdef CONFIG_DRM_EXYNOS_G2D |
529 | &g2d_driver, | |
530 | #endif | |
531 | #ifdef CONFIG_DRM_EXYNOS_FIMC | |
532 | &fimc_driver, | |
533 | #endif | |
534 | #ifdef CONFIG_DRM_EXYNOS_ROTATOR | |
535 | &rotator_driver, | |
536 | #endif | |
537 | #ifdef CONFIG_DRM_EXYNOS_GSC | |
538 | &gsc_driver, | |
539 | #endif | |
540 | #ifdef CONFIG_DRM_EXYNOS_IPP | |
541 | &ipp_driver, | |
542 | #endif | |
543 | &exynos_drm_platform_driver, | |
544 | }; | |
f37cd5e8 | 545 | |
86650408 AH |
546 | static struct platform_driver *const exynos_drm_drv_with_simple_dev[] = { |
547 | #ifdef CONFIG_DRM_EXYNOS_VIDI | |
548 | &vidi_driver, | |
549 | #endif | |
550 | #ifdef CONFIG_DRM_EXYNOS_IPP | |
551 | &ipp_driver, | |
552 | #endif | |
553 | &exynos_drm_platform_driver, | |
554 | }; | |
555 | #define PDEV_COUNT ARRAY_SIZE(exynos_drm_drv_with_simple_dev) | |
f37cd5e8 | 556 | |
53c5558d | 557 | static int compare_dev(struct device *dev, void *data) |
f37cd5e8 ID |
558 | { |
559 | return dev == (struct device *)data; | |
560 | } | |
561 | ||
53c5558d | 562 | static struct component_match *exynos_drm_match_add(struct device *dev) |
f37cd5e8 | 563 | { |
53c5558d | 564 | struct component_match *match = NULL; |
86650408 | 565 | int i; |
f37cd5e8 | 566 | |
86650408 AH |
567 | for (i = 0; i < ARRAY_SIZE(exynos_drm_kms_drivers); ++i) { |
568 | struct device_driver *drv = &exynos_drm_kms_drivers[i]->driver; | |
569 | struct device *p = NULL, *d; | |
f7c2f36f | 570 | |
86650408 AH |
571 | while ((d = bus_find_device(&platform_bus_type, p, drv, |
572 | (void *)platform_bus_type.match))) { | |
573 | put_device(p); | |
574 | component_match_add(dev, &match, compare_dev, d); | |
575 | p = d; | |
df5225bc | 576 | } |
86650408 | 577 | put_device(p); |
f37cd5e8 ID |
578 | } |
579 | ||
86650408 | 580 | return match ?: ERR_PTR(-ENODEV); |
f37cd5e8 ID |
581 | } |
582 | ||
583 | static int exynos_drm_bind(struct device *dev) | |
584 | { | |
f37cd5e8 ID |
585 | return drm_platform_init(&exynos_drm_driver, to_platform_device(dev)); |
586 | } | |
587 | ||
588 | static void exynos_drm_unbind(struct device *dev) | |
589 | { | |
590 | drm_put_dev(dev_get_drvdata(dev)); | |
591 | } | |
592 | ||
593 | static const struct component_master_ops exynos_drm_ops = { | |
f37cd5e8 ID |
594 | .bind = exynos_drm_bind, |
595 | .unbind = exynos_drm_unbind, | |
1c248b7d ID |
596 | }; |
597 | ||
417133e4 AH |
598 | static int exynos_drm_platform_probe(struct platform_device *pdev) |
599 | { | |
600 | struct component_match *match; | |
601 | ||
602 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | |
603 | exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls); | |
604 | ||
605 | match = exynos_drm_match_add(&pdev->dev); | |
606 | if (IS_ERR(match)) | |
607 | return PTR_ERR(match); | |
608 | ||
609 | return component_master_add_with_match(&pdev->dev, &exynos_drm_ops, | |
610 | match); | |
611 | } | |
612 | ||
613 | static int exynos_drm_platform_remove(struct platform_device *pdev) | |
614 | { | |
615 | component_master_del(&pdev->dev, &exynos_drm_ops); | |
616 | return 0; | |
617 | } | |
618 | ||
619 | static struct platform_driver exynos_drm_platform_driver = { | |
620 | .probe = exynos_drm_platform_probe, | |
621 | .remove = exynos_drm_platform_remove, | |
622 | .driver = { | |
623 | .name = "exynos-drm", | |
624 | .pm = &exynos_drm_pm_ops, | |
625 | }, | |
626 | }; | |
627 | ||
417133e4 AH |
628 | static struct platform_device *exynos_drm_pdevs[PDEV_COUNT]; |
629 | ||
630 | static void exynos_drm_unregister_devices(void) | |
72390677 | 631 | { |
417133e4 | 632 | int i = PDEV_COUNT; |
25928a39 | 633 | |
417133e4 AH |
634 | while (--i >= 0) { |
635 | platform_device_unregister(exynos_drm_pdevs[i]); | |
636 | exynos_drm_pdevs[i] = NULL; | |
637 | } | |
638 | } | |
7eb8f069 | 639 | |
417133e4 AH |
640 | static int exynos_drm_register_devices(void) |
641 | { | |
642 | int i; | |
643 | ||
644 | for (i = 0; i < PDEV_COUNT; ++i) { | |
645 | struct platform_driver *d = exynos_drm_drv_with_simple_dev[i]; | |
646 | struct platform_device *pdev = | |
647 | platform_device_register_simple(d->driver.name, -1, | |
648 | NULL, 0); | |
649 | ||
650 | if (!IS_ERR(pdev)) { | |
651 | exynos_drm_pdevs[i] = pdev; | |
652 | continue; | |
653 | } | |
654 | while (--i >= 0) { | |
655 | platform_device_unregister(exynos_drm_pdevs[i]); | |
656 | exynos_drm_pdevs[i] = NULL; | |
657 | } | |
658 | ||
659 | return PTR_ERR(pdev); | |
72390677 | 660 | } |
f37cd5e8 | 661 | |
417133e4 | 662 | return 0; |
1c248b7d ID |
663 | } |
664 | ||
417133e4 AH |
665 | static void exynos_drm_unregister_drivers(struct platform_driver * const *drv, |
666 | int count) | |
1c248b7d | 667 | { |
417133e4 AH |
668 | while (--count >= 0) |
669 | platform_driver_unregister(drv[count]); | |
670 | } | |
671 | ||
672 | static int exynos_drm_register_drivers(struct platform_driver * const *drv, | |
673 | int count) | |
674 | { | |
675 | int i, ret; | |
676 | ||
677 | for (i = 0; i < count; ++i) { | |
678 | ret = platform_driver_register(drv[i]); | |
679 | if (!ret) | |
680 | continue; | |
681 | ||
682 | while (--i >= 0) | |
683 | platform_driver_unregister(drv[i]); | |
684 | ||
685 | return ret; | |
686 | } | |
687 | ||
f37cd5e8 ID |
688 | return 0; |
689 | } | |
690 | ||
417133e4 AH |
691 | static inline int exynos_drm_register_kms_drivers(void) |
692 | { | |
693 | return exynos_drm_register_drivers(exynos_drm_kms_drivers, | |
694 | ARRAY_SIZE(exynos_drm_kms_drivers)); | |
695 | } | |
696 | ||
697 | static inline int exynos_drm_register_non_kms_drivers(void) | |
698 | { | |
699 | return exynos_drm_register_drivers(exynos_drm_non_kms_drivers, | |
700 | ARRAY_SIZE(exynos_drm_non_kms_drivers)); | |
701 | } | |
702 | ||
703 | static inline void exynos_drm_unregister_kms_drivers(void) | |
704 | { | |
705 | exynos_drm_unregister_drivers(exynos_drm_kms_drivers, | |
706 | ARRAY_SIZE(exynos_drm_kms_drivers)); | |
707 | } | |
708 | ||
709 | static inline void exynos_drm_unregister_non_kms_drivers(void) | |
710 | { | |
711 | exynos_drm_unregister_drivers(exynos_drm_non_kms_drivers, | |
712 | ARRAY_SIZE(exynos_drm_non_kms_drivers)); | |
713 | } | |
714 | ||
f37cd5e8 ID |
715 | static int exynos_drm_init(void) |
716 | { | |
e3b9e460 | 717 | int ret; |
f37cd5e8 | 718 | |
417133e4 AH |
719 | ret = exynos_drm_register_devices(); |
720 | if (ret) | |
721 | return ret; | |
820687be | 722 | |
417133e4 AH |
723 | ret = exynos_drm_register_kms_drivers(); |
724 | if (ret) | |
725 | goto err_unregister_pdevs; | |
f37cd5e8 | 726 | |
417133e4 | 727 | ret = exynos_drm_register_non_kms_drivers(); |
f37cd5e8 | 728 | if (ret) |
417133e4 | 729 | goto err_unregister_kms_drivers; |
f37cd5e8 ID |
730 | |
731 | return 0; | |
732 | ||
820687be | 733 | err_unregister_kms_drivers: |
417133e4 | 734 | exynos_drm_unregister_kms_drivers(); |
820687be | 735 | |
417133e4 AH |
736 | err_unregister_pdevs: |
737 | exynos_drm_unregister_devices(); | |
f37cd5e8 ID |
738 | |
739 | return ret; | |
740 | } | |
741 | ||
742 | static void exynos_drm_exit(void) | |
743 | { | |
417133e4 AH |
744 | exynos_drm_unregister_non_kms_drivers(); |
745 | exynos_drm_unregister_kms_drivers(); | |
746 | exynos_drm_unregister_devices(); | |
1c248b7d ID |
747 | } |
748 | ||
749 | module_init(exynos_drm_init); | |
750 | module_exit(exynos_drm_exit); | |
751 | ||
752 | MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>"); | |
753 | MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>"); | |
754 | MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>"); | |
755 | MODULE_DESCRIPTION("Samsung SoC DRM Driver"); | |
756 | MODULE_LICENSE("GPL"); |