Commit | Line | Data |
---|---|---|
d7f1642c JS |
1 | /* |
2 | * Copyright (C) 2012 Samsung Electronics Co.Ltd | |
3 | * Authors: Joonyoung Shim <jy0922.shim@samsung.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundationr | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
d7f1642c JS |
11 | #include <linux/clk.h> |
12 | #include <linux/err.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/io.h> | |
15 | #include <linux/platform_device.h> | |
16 | #include <linux/pm_runtime.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/workqueue.h> | |
d87342c1 ID |
19 | #include <linux/dma-mapping.h> |
20 | #include <linux/dma-attrs.h> | |
95fc6337 | 21 | #include <linux/of.h> |
d7f1642c | 22 | |
760285e7 DH |
23 | #include <drm/drmP.h> |
24 | #include <drm/exynos_drm.h> | |
d7f1642c | 25 | #include "exynos_drm_drv.h" |
e30655d0 | 26 | #include "exynos_drm_g2d.h" |
d7f1642c | 27 | #include "exynos_drm_gem.h" |
d87342c1 | 28 | #include "exynos_drm_iommu.h" |
d7f1642c JS |
29 | |
30 | #define G2D_HW_MAJOR_VER 4 | |
31 | #define G2D_HW_MINOR_VER 1 | |
32 | ||
33 | /* vaild register range set from user: 0x0104 ~ 0x0880 */ | |
34 | #define G2D_VALID_START 0x0104 | |
35 | #define G2D_VALID_END 0x0880 | |
36 | ||
37 | /* general registers */ | |
38 | #define G2D_SOFT_RESET 0x0000 | |
39 | #define G2D_INTEN 0x0004 | |
40 | #define G2D_INTC_PEND 0x000C | |
41 | #define G2D_DMA_SFR_BASE_ADDR 0x0080 | |
42 | #define G2D_DMA_COMMAND 0x0084 | |
43 | #define G2D_DMA_STATUS 0x008C | |
44 | #define G2D_DMA_HOLD_CMD 0x0090 | |
45 | ||
46 | /* command registers */ | |
47 | #define G2D_BITBLT_START 0x0100 | |
48 | ||
49 | /* registers for base address */ | |
50 | #define G2D_SRC_BASE_ADDR 0x0304 | |
2dec17c7 YC |
51 | #define G2D_SRC_COLOR_MODE 0x030C |
52 | #define G2D_SRC_LEFT_TOP 0x0310 | |
53 | #define G2D_SRC_RIGHT_BOTTOM 0x0314 | |
d7f1642c JS |
54 | #define G2D_SRC_PLANE2_BASE_ADDR 0x0318 |
55 | #define G2D_DST_BASE_ADDR 0x0404 | |
2dec17c7 YC |
56 | #define G2D_DST_COLOR_MODE 0x040C |
57 | #define G2D_DST_LEFT_TOP 0x0410 | |
58 | #define G2D_DST_RIGHT_BOTTOM 0x0414 | |
d7f1642c JS |
59 | #define G2D_DST_PLANE2_BASE_ADDR 0x0418 |
60 | #define G2D_PAT_BASE_ADDR 0x0500 | |
61 | #define G2D_MSK_BASE_ADDR 0x0520 | |
62 | ||
63 | /* G2D_SOFT_RESET */ | |
64 | #define G2D_SFRCLEAR (1 << 1) | |
65 | #define G2D_R (1 << 0) | |
66 | ||
67 | /* G2D_INTEN */ | |
68 | #define G2D_INTEN_ACF (1 << 3) | |
69 | #define G2D_INTEN_UCF (1 << 2) | |
70 | #define G2D_INTEN_GCF (1 << 1) | |
71 | #define G2D_INTEN_SCF (1 << 0) | |
72 | ||
73 | /* G2D_INTC_PEND */ | |
74 | #define G2D_INTP_ACMD_FIN (1 << 3) | |
75 | #define G2D_INTP_UCMD_FIN (1 << 2) | |
76 | #define G2D_INTP_GCMD_FIN (1 << 1) | |
77 | #define G2D_INTP_SCMD_FIN (1 << 0) | |
78 | ||
79 | /* G2D_DMA_COMMAND */ | |
80 | #define G2D_DMA_HALT (1 << 2) | |
81 | #define G2D_DMA_CONTINUE (1 << 1) | |
82 | #define G2D_DMA_START (1 << 0) | |
83 | ||
84 | /* G2D_DMA_STATUS */ | |
85 | #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17) | |
86 | #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1) | |
87 | #define G2D_DMA_DONE (1 << 0) | |
88 | #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17 | |
89 | ||
90 | /* G2D_DMA_HOLD_CMD */ | |
7ad01814 | 91 | #define G2D_USER_HOLD (1 << 2) |
d7f1642c JS |
92 | #define G2D_LIST_HOLD (1 << 1) |
93 | #define G2D_BITBLT_HOLD (1 << 0) | |
94 | ||
95 | /* G2D_BITBLT_START */ | |
96 | #define G2D_START_CASESEL (1 << 2) | |
97 | #define G2D_START_NHOLT (1 << 1) | |
98 | #define G2D_START_BITBLT (1 << 0) | |
99 | ||
2dec17c7 YC |
100 | /* buffer color format */ |
101 | #define G2D_FMT_XRGB8888 0 | |
102 | #define G2D_FMT_ARGB8888 1 | |
103 | #define G2D_FMT_RGB565 2 | |
104 | #define G2D_FMT_XRGB1555 3 | |
105 | #define G2D_FMT_ARGB1555 4 | |
106 | #define G2D_FMT_XRGB4444 5 | |
107 | #define G2D_FMT_ARGB4444 6 | |
108 | #define G2D_FMT_PACKED_RGB888 7 | |
109 | #define G2D_FMT_A8 11 | |
110 | #define G2D_FMT_L8 12 | |
111 | ||
112 | /* buffer valid length */ | |
113 | #define G2D_LEN_MIN 1 | |
114 | #define G2D_LEN_MAX 8000 | |
115 | ||
d7f1642c JS |
116 | #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4) |
117 | #define G2D_CMDLIST_NUM 64 | |
118 | #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM) | |
119 | #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2) | |
120 | ||
2a3098ff ID |
121 | /* maximum buffer pool size of userptr is 64MB as default */ |
122 | #define MAX_POOL (64 * 1024 * 1024) | |
123 | ||
124 | enum { | |
125 | BUF_TYPE_GEM = 1, | |
126 | BUF_TYPE_USERPTR, | |
127 | }; | |
128 | ||
9963cb6e YC |
129 | enum g2d_reg_type { |
130 | REG_TYPE_NONE = -1, | |
131 | REG_TYPE_SRC, | |
132 | REG_TYPE_SRC_PLANE2, | |
133 | REG_TYPE_DST, | |
134 | REG_TYPE_DST_PLANE2, | |
135 | REG_TYPE_PAT, | |
136 | REG_TYPE_MSK, | |
137 | MAX_REG_TYPE_NR | |
138 | }; | |
139 | ||
d7f1642c JS |
140 | /* cmdlist data structure */ |
141 | struct g2d_cmdlist { | |
2a3098ff ID |
142 | u32 head; |
143 | unsigned long data[G2D_CMDLIST_DATA_NUM]; | |
144 | u32 last; /* last data offset */ | |
d7f1642c JS |
145 | }; |
146 | ||
2dec17c7 YC |
147 | /* |
148 | * A structure of buffer description | |
149 | * | |
150 | * @format: color format | |
151 | * @left_x: the x coordinates of left top corner | |
152 | * @top_y: the y coordinates of left top corner | |
153 | * @right_x: the x coordinates of right bottom corner | |
154 | * @bottom_y: the y coordinates of right bottom corner | |
155 | * | |
156 | */ | |
157 | struct g2d_buf_desc { | |
158 | unsigned int format; | |
159 | unsigned int left_x; | |
160 | unsigned int top_y; | |
161 | unsigned int right_x; | |
162 | unsigned int bottom_y; | |
163 | }; | |
164 | ||
9963cb6e YC |
165 | /* |
166 | * A structure of buffer information | |
167 | * | |
168 | * @map_nr: manages the number of mapped buffers | |
169 | * @reg_types: stores regitster type in the order of requested command | |
170 | * @handles: stores buffer handle in its reg_type position | |
171 | * @types: stores buffer type in its reg_type position | |
2dec17c7 | 172 | * @descs: stores buffer description in its reg_type position |
9963cb6e YC |
173 | * |
174 | */ | |
175 | struct g2d_buf_info { | |
176 | unsigned int map_nr; | |
177 | enum g2d_reg_type reg_types[MAX_REG_TYPE_NR]; | |
178 | unsigned long handles[MAX_REG_TYPE_NR]; | |
179 | unsigned int types[MAX_REG_TYPE_NR]; | |
2dec17c7 | 180 | struct g2d_buf_desc descs[MAX_REG_TYPE_NR]; |
9963cb6e YC |
181 | }; |
182 | ||
d7f1642c JS |
183 | struct drm_exynos_pending_g2d_event { |
184 | struct drm_pending_event base; | |
185 | struct drm_exynos_g2d_event event; | |
186 | }; | |
187 | ||
2a3098ff ID |
188 | struct g2d_cmdlist_userptr { |
189 | struct list_head list; | |
190 | dma_addr_t dma_addr; | |
191 | unsigned long userptr; | |
192 | unsigned long size; | |
193 | struct page **pages; | |
194 | unsigned int npages; | |
195 | struct sg_table *sgt; | |
196 | struct vm_area_struct *vma; | |
197 | atomic_t refcount; | |
198 | bool in_pool; | |
199 | bool out_of_list; | |
200 | }; | |
d7f1642c JS |
201 | struct g2d_cmdlist_node { |
202 | struct list_head list; | |
203 | struct g2d_cmdlist *cmdlist; | |
d7f1642c | 204 | dma_addr_t dma_addr; |
9963cb6e | 205 | struct g2d_buf_info buf_info; |
d7f1642c JS |
206 | |
207 | struct drm_exynos_pending_g2d_event *event; | |
208 | }; | |
209 | ||
210 | struct g2d_runqueue_node { | |
211 | struct list_head list; | |
212 | struct list_head run_cmdlist; | |
213 | struct list_head event_list; | |
d87342c1 | 214 | struct drm_file *filp; |
6b6bae24 | 215 | pid_t pid; |
d7f1642c JS |
216 | struct completion complete; |
217 | int async; | |
218 | }; | |
219 | ||
220 | struct g2d_data { | |
221 | struct device *dev; | |
222 | struct clk *gate_clk; | |
d7f1642c JS |
223 | void __iomem *regs; |
224 | int irq; | |
225 | struct workqueue_struct *g2d_workq; | |
226 | struct work_struct runqueue_work; | |
227 | struct exynos_drm_subdrv subdrv; | |
228 | bool suspended; | |
229 | ||
230 | /* cmdlist */ | |
231 | struct g2d_cmdlist_node *cmdlist_node; | |
232 | struct list_head free_cmdlist; | |
233 | struct mutex cmdlist_mutex; | |
234 | dma_addr_t cmdlist_pool; | |
235 | void *cmdlist_pool_virt; | |
d87342c1 | 236 | struct dma_attrs cmdlist_dma_attrs; |
d7f1642c JS |
237 | |
238 | /* runqueue*/ | |
239 | struct g2d_runqueue_node *runqueue_node; | |
240 | struct list_head runqueue; | |
241 | struct mutex runqueue_mutex; | |
242 | struct kmem_cache *runqueue_slab; | |
2a3098ff ID |
243 | |
244 | unsigned long current_pool; | |
245 | unsigned long max_pool; | |
d7f1642c JS |
246 | }; |
247 | ||
248 | static int g2d_init_cmdlist(struct g2d_data *g2d) | |
249 | { | |
250 | struct device *dev = g2d->dev; | |
251 | struct g2d_cmdlist_node *node = g2d->cmdlist_node; | |
d87342c1 | 252 | struct exynos_drm_subdrv *subdrv = &g2d->subdrv; |
d7f1642c JS |
253 | int nr; |
254 | int ret; | |
9963cb6e | 255 | struct g2d_buf_info *buf_info; |
d7f1642c | 256 | |
d87342c1 ID |
257 | init_dma_attrs(&g2d->cmdlist_dma_attrs); |
258 | dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs); | |
259 | ||
260 | g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev, | |
261 | G2D_CMDLIST_POOL_SIZE, | |
262 | &g2d->cmdlist_pool, GFP_KERNEL, | |
263 | &g2d->cmdlist_dma_attrs); | |
d7f1642c JS |
264 | if (!g2d->cmdlist_pool_virt) { |
265 | dev_err(dev, "failed to allocate dma memory\n"); | |
266 | return -ENOMEM; | |
267 | } | |
268 | ||
fab9f8d0 | 269 | node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL); |
d7f1642c JS |
270 | if (!node) { |
271 | dev_err(dev, "failed to allocate memory\n"); | |
272 | ret = -ENOMEM; | |
273 | goto err; | |
274 | } | |
275 | ||
276 | for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) { | |
9963cb6e YC |
277 | unsigned int i; |
278 | ||
d7f1642c JS |
279 | node[nr].cmdlist = |
280 | g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE; | |
281 | node[nr].dma_addr = | |
282 | g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE; | |
283 | ||
9963cb6e YC |
284 | buf_info = &node[nr].buf_info; |
285 | for (i = 0; i < MAX_REG_TYPE_NR; i++) | |
286 | buf_info->reg_types[i] = REG_TYPE_NONE; | |
287 | ||
d7f1642c JS |
288 | list_add_tail(&node[nr].list, &g2d->free_cmdlist); |
289 | } | |
290 | ||
291 | return 0; | |
292 | ||
293 | err: | |
d87342c1 ID |
294 | dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE, |
295 | g2d->cmdlist_pool_virt, | |
296 | g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs); | |
d7f1642c JS |
297 | return ret; |
298 | } | |
299 | ||
300 | static void g2d_fini_cmdlist(struct g2d_data *g2d) | |
301 | { | |
d87342c1 | 302 | struct exynos_drm_subdrv *subdrv = &g2d->subdrv; |
d7f1642c JS |
303 | |
304 | kfree(g2d->cmdlist_node); | |
d87342c1 ID |
305 | dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE, |
306 | g2d->cmdlist_pool_virt, | |
307 | g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs); | |
d7f1642c JS |
308 | } |
309 | ||
310 | static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d) | |
311 | { | |
312 | struct device *dev = g2d->dev; | |
313 | struct g2d_cmdlist_node *node; | |
314 | ||
315 | mutex_lock(&g2d->cmdlist_mutex); | |
316 | if (list_empty(&g2d->free_cmdlist)) { | |
317 | dev_err(dev, "there is no free cmdlist\n"); | |
318 | mutex_unlock(&g2d->cmdlist_mutex); | |
319 | return NULL; | |
320 | } | |
321 | ||
322 | node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node, | |
323 | list); | |
324 | list_del_init(&node->list); | |
325 | mutex_unlock(&g2d->cmdlist_mutex); | |
326 | ||
327 | return node; | |
328 | } | |
329 | ||
330 | static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node) | |
331 | { | |
332 | mutex_lock(&g2d->cmdlist_mutex); | |
333 | list_move_tail(&node->list, &g2d->free_cmdlist); | |
334 | mutex_unlock(&g2d->cmdlist_mutex); | |
335 | } | |
336 | ||
337 | static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv, | |
338 | struct g2d_cmdlist_node *node) | |
339 | { | |
340 | struct g2d_cmdlist_node *lnode; | |
341 | ||
342 | if (list_empty(&g2d_priv->inuse_cmdlist)) | |
343 | goto add_to_list; | |
344 | ||
345 | /* this links to base address of new cmdlist */ | |
346 | lnode = list_entry(g2d_priv->inuse_cmdlist.prev, | |
347 | struct g2d_cmdlist_node, list); | |
348 | lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr; | |
349 | ||
350 | add_to_list: | |
351 | list_add_tail(&node->list, &g2d_priv->inuse_cmdlist); | |
352 | ||
353 | if (node->event) | |
354 | list_add_tail(&node->event->base.link, &g2d_priv->event_list); | |
355 | } | |
356 | ||
2a3098ff ID |
357 | static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev, |
358 | unsigned long obj, | |
359 | bool force) | |
360 | { | |
361 | struct g2d_cmdlist_userptr *g2d_userptr = | |
362 | (struct g2d_cmdlist_userptr *)obj; | |
363 | ||
364 | if (!obj) | |
365 | return; | |
366 | ||
367 | if (force) | |
368 | goto out; | |
369 | ||
370 | atomic_dec(&g2d_userptr->refcount); | |
371 | ||
372 | if (atomic_read(&g2d_userptr->refcount) > 0) | |
373 | return; | |
374 | ||
375 | if (g2d_userptr->in_pool) | |
376 | return; | |
377 | ||
378 | out: | |
379 | exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt, | |
380 | DMA_BIDIRECTIONAL); | |
381 | ||
382 | exynos_gem_put_pages_to_userptr(g2d_userptr->pages, | |
383 | g2d_userptr->npages, | |
384 | g2d_userptr->vma); | |
385 | ||
c3bddbda ID |
386 | exynos_gem_put_vma(g2d_userptr->vma); |
387 | ||
2a3098ff ID |
388 | if (!g2d_userptr->out_of_list) |
389 | list_del_init(&g2d_userptr->list); | |
390 | ||
391 | sg_free_table(g2d_userptr->sgt); | |
392 | kfree(g2d_userptr->sgt); | |
2a3098ff | 393 | |
af51a5e7 | 394 | drm_free_large(g2d_userptr->pages); |
df3d90e5 | 395 | kfree(g2d_userptr); |
2a3098ff ID |
396 | } |
397 | ||
b7848c7a | 398 | static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev, |
2a3098ff ID |
399 | unsigned long userptr, |
400 | unsigned long size, | |
401 | struct drm_file *filp, | |
402 | unsigned long *obj) | |
403 | { | |
404 | struct drm_exynos_file_private *file_priv = filp->driver_priv; | |
405 | struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; | |
406 | struct g2d_cmdlist_userptr *g2d_userptr; | |
407 | struct g2d_data *g2d; | |
408 | struct page **pages; | |
409 | struct sg_table *sgt; | |
410 | struct vm_area_struct *vma; | |
411 | unsigned long start, end; | |
412 | unsigned int npages, offset; | |
413 | int ret; | |
414 | ||
415 | if (!size) { | |
416 | DRM_ERROR("invalid userptr size.\n"); | |
417 | return ERR_PTR(-EINVAL); | |
418 | } | |
419 | ||
420 | g2d = dev_get_drvdata(g2d_priv->dev); | |
421 | ||
422 | /* check if userptr already exists in userptr_list. */ | |
423 | list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) { | |
424 | if (g2d_userptr->userptr == userptr) { | |
425 | /* | |
426 | * also check size because there could be same address | |
427 | * and different size. | |
428 | */ | |
429 | if (g2d_userptr->size == size) { | |
430 | atomic_inc(&g2d_userptr->refcount); | |
431 | *obj = (unsigned long)g2d_userptr; | |
432 | ||
433 | return &g2d_userptr->dma_addr; | |
434 | } | |
435 | ||
436 | /* | |
437 | * at this moment, maybe g2d dma is accessing this | |
438 | * g2d_userptr memory region so just remove this | |
439 | * g2d_userptr object from userptr_list not to be | |
440 | * referred again and also except it the userptr | |
441 | * pool to be released after the dma access completion. | |
442 | */ | |
443 | g2d_userptr->out_of_list = true; | |
444 | g2d_userptr->in_pool = false; | |
445 | list_del_init(&g2d_userptr->list); | |
446 | ||
447 | break; | |
448 | } | |
449 | } | |
450 | ||
451 | g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL); | |
38bb5253 | 452 | if (!g2d_userptr) |
2a3098ff | 453 | return ERR_PTR(-ENOMEM); |
2a3098ff ID |
454 | |
455 | atomic_set(&g2d_userptr->refcount, 1); | |
456 | ||
457 | start = userptr & PAGE_MASK; | |
458 | offset = userptr & ~PAGE_MASK; | |
459 | end = PAGE_ALIGN(userptr + size); | |
460 | npages = (end - start) >> PAGE_SHIFT; | |
461 | g2d_userptr->npages = npages; | |
462 | ||
af51a5e7 | 463 | pages = drm_calloc_large(npages, sizeof(struct page *)); |
2a3098ff ID |
464 | if (!pages) { |
465 | DRM_ERROR("failed to allocate pages.\n"); | |
4bb615c5 SWK |
466 | ret = -ENOMEM; |
467 | goto err_free; | |
2a3098ff ID |
468 | } |
469 | ||
470 | vma = find_vma(current->mm, userptr); | |
471 | if (!vma) { | |
472 | DRM_ERROR("failed to get vm region.\n"); | |
473 | ret = -EFAULT; | |
474 | goto err_free_pages; | |
475 | } | |
476 | ||
477 | if (vma->vm_end < userptr + size) { | |
478 | DRM_ERROR("vma is too small.\n"); | |
479 | ret = -EFAULT; | |
480 | goto err_free_pages; | |
481 | } | |
482 | ||
483 | g2d_userptr->vma = exynos_gem_get_vma(vma); | |
484 | if (!g2d_userptr->vma) { | |
485 | DRM_ERROR("failed to copy vma.\n"); | |
486 | ret = -ENOMEM; | |
487 | goto err_free_pages; | |
488 | } | |
489 | ||
490 | g2d_userptr->size = size; | |
491 | ||
492 | ret = exynos_gem_get_pages_from_userptr(start & PAGE_MASK, | |
493 | npages, pages, vma); | |
494 | if (ret < 0) { | |
495 | DRM_ERROR("failed to get user pages from userptr.\n"); | |
496 | goto err_put_vma; | |
497 | } | |
498 | ||
499 | g2d_userptr->pages = pages; | |
500 | ||
e44a5c00 | 501 | sgt = kzalloc(sizeof(*sgt), GFP_KERNEL); |
2a3098ff | 502 | if (!sgt) { |
2a3098ff ID |
503 | ret = -ENOMEM; |
504 | goto err_free_userptr; | |
505 | } | |
506 | ||
507 | ret = sg_alloc_table_from_pages(sgt, pages, npages, offset, | |
508 | size, GFP_KERNEL); | |
509 | if (ret < 0) { | |
510 | DRM_ERROR("failed to get sgt from pages.\n"); | |
511 | goto err_free_sgt; | |
512 | } | |
513 | ||
514 | g2d_userptr->sgt = sgt; | |
515 | ||
516 | ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt, | |
517 | DMA_BIDIRECTIONAL); | |
518 | if (ret < 0) { | |
519 | DRM_ERROR("failed to map sgt with dma region.\n"); | |
067ed331 | 520 | goto err_sg_free_table; |
2a3098ff ID |
521 | } |
522 | ||
523 | g2d_userptr->dma_addr = sgt->sgl[0].dma_address; | |
524 | g2d_userptr->userptr = userptr; | |
525 | ||
526 | list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list); | |
527 | ||
528 | if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) { | |
529 | g2d->current_pool += npages << PAGE_SHIFT; | |
530 | g2d_userptr->in_pool = true; | |
531 | } | |
532 | ||
533 | *obj = (unsigned long)g2d_userptr; | |
534 | ||
535 | return &g2d_userptr->dma_addr; | |
536 | ||
067ed331 | 537 | err_sg_free_table: |
2a3098ff | 538 | sg_free_table(sgt); |
067ed331 YC |
539 | |
540 | err_free_sgt: | |
2a3098ff | 541 | kfree(sgt); |
2a3098ff ID |
542 | |
543 | err_free_userptr: | |
544 | exynos_gem_put_pages_to_userptr(g2d_userptr->pages, | |
545 | g2d_userptr->npages, | |
546 | g2d_userptr->vma); | |
547 | ||
548 | err_put_vma: | |
549 | exynos_gem_put_vma(g2d_userptr->vma); | |
550 | ||
551 | err_free_pages: | |
af51a5e7 | 552 | drm_free_large(pages); |
4bb615c5 SWK |
553 | |
554 | err_free: | |
2a3098ff | 555 | kfree(g2d_userptr); |
2a3098ff ID |
556 | |
557 | return ERR_PTR(ret); | |
558 | } | |
559 | ||
560 | static void g2d_userptr_free_all(struct drm_device *drm_dev, | |
561 | struct g2d_data *g2d, | |
562 | struct drm_file *filp) | |
563 | { | |
564 | struct drm_exynos_file_private *file_priv = filp->driver_priv; | |
565 | struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; | |
566 | struct g2d_cmdlist_userptr *g2d_userptr, *n; | |
567 | ||
568 | list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list) | |
569 | if (g2d_userptr->in_pool) | |
570 | g2d_userptr_put_dma_addr(drm_dev, | |
571 | (unsigned long)g2d_userptr, | |
572 | true); | |
573 | ||
574 | g2d->current_pool = 0; | |
575 | } | |
576 | ||
9963cb6e YC |
577 | static enum g2d_reg_type g2d_get_reg_type(int reg_offset) |
578 | { | |
579 | enum g2d_reg_type reg_type; | |
580 | ||
581 | switch (reg_offset) { | |
582 | case G2D_SRC_BASE_ADDR: | |
2dec17c7 YC |
583 | case G2D_SRC_COLOR_MODE: |
584 | case G2D_SRC_LEFT_TOP: | |
585 | case G2D_SRC_RIGHT_BOTTOM: | |
9963cb6e YC |
586 | reg_type = REG_TYPE_SRC; |
587 | break; | |
588 | case G2D_SRC_PLANE2_BASE_ADDR: | |
589 | reg_type = REG_TYPE_SRC_PLANE2; | |
590 | break; | |
591 | case G2D_DST_BASE_ADDR: | |
2dec17c7 YC |
592 | case G2D_DST_COLOR_MODE: |
593 | case G2D_DST_LEFT_TOP: | |
594 | case G2D_DST_RIGHT_BOTTOM: | |
9963cb6e YC |
595 | reg_type = REG_TYPE_DST; |
596 | break; | |
597 | case G2D_DST_PLANE2_BASE_ADDR: | |
598 | reg_type = REG_TYPE_DST_PLANE2; | |
599 | break; | |
600 | case G2D_PAT_BASE_ADDR: | |
601 | reg_type = REG_TYPE_PAT; | |
602 | break; | |
603 | case G2D_MSK_BASE_ADDR: | |
604 | reg_type = REG_TYPE_MSK; | |
605 | break; | |
606 | default: | |
607 | reg_type = REG_TYPE_NONE; | |
608 | DRM_ERROR("Unknown register offset![%d]\n", reg_offset); | |
609 | break; | |
5cdbc8d9 | 610 | } |
9963cb6e YC |
611 | |
612 | return reg_type; | |
613 | } | |
614 | ||
2dec17c7 YC |
615 | static unsigned long g2d_get_buf_bpp(unsigned int format) |
616 | { | |
617 | unsigned long bpp; | |
618 | ||
619 | switch (format) { | |
620 | case G2D_FMT_XRGB8888: | |
621 | case G2D_FMT_ARGB8888: | |
622 | bpp = 4; | |
623 | break; | |
624 | case G2D_FMT_RGB565: | |
625 | case G2D_FMT_XRGB1555: | |
626 | case G2D_FMT_ARGB1555: | |
627 | case G2D_FMT_XRGB4444: | |
628 | case G2D_FMT_ARGB4444: | |
629 | bpp = 2; | |
630 | break; | |
631 | case G2D_FMT_PACKED_RGB888: | |
632 | bpp = 3; | |
633 | break; | |
634 | default: | |
635 | bpp = 1; | |
636 | break; | |
637 | } | |
638 | ||
639 | return bpp; | |
640 | } | |
641 | ||
642 | static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc, | |
643 | enum g2d_reg_type reg_type, | |
644 | unsigned long size) | |
645 | { | |
646 | unsigned int width, height; | |
647 | unsigned long area; | |
648 | ||
649 | /* | |
650 | * check source and destination buffers only. | |
651 | * so the others are always valid. | |
652 | */ | |
653 | if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST) | |
654 | return true; | |
655 | ||
656 | width = buf_desc->right_x - buf_desc->left_x; | |
657 | if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) { | |
658 | DRM_ERROR("width[%u] is out of range!\n", width); | |
659 | return false; | |
660 | } | |
661 | ||
662 | height = buf_desc->bottom_y - buf_desc->top_y; | |
663 | if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) { | |
664 | DRM_ERROR("height[%u] is out of range!\n", height); | |
665 | return false; | |
666 | } | |
667 | ||
668 | area = (unsigned long)width * (unsigned long)height * | |
669 | g2d_get_buf_bpp(buf_desc->format); | |
670 | if (area > size) { | |
671 | DRM_ERROR("area[%lu] is out of range[%lu]!\n", area, size); | |
672 | return false; | |
673 | } | |
674 | ||
675 | return true; | |
676 | } | |
677 | ||
d87342c1 ID |
678 | static int g2d_map_cmdlist_gem(struct g2d_data *g2d, |
679 | struct g2d_cmdlist_node *node, | |
680 | struct drm_device *drm_dev, | |
681 | struct drm_file *file) | |
d7f1642c | 682 | { |
d7f1642c | 683 | struct g2d_cmdlist *cmdlist = node->cmdlist; |
9963cb6e | 684 | struct g2d_buf_info *buf_info = &node->buf_info; |
d7f1642c | 685 | int offset; |
9963cb6e | 686 | int ret; |
d7f1642c JS |
687 | int i; |
688 | ||
9963cb6e | 689 | for (i = 0; i < buf_info->map_nr; i++) { |
2dec17c7 | 690 | struct g2d_buf_desc *buf_desc; |
9963cb6e YC |
691 | enum g2d_reg_type reg_type; |
692 | int reg_pos; | |
d87342c1 ID |
693 | unsigned long handle; |
694 | dma_addr_t *addr; | |
d7f1642c | 695 | |
9963cb6e YC |
696 | reg_pos = cmdlist->last - 2 * (i + 1); |
697 | ||
698 | offset = cmdlist->data[reg_pos]; | |
699 | handle = cmdlist->data[reg_pos + 1]; | |
700 | ||
701 | reg_type = g2d_get_reg_type(offset); | |
702 | if (reg_type == REG_TYPE_NONE) { | |
703 | ret = -EFAULT; | |
704 | goto err; | |
705 | } | |
d7f1642c | 706 | |
2dec17c7 YC |
707 | buf_desc = &buf_info->descs[reg_type]; |
708 | ||
9963cb6e | 709 | if (buf_info->types[reg_type] == BUF_TYPE_GEM) { |
2dec17c7 YC |
710 | unsigned long size; |
711 | ||
712 | size = exynos_drm_gem_get_size(drm_dev, handle, file); | |
713 | if (!size) { | |
714 | ret = -EFAULT; | |
715 | goto err; | |
716 | } | |
717 | ||
718 | if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, | |
719 | size)) { | |
720 | ret = -EFAULT; | |
721 | goto err; | |
722 | } | |
723 | ||
2a3098ff ID |
724 | addr = exynos_drm_gem_get_dma_addr(drm_dev, handle, |
725 | file); | |
726 | if (IS_ERR(addr)) { | |
9963cb6e YC |
727 | ret = -EFAULT; |
728 | goto err; | |
2a3098ff ID |
729 | } |
730 | } else { | |
731 | struct drm_exynos_g2d_userptr g2d_userptr; | |
732 | ||
733 | if (copy_from_user(&g2d_userptr, (void __user *)handle, | |
734 | sizeof(struct drm_exynos_g2d_userptr))) { | |
9963cb6e YC |
735 | ret = -EFAULT; |
736 | goto err; | |
2a3098ff ID |
737 | } |
738 | ||
2dec17c7 YC |
739 | if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type, |
740 | g2d_userptr.size)) { | |
741 | ret = -EFAULT; | |
742 | goto err; | |
743 | } | |
744 | ||
2a3098ff ID |
745 | addr = g2d_userptr_get_dma_addr(drm_dev, |
746 | g2d_userptr.userptr, | |
747 | g2d_userptr.size, | |
748 | file, | |
749 | &handle); | |
750 | if (IS_ERR(addr)) { | |
9963cb6e YC |
751 | ret = -EFAULT; |
752 | goto err; | |
2a3098ff | 753 | } |
d7f1642c JS |
754 | } |
755 | ||
9963cb6e YC |
756 | cmdlist->data[reg_pos + 1] = *addr; |
757 | buf_info->reg_types[i] = reg_type; | |
758 | buf_info->handles[reg_type] = handle; | |
d7f1642c JS |
759 | } |
760 | ||
761 | return 0; | |
9963cb6e YC |
762 | |
763 | err: | |
764 | buf_info->map_nr = i; | |
765 | return ret; | |
d7f1642c JS |
766 | } |
767 | ||
d87342c1 ID |
768 | static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d, |
769 | struct g2d_cmdlist_node *node, | |
770 | struct drm_file *filp) | |
d7f1642c | 771 | { |
d87342c1 | 772 | struct exynos_drm_subdrv *subdrv = &g2d->subdrv; |
9963cb6e | 773 | struct g2d_buf_info *buf_info = &node->buf_info; |
d87342c1 | 774 | int i; |
d7f1642c | 775 | |
9963cb6e | 776 | for (i = 0; i < buf_info->map_nr; i++) { |
2dec17c7 | 777 | struct g2d_buf_desc *buf_desc; |
9963cb6e YC |
778 | enum g2d_reg_type reg_type; |
779 | unsigned long handle; | |
780 | ||
781 | reg_type = buf_info->reg_types[i]; | |
d87342c1 | 782 | |
2dec17c7 | 783 | buf_desc = &buf_info->descs[reg_type]; |
9963cb6e YC |
784 | handle = buf_info->handles[reg_type]; |
785 | ||
786 | if (buf_info->types[reg_type] == BUF_TYPE_GEM) | |
2a3098ff ID |
787 | exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle, |
788 | filp); | |
789 | else | |
790 | g2d_userptr_put_dma_addr(subdrv->drm_dev, handle, | |
791 | false); | |
d7f1642c | 792 | |
9963cb6e YC |
793 | buf_info->reg_types[i] = REG_TYPE_NONE; |
794 | buf_info->handles[reg_type] = 0; | |
795 | buf_info->types[reg_type] = 0; | |
2dec17c7 | 796 | memset(buf_desc, 0x00, sizeof(*buf_desc)); |
d7f1642c | 797 | } |
d87342c1 | 798 | |
9963cb6e | 799 | buf_info->map_nr = 0; |
d7f1642c JS |
800 | } |
801 | ||
802 | static void g2d_dma_start(struct g2d_data *g2d, | |
803 | struct g2d_runqueue_node *runqueue_node) | |
804 | { | |
805 | struct g2d_cmdlist_node *node = | |
806 | list_first_entry(&runqueue_node->run_cmdlist, | |
807 | struct g2d_cmdlist_node, list); | |
89f8b85e ID |
808 | int ret; |
809 | ||
810 | ret = pm_runtime_get_sync(g2d->dev); | |
b10d6350 | 811 | if (ret < 0) |
89f8b85e | 812 | return; |
d7f1642c | 813 | |
d7f1642c JS |
814 | writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR); |
815 | writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND); | |
816 | } | |
817 | ||
818 | static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d) | |
819 | { | |
820 | struct g2d_runqueue_node *runqueue_node; | |
821 | ||
822 | if (list_empty(&g2d->runqueue)) | |
823 | return NULL; | |
824 | ||
825 | runqueue_node = list_first_entry(&g2d->runqueue, | |
826 | struct g2d_runqueue_node, list); | |
827 | list_del_init(&runqueue_node->list); | |
828 | return runqueue_node; | |
829 | } | |
830 | ||
831 | static void g2d_free_runqueue_node(struct g2d_data *g2d, | |
832 | struct g2d_runqueue_node *runqueue_node) | |
833 | { | |
d87342c1 ID |
834 | struct g2d_cmdlist_node *node; |
835 | ||
d7f1642c JS |
836 | if (!runqueue_node) |
837 | return; | |
838 | ||
839 | mutex_lock(&g2d->cmdlist_mutex); | |
d87342c1 ID |
840 | /* |
841 | * commands in run_cmdlist have been completed so unmap all gem | |
842 | * objects in each command node so that they are unreferenced. | |
843 | */ | |
844 | list_for_each_entry(node, &runqueue_node->run_cmdlist, list) | |
845 | g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp); | |
d7f1642c JS |
846 | list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist); |
847 | mutex_unlock(&g2d->cmdlist_mutex); | |
848 | ||
849 | kmem_cache_free(g2d->runqueue_slab, runqueue_node); | |
850 | } | |
851 | ||
852 | static void g2d_exec_runqueue(struct g2d_data *g2d) | |
853 | { | |
854 | g2d->runqueue_node = g2d_get_runqueue_node(g2d); | |
855 | if (g2d->runqueue_node) | |
856 | g2d_dma_start(g2d, g2d->runqueue_node); | |
857 | } | |
858 | ||
859 | static void g2d_runqueue_worker(struct work_struct *work) | |
860 | { | |
861 | struct g2d_data *g2d = container_of(work, struct g2d_data, | |
862 | runqueue_work); | |
863 | ||
d7f1642c | 864 | mutex_lock(&g2d->runqueue_mutex); |
d7f1642c JS |
865 | pm_runtime_put_sync(g2d->dev); |
866 | ||
867 | complete(&g2d->runqueue_node->complete); | |
868 | if (g2d->runqueue_node->async) | |
869 | g2d_free_runqueue_node(g2d, g2d->runqueue_node); | |
870 | ||
871 | if (g2d->suspended) | |
872 | g2d->runqueue_node = NULL; | |
873 | else | |
874 | g2d_exec_runqueue(g2d); | |
875 | mutex_unlock(&g2d->runqueue_mutex); | |
876 | } | |
877 | ||
878 | static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no) | |
879 | { | |
880 | struct drm_device *drm_dev = g2d->subdrv.drm_dev; | |
881 | struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node; | |
882 | struct drm_exynos_pending_g2d_event *e; | |
883 | struct timeval now; | |
884 | unsigned long flags; | |
885 | ||
886 | if (list_empty(&runqueue_node->event_list)) | |
887 | return; | |
888 | ||
889 | e = list_first_entry(&runqueue_node->event_list, | |
890 | struct drm_exynos_pending_g2d_event, base.link); | |
891 | ||
892 | do_gettimeofday(&now); | |
893 | e->event.tv_sec = now.tv_sec; | |
894 | e->event.tv_usec = now.tv_usec; | |
895 | e->event.cmdlist_no = cmdlist_no; | |
896 | ||
897 | spin_lock_irqsave(&drm_dev->event_lock, flags); | |
898 | list_move_tail(&e->base.link, &e->base.file_priv->event_list); | |
899 | wake_up_interruptible(&e->base.file_priv->event_wait); | |
900 | spin_unlock_irqrestore(&drm_dev->event_lock, flags); | |
901 | } | |
902 | ||
903 | static irqreturn_t g2d_irq_handler(int irq, void *dev_id) | |
904 | { | |
905 | struct g2d_data *g2d = dev_id; | |
906 | u32 pending; | |
907 | ||
908 | pending = readl_relaxed(g2d->regs + G2D_INTC_PEND); | |
909 | if (pending) | |
910 | writel_relaxed(pending, g2d->regs + G2D_INTC_PEND); | |
911 | ||
912 | if (pending & G2D_INTP_GCMD_FIN) { | |
913 | u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS); | |
914 | ||
915 | cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >> | |
916 | G2D_DMA_LIST_DONE_COUNT_OFFSET; | |
917 | ||
918 | g2d_finish_event(g2d, cmdlist_no); | |
919 | ||
920 | writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD); | |
921 | if (!(pending & G2D_INTP_ACMD_FIN)) { | |
922 | writel_relaxed(G2D_DMA_CONTINUE, | |
923 | g2d->regs + G2D_DMA_COMMAND); | |
924 | } | |
925 | } | |
926 | ||
927 | if (pending & G2D_INTP_ACMD_FIN) | |
928 | queue_work(g2d->g2d_workq, &g2d->runqueue_work); | |
929 | ||
930 | return IRQ_HANDLED; | |
931 | } | |
932 | ||
2a3098ff ID |
933 | static int g2d_check_reg_offset(struct device *dev, |
934 | struct g2d_cmdlist_node *node, | |
d7f1642c JS |
935 | int nr, bool for_addr) |
936 | { | |
2a3098ff | 937 | struct g2d_cmdlist *cmdlist = node->cmdlist; |
d7f1642c JS |
938 | int reg_offset; |
939 | int index; | |
940 | int i; | |
941 | ||
942 | for (i = 0; i < nr; i++) { | |
9963cb6e | 943 | struct g2d_buf_info *buf_info = &node->buf_info; |
2dec17c7 | 944 | struct g2d_buf_desc *buf_desc; |
9963cb6e | 945 | enum g2d_reg_type reg_type; |
2dec17c7 | 946 | unsigned long value; |
2a3098ff | 947 | |
9963cb6e | 948 | index = cmdlist->last - 2 * (i + 1); |
2a3098ff | 949 | |
d7f1642c | 950 | reg_offset = cmdlist->data[index] & ~0xfffff000; |
d7f1642c JS |
951 | if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END) |
952 | goto err; | |
953 | if (reg_offset % 4) | |
954 | goto err; | |
955 | ||
956 | switch (reg_offset) { | |
957 | case G2D_SRC_BASE_ADDR: | |
958 | case G2D_SRC_PLANE2_BASE_ADDR: | |
959 | case G2D_DST_BASE_ADDR: | |
960 | case G2D_DST_PLANE2_BASE_ADDR: | |
961 | case G2D_PAT_BASE_ADDR: | |
962 | case G2D_MSK_BASE_ADDR: | |
963 | if (!for_addr) | |
964 | goto err; | |
2a3098ff | 965 | |
9963cb6e YC |
966 | reg_type = g2d_get_reg_type(reg_offset); |
967 | if (reg_type == REG_TYPE_NONE) | |
968 | goto err; | |
969 | ||
970 | /* check userptr buffer type. */ | |
971 | if ((cmdlist->data[index] & ~0x7fffffff) >> 31) { | |
972 | buf_info->types[reg_type] = BUF_TYPE_USERPTR; | |
973 | cmdlist->data[index] &= ~G2D_BUF_USERPTR; | |
974 | } else | |
975 | buf_info->types[reg_type] = BUF_TYPE_GEM; | |
d7f1642c | 976 | break; |
2dec17c7 YC |
977 | case G2D_SRC_COLOR_MODE: |
978 | case G2D_DST_COLOR_MODE: | |
979 | if (for_addr) | |
980 | goto err; | |
981 | ||
982 | reg_type = g2d_get_reg_type(reg_offset); | |
983 | if (reg_type == REG_TYPE_NONE) | |
984 | goto err; | |
985 | ||
986 | buf_desc = &buf_info->descs[reg_type]; | |
987 | value = cmdlist->data[index + 1]; | |
988 | ||
989 | buf_desc->format = value & 0xf; | |
990 | break; | |
991 | case G2D_SRC_LEFT_TOP: | |
992 | case G2D_DST_LEFT_TOP: | |
993 | if (for_addr) | |
994 | goto err; | |
995 | ||
996 | reg_type = g2d_get_reg_type(reg_offset); | |
997 | if (reg_type == REG_TYPE_NONE) | |
998 | goto err; | |
999 | ||
1000 | buf_desc = &buf_info->descs[reg_type]; | |
1001 | value = cmdlist->data[index + 1]; | |
1002 | ||
1003 | buf_desc->left_x = value & 0x1fff; | |
1004 | buf_desc->top_y = (value & 0x1fff0000) >> 16; | |
1005 | break; | |
1006 | case G2D_SRC_RIGHT_BOTTOM: | |
1007 | case G2D_DST_RIGHT_BOTTOM: | |
1008 | if (for_addr) | |
1009 | goto err; | |
1010 | ||
1011 | reg_type = g2d_get_reg_type(reg_offset); | |
1012 | if (reg_type == REG_TYPE_NONE) | |
1013 | goto err; | |
1014 | ||
1015 | buf_desc = &buf_info->descs[reg_type]; | |
1016 | value = cmdlist->data[index + 1]; | |
1017 | ||
1018 | buf_desc->right_x = value & 0x1fff; | |
1019 | buf_desc->bottom_y = (value & 0x1fff0000) >> 16; | |
1020 | break; | |
d7f1642c JS |
1021 | default: |
1022 | if (for_addr) | |
1023 | goto err; | |
1024 | break; | |
1025 | } | |
1026 | } | |
1027 | ||
1028 | return 0; | |
1029 | ||
1030 | err: | |
2a3098ff | 1031 | dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]); |
d7f1642c JS |
1032 | return -EINVAL; |
1033 | } | |
1034 | ||
1035 | /* ioctl functions */ | |
1036 | int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data, | |
1037 | struct drm_file *file) | |
1038 | { | |
1039 | struct drm_exynos_g2d_get_ver *ver = data; | |
1040 | ||
1041 | ver->major = G2D_HW_MAJOR_VER; | |
1042 | ver->minor = G2D_HW_MINOR_VER; | |
1043 | ||
1044 | return 0; | |
1045 | } | |
1046 | EXPORT_SYMBOL_GPL(exynos_g2d_get_ver_ioctl); | |
1047 | ||
1048 | int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data, | |
1049 | struct drm_file *file) | |
1050 | { | |
1051 | struct drm_exynos_file_private *file_priv = file->driver_priv; | |
1052 | struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; | |
1053 | struct device *dev = g2d_priv->dev; | |
1054 | struct g2d_data *g2d; | |
1055 | struct drm_exynos_g2d_set_cmdlist *req = data; | |
1056 | struct drm_exynos_g2d_cmd *cmd; | |
1057 | struct drm_exynos_pending_g2d_event *e; | |
1058 | struct g2d_cmdlist_node *node; | |
1059 | struct g2d_cmdlist *cmdlist; | |
1060 | unsigned long flags; | |
1061 | int size; | |
1062 | int ret; | |
1063 | ||
1064 | if (!dev) | |
1065 | return -ENODEV; | |
1066 | ||
1067 | g2d = dev_get_drvdata(dev); | |
1068 | if (!g2d) | |
1069 | return -EFAULT; | |
1070 | ||
1071 | node = g2d_get_cmdlist(g2d); | |
1072 | if (!node) | |
1073 | return -ENOMEM; | |
1074 | ||
1075 | node->event = NULL; | |
1076 | ||
1077 | if (req->event_type != G2D_EVENT_NOT) { | |
1078 | spin_lock_irqsave(&drm_dev->event_lock, flags); | |
1079 | if (file->event_space < sizeof(e->event)) { | |
1080 | spin_unlock_irqrestore(&drm_dev->event_lock, flags); | |
1081 | ret = -ENOMEM; | |
1082 | goto err; | |
1083 | } | |
1084 | file->event_space -= sizeof(e->event); | |
1085 | spin_unlock_irqrestore(&drm_dev->event_lock, flags); | |
1086 | ||
1087 | e = kzalloc(sizeof(*node->event), GFP_KERNEL); | |
1088 | if (!e) { | |
d7f1642c JS |
1089 | spin_lock_irqsave(&drm_dev->event_lock, flags); |
1090 | file->event_space += sizeof(e->event); | |
1091 | spin_unlock_irqrestore(&drm_dev->event_lock, flags); | |
1092 | ||
1093 | ret = -ENOMEM; | |
1094 | goto err; | |
1095 | } | |
1096 | ||
1097 | e->event.base.type = DRM_EXYNOS_G2D_EVENT; | |
1098 | e->event.base.length = sizeof(e->event); | |
1099 | e->event.user_data = req->user_data; | |
1100 | e->base.event = &e->event.base; | |
1101 | e->base.file_priv = file; | |
1102 | e->base.destroy = (void (*) (struct drm_pending_event *)) kfree; | |
1103 | ||
1104 | node->event = e; | |
1105 | } | |
1106 | ||
1107 | cmdlist = node->cmdlist; | |
1108 | ||
1109 | cmdlist->last = 0; | |
1110 | ||
1111 | /* | |
1112 | * If don't clear SFR registers, the cmdlist is affected by register | |
1113 | * values of previous cmdlist. G2D hw executes SFR clear command and | |
1114 | * a next command at the same time then the next command is ignored and | |
1115 | * is executed rightly from next next command, so needs a dummy command | |
1116 | * to next command of SFR clear command. | |
1117 | */ | |
1118 | cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET; | |
1119 | cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR; | |
1120 | cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR; | |
1121 | cmdlist->data[cmdlist->last++] = 0; | |
1122 | ||
7ad01814 YC |
1123 | /* |
1124 | * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG | |
1125 | * and GCF bit should be set to INTEN register if user wants | |
1126 | * G2D interrupt event once current command list execution is | |
1127 | * finished. | |
1128 | * Otherwise only ACF bit should be set to INTEN register so | |
c6b78bc8 | 1129 | * that one interrupt is occurred after all command lists |
7ad01814 YC |
1130 | * have been completed. |
1131 | */ | |
d7f1642c | 1132 | if (node->event) { |
7ad01814 YC |
1133 | cmdlist->data[cmdlist->last++] = G2D_INTEN; |
1134 | cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF; | |
d7f1642c JS |
1135 | cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD; |
1136 | cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD; | |
7ad01814 YC |
1137 | } else { |
1138 | cmdlist->data[cmdlist->last++] = G2D_INTEN; | |
1139 | cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF; | |
d7f1642c JS |
1140 | } |
1141 | ||
1142 | /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */ | |
2a3098ff | 1143 | size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2; |
d7f1642c JS |
1144 | if (size > G2D_CMDLIST_DATA_NUM) { |
1145 | dev_err(dev, "cmdlist size is too big\n"); | |
1146 | ret = -EINVAL; | |
1147 | goto err_free_event; | |
1148 | } | |
1149 | ||
1150 | cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd; | |
1151 | ||
1152 | if (copy_from_user(cmdlist->data + cmdlist->last, | |
1153 | (void __user *)cmd, | |
1154 | sizeof(*cmd) * req->cmd_nr)) { | |
1155 | ret = -EFAULT; | |
1156 | goto err_free_event; | |
1157 | } | |
1158 | cmdlist->last += req->cmd_nr * 2; | |
1159 | ||
2a3098ff | 1160 | ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false); |
d7f1642c JS |
1161 | if (ret < 0) |
1162 | goto err_free_event; | |
1163 | ||
9963cb6e | 1164 | node->buf_info.map_nr = req->cmd_buf_nr; |
2a3098ff ID |
1165 | if (req->cmd_buf_nr) { |
1166 | struct drm_exynos_g2d_cmd *cmd_buf; | |
d7f1642c | 1167 | |
2a3098ff | 1168 | cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf; |
d7f1642c JS |
1169 | |
1170 | if (copy_from_user(cmdlist->data + cmdlist->last, | |
2a3098ff ID |
1171 | (void __user *)cmd_buf, |
1172 | sizeof(*cmd_buf) * req->cmd_buf_nr)) { | |
d7f1642c JS |
1173 | ret = -EFAULT; |
1174 | goto err_free_event; | |
1175 | } | |
2a3098ff | 1176 | cmdlist->last += req->cmd_buf_nr * 2; |
d7f1642c | 1177 | |
2a3098ff | 1178 | ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true); |
d7f1642c JS |
1179 | if (ret < 0) |
1180 | goto err_free_event; | |
1181 | ||
d87342c1 | 1182 | ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file); |
d7f1642c JS |
1183 | if (ret < 0) |
1184 | goto err_unmap; | |
1185 | } | |
1186 | ||
1187 | cmdlist->data[cmdlist->last++] = G2D_BITBLT_START; | |
1188 | cmdlist->data[cmdlist->last++] = G2D_START_BITBLT; | |
1189 | ||
1190 | /* head */ | |
1191 | cmdlist->head = cmdlist->last / 2; | |
1192 | ||
1193 | /* tail */ | |
1194 | cmdlist->data[cmdlist->last] = 0; | |
1195 | ||
1196 | g2d_add_cmdlist_to_inuse(g2d_priv, node); | |
1197 | ||
1198 | return 0; | |
1199 | ||
1200 | err_unmap: | |
d87342c1 | 1201 | g2d_unmap_cmdlist_gem(g2d, node, file); |
d7f1642c JS |
1202 | err_free_event: |
1203 | if (node->event) { | |
1204 | spin_lock_irqsave(&drm_dev->event_lock, flags); | |
1205 | file->event_space += sizeof(e->event); | |
1206 | spin_unlock_irqrestore(&drm_dev->event_lock, flags); | |
1207 | kfree(node->event); | |
1208 | } | |
1209 | err: | |
1210 | g2d_put_cmdlist(g2d, node); | |
1211 | return ret; | |
1212 | } | |
1213 | EXPORT_SYMBOL_GPL(exynos_g2d_set_cmdlist_ioctl); | |
1214 | ||
1215 | int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data, | |
1216 | struct drm_file *file) | |
1217 | { | |
1218 | struct drm_exynos_file_private *file_priv = file->driver_priv; | |
1219 | struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; | |
1220 | struct device *dev = g2d_priv->dev; | |
1221 | struct g2d_data *g2d; | |
1222 | struct drm_exynos_g2d_exec *req = data; | |
1223 | struct g2d_runqueue_node *runqueue_node; | |
1224 | struct list_head *run_cmdlist; | |
1225 | struct list_head *event_list; | |
1226 | ||
1227 | if (!dev) | |
1228 | return -ENODEV; | |
1229 | ||
1230 | g2d = dev_get_drvdata(dev); | |
1231 | if (!g2d) | |
1232 | return -EFAULT; | |
1233 | ||
1234 | runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL); | |
1235 | if (!runqueue_node) { | |
1236 | dev_err(dev, "failed to allocate memory\n"); | |
1237 | return -ENOMEM; | |
1238 | } | |
1239 | run_cmdlist = &runqueue_node->run_cmdlist; | |
1240 | event_list = &runqueue_node->event_list; | |
1241 | INIT_LIST_HEAD(run_cmdlist); | |
1242 | INIT_LIST_HEAD(event_list); | |
1243 | init_completion(&runqueue_node->complete); | |
1244 | runqueue_node->async = req->async; | |
1245 | ||
1246 | list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist); | |
1247 | list_splice_init(&g2d_priv->event_list, event_list); | |
1248 | ||
1249 | if (list_empty(run_cmdlist)) { | |
1250 | dev_err(dev, "there is no inuse cmdlist\n"); | |
1251 | kmem_cache_free(g2d->runqueue_slab, runqueue_node); | |
1252 | return -EPERM; | |
1253 | } | |
1254 | ||
1255 | mutex_lock(&g2d->runqueue_mutex); | |
6b6bae24 | 1256 | runqueue_node->pid = current->pid; |
d87342c1 | 1257 | runqueue_node->filp = file; |
d7f1642c JS |
1258 | list_add_tail(&runqueue_node->list, &g2d->runqueue); |
1259 | if (!g2d->runqueue_node) | |
1260 | g2d_exec_runqueue(g2d); | |
1261 | mutex_unlock(&g2d->runqueue_mutex); | |
1262 | ||
1263 | if (runqueue_node->async) | |
1264 | goto out; | |
1265 | ||
1266 | wait_for_completion(&runqueue_node->complete); | |
1267 | g2d_free_runqueue_node(g2d, runqueue_node); | |
1268 | ||
1269 | out: | |
1270 | return 0; | |
1271 | } | |
1272 | EXPORT_SYMBOL_GPL(exynos_g2d_exec_ioctl); | |
1273 | ||
d87342c1 ID |
1274 | static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev) |
1275 | { | |
1276 | struct g2d_data *g2d; | |
1277 | int ret; | |
1278 | ||
1279 | g2d = dev_get_drvdata(dev); | |
1280 | if (!g2d) | |
1281 | return -EFAULT; | |
1282 | ||
1283 | /* allocate dma-aware cmdlist buffer. */ | |
1284 | ret = g2d_init_cmdlist(g2d); | |
1285 | if (ret < 0) { | |
1286 | dev_err(dev, "cmdlist init failed\n"); | |
1287 | return ret; | |
1288 | } | |
1289 | ||
1290 | if (!is_drm_iommu_supported(drm_dev)) | |
1291 | return 0; | |
1292 | ||
1293 | ret = drm_iommu_attach_device(drm_dev, dev); | |
1294 | if (ret < 0) { | |
1295 | dev_err(dev, "failed to enable iommu.\n"); | |
1296 | g2d_fini_cmdlist(g2d); | |
1297 | } | |
1298 | ||
1299 | return ret; | |
1300 | ||
1301 | } | |
1302 | ||
1303 | static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev) | |
1304 | { | |
1305 | if (!is_drm_iommu_supported(drm_dev)) | |
1306 | return; | |
1307 | ||
1308 | drm_iommu_detach_device(drm_dev, dev); | |
1309 | } | |
1310 | ||
d7f1642c JS |
1311 | static int g2d_open(struct drm_device *drm_dev, struct device *dev, |
1312 | struct drm_file *file) | |
1313 | { | |
1314 | struct drm_exynos_file_private *file_priv = file->driver_priv; | |
1315 | struct exynos_drm_g2d_private *g2d_priv; | |
1316 | ||
1317 | g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL); | |
38bb5253 | 1318 | if (!g2d_priv) |
d7f1642c | 1319 | return -ENOMEM; |
d7f1642c JS |
1320 | |
1321 | g2d_priv->dev = dev; | |
1322 | file_priv->g2d_priv = g2d_priv; | |
1323 | ||
1324 | INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist); | |
1325 | INIT_LIST_HEAD(&g2d_priv->event_list); | |
2a3098ff | 1326 | INIT_LIST_HEAD(&g2d_priv->userptr_list); |
d7f1642c JS |
1327 | |
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | static void g2d_close(struct drm_device *drm_dev, struct device *dev, | |
1332 | struct drm_file *file) | |
1333 | { | |
1334 | struct drm_exynos_file_private *file_priv = file->driver_priv; | |
1335 | struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv; | |
1336 | struct g2d_data *g2d; | |
1337 | struct g2d_cmdlist_node *node, *n; | |
1338 | ||
1339 | if (!dev) | |
1340 | return; | |
1341 | ||
1342 | g2d = dev_get_drvdata(dev); | |
1343 | if (!g2d) | |
1344 | return; | |
1345 | ||
1346 | mutex_lock(&g2d->cmdlist_mutex); | |
d87342c1 ID |
1347 | list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) { |
1348 | /* | |
1349 | * unmap all gem objects not completed. | |
1350 | * | |
1351 | * P.S. if current process was terminated forcely then | |
1352 | * there may be some commands in inuse_cmdlist so unmap | |
1353 | * them. | |
1354 | */ | |
1355 | g2d_unmap_cmdlist_gem(g2d, node, file); | |
d7f1642c | 1356 | list_move_tail(&node->list, &g2d->free_cmdlist); |
d87342c1 | 1357 | } |
d7f1642c JS |
1358 | mutex_unlock(&g2d->cmdlist_mutex); |
1359 | ||
2a3098ff ID |
1360 | /* release all g2d_userptr in pool. */ |
1361 | g2d_userptr_free_all(drm_dev, g2d, file); | |
1362 | ||
d7f1642c JS |
1363 | kfree(file_priv->g2d_priv); |
1364 | } | |
1365 | ||
56550d94 | 1366 | static int g2d_probe(struct platform_device *pdev) |
d7f1642c JS |
1367 | { |
1368 | struct device *dev = &pdev->dev; | |
1369 | struct resource *res; | |
1370 | struct g2d_data *g2d; | |
1371 | struct exynos_drm_subdrv *subdrv; | |
1372 | int ret; | |
1373 | ||
d873ab99 | 1374 | g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL); |
38bb5253 | 1375 | if (!g2d) |
d7f1642c | 1376 | return -ENOMEM; |
d7f1642c JS |
1377 | |
1378 | g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab", | |
1379 | sizeof(struct g2d_runqueue_node), 0, 0, NULL); | |
b7675933 SK |
1380 | if (!g2d->runqueue_slab) |
1381 | return -ENOMEM; | |
d7f1642c JS |
1382 | |
1383 | g2d->dev = dev; | |
1384 | ||
1385 | g2d->g2d_workq = create_singlethread_workqueue("g2d"); | |
1386 | if (!g2d->g2d_workq) { | |
1387 | dev_err(dev, "failed to create workqueue\n"); | |
1388 | ret = -EINVAL; | |
1389 | goto err_destroy_slab; | |
1390 | } | |
1391 | ||
1392 | INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker); | |
1393 | INIT_LIST_HEAD(&g2d->free_cmdlist); | |
1394 | INIT_LIST_HEAD(&g2d->runqueue); | |
1395 | ||
1396 | mutex_init(&g2d->cmdlist_mutex); | |
1397 | mutex_init(&g2d->runqueue_mutex); | |
1398 | ||
dc625537 | 1399 | g2d->gate_clk = devm_clk_get(dev, "fimg2d"); |
d7f1642c JS |
1400 | if (IS_ERR(g2d->gate_clk)) { |
1401 | dev_err(dev, "failed to get gate clock\n"); | |
1402 | ret = PTR_ERR(g2d->gate_clk); | |
d87342c1 | 1403 | goto err_destroy_workqueue; |
d7f1642c JS |
1404 | } |
1405 | ||
1406 | pm_runtime_enable(dev); | |
1407 | ||
1408 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
d7f1642c | 1409 | |
d873ab99 | 1410 | g2d->regs = devm_ioremap_resource(dev, res); |
d4ed6025 TR |
1411 | if (IS_ERR(g2d->regs)) { |
1412 | ret = PTR_ERR(g2d->regs); | |
b7675933 | 1413 | goto err_put_clk; |
d7f1642c JS |
1414 | } |
1415 | ||
1416 | g2d->irq = platform_get_irq(pdev, 0); | |
1417 | if (g2d->irq < 0) { | |
1418 | dev_err(dev, "failed to get irq\n"); | |
1419 | ret = g2d->irq; | |
b7675933 | 1420 | goto err_put_clk; |
d7f1642c JS |
1421 | } |
1422 | ||
d873ab99 | 1423 | ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0, |
b7675933 | 1424 | "drm_g2d", g2d); |
d7f1642c JS |
1425 | if (ret < 0) { |
1426 | dev_err(dev, "irq request failed\n"); | |
b7675933 | 1427 | goto err_put_clk; |
d7f1642c JS |
1428 | } |
1429 | ||
2a3098ff ID |
1430 | g2d->max_pool = MAX_POOL; |
1431 | ||
d7f1642c JS |
1432 | platform_set_drvdata(pdev, g2d); |
1433 | ||
1434 | subdrv = &g2d->subdrv; | |
1435 | subdrv->dev = dev; | |
d87342c1 ID |
1436 | subdrv->probe = g2d_subdrv_probe; |
1437 | subdrv->remove = g2d_subdrv_remove; | |
d7f1642c JS |
1438 | subdrv->open = g2d_open; |
1439 | subdrv->close = g2d_close; | |
1440 | ||
1441 | ret = exynos_drm_subdrv_register(subdrv); | |
1442 | if (ret < 0) { | |
1443 | dev_err(dev, "failed to register drm g2d device\n"); | |
b7675933 | 1444 | goto err_put_clk; |
d7f1642c JS |
1445 | } |
1446 | ||
1447 | dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n", | |
1448 | G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER); | |
1449 | ||
1450 | return 0; | |
1451 | ||
d7f1642c JS |
1452 | err_put_clk: |
1453 | pm_runtime_disable(dev); | |
d7f1642c JS |
1454 | err_destroy_workqueue: |
1455 | destroy_workqueue(g2d->g2d_workq); | |
1456 | err_destroy_slab: | |
1457 | kmem_cache_destroy(g2d->runqueue_slab); | |
d7f1642c JS |
1458 | return ret; |
1459 | } | |
1460 | ||
56550d94 | 1461 | static int g2d_remove(struct platform_device *pdev) |
d7f1642c JS |
1462 | { |
1463 | struct g2d_data *g2d = platform_get_drvdata(pdev); | |
1464 | ||
1465 | cancel_work_sync(&g2d->runqueue_work); | |
1466 | exynos_drm_subdrv_unregister(&g2d->subdrv); | |
d7f1642c JS |
1467 | |
1468 | while (g2d->runqueue_node) { | |
1469 | g2d_free_runqueue_node(g2d, g2d->runqueue_node); | |
1470 | g2d->runqueue_node = g2d_get_runqueue_node(g2d); | |
1471 | } | |
1472 | ||
d7f1642c | 1473 | pm_runtime_disable(&pdev->dev); |
d7f1642c JS |
1474 | |
1475 | g2d_fini_cmdlist(g2d); | |
1476 | destroy_workqueue(g2d->g2d_workq); | |
1477 | kmem_cache_destroy(g2d->runqueue_slab); | |
d7f1642c JS |
1478 | |
1479 | return 0; | |
1480 | } | |
1481 | ||
1482 | #ifdef CONFIG_PM_SLEEP | |
1483 | static int g2d_suspend(struct device *dev) | |
1484 | { | |
1485 | struct g2d_data *g2d = dev_get_drvdata(dev); | |
1486 | ||
1487 | mutex_lock(&g2d->runqueue_mutex); | |
1488 | g2d->suspended = true; | |
1489 | mutex_unlock(&g2d->runqueue_mutex); | |
1490 | ||
1491 | while (g2d->runqueue_node) | |
1492 | /* FIXME: good range? */ | |
1493 | usleep_range(500, 1000); | |
1494 | ||
43829731 | 1495 | flush_work(&g2d->runqueue_work); |
d7f1642c JS |
1496 | |
1497 | return 0; | |
1498 | } | |
1499 | ||
1500 | static int g2d_resume(struct device *dev) | |
1501 | { | |
1502 | struct g2d_data *g2d = dev_get_drvdata(dev); | |
1503 | ||
1504 | g2d->suspended = false; | |
1505 | g2d_exec_runqueue(g2d); | |
1506 | ||
1507 | return 0; | |
1508 | } | |
1509 | #endif | |
1510 | ||
b10d6350 ID |
1511 | #ifdef CONFIG_PM_RUNTIME |
1512 | static int g2d_runtime_suspend(struct device *dev) | |
1513 | { | |
1514 | struct g2d_data *g2d = dev_get_drvdata(dev); | |
1515 | ||
1516 | clk_disable_unprepare(g2d->gate_clk); | |
1517 | ||
1518 | return 0; | |
1519 | } | |
1520 | ||
1521 | static int g2d_runtime_resume(struct device *dev) | |
1522 | { | |
1523 | struct g2d_data *g2d = dev_get_drvdata(dev); | |
1524 | int ret; | |
1525 | ||
1526 | ret = clk_prepare_enable(g2d->gate_clk); | |
1527 | if (ret < 0) | |
1528 | dev_warn(dev, "failed to enable clock.\n"); | |
1529 | ||
1530 | return ret; | |
1531 | } | |
1532 | #endif | |
1533 | ||
1534 | static const struct dev_pm_ops g2d_pm_ops = { | |
1535 | SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume) | |
1536 | SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL) | |
1537 | }; | |
d7f1642c | 1538 | |
95fc6337 AK |
1539 | static const struct of_device_id exynos_g2d_match[] = { |
1540 | { .compatible = "samsung,exynos5250-g2d" }, | |
1541 | {}, | |
1542 | }; | |
95fc6337 | 1543 | |
d7f1642c JS |
1544 | struct platform_driver g2d_driver = { |
1545 | .probe = g2d_probe, | |
56550d94 | 1546 | .remove = g2d_remove, |
d7f1642c JS |
1547 | .driver = { |
1548 | .name = "s5p-g2d", | |
1549 | .owner = THIS_MODULE, | |
1550 | .pm = &g2d_pm_ops, | |
61c48fbf | 1551 | .of_match_table = exynos_g2d_match, |
d7f1642c JS |
1552 | }, |
1553 | }; |