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d8408326 SWK |
1 | /* exynos_drm_hdmi.h |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authoer: Inki Dae <inki.dae@samsung.com> | |
5 | * | |
d81aecb5 ID |
6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
d8408326 SWK |
10 | */ |
11 | ||
12 | #ifndef _EXYNOS_DRM_HDMI_H_ | |
13 | #define _EXYNOS_DRM_HDMI_H_ | |
14 | ||
cf8fc4f1 JS |
15 | #define MIXER_WIN_NR 3 |
16 | #define MIXER_DEFAULT_WIN 0 | |
17 | ||
d8408326 SWK |
18 | /* |
19 | * exynos hdmi common context structure. | |
20 | * | |
21 | * @drm_dev: pointer to drm_device. | |
22 | * @ctx: pointer to the context of specific device driver. | |
23 | * this context should be hdmi_context or mixer_context. | |
24 | */ | |
25 | struct exynos_drm_hdmi_context { | |
26 | struct drm_device *drm_dev; | |
27 | void *ctx; | |
28 | }; | |
29 | ||
578b6065 JS |
30 | struct exynos_hdmi_ops { |
31 | /* display */ | |
d8408326 | 32 | bool (*is_connected)(void *ctx); |
9c08e4ba RS |
33 | struct edid *(*get_edid)(void *ctx, |
34 | struct drm_connector *connector); | |
438c0f85 | 35 | int (*check_timing)(void *ctx, struct fb_videomode *timing); |
d8408326 | 36 | int (*power_on)(void *ctx, int mode); |
d8408326 | 37 | |
578b6065 | 38 | /* manager */ |
d8408326 | 39 | void (*mode_set)(void *ctx, void *mode); |
1de425b0 ID |
40 | void (*get_max_resol)(void *ctx, unsigned int *width, |
41 | unsigned int *height); | |
d8408326 | 42 | void (*commit)(void *ctx); |
cf8fc4f1 | 43 | void (*dpms)(void *ctx, int mode); |
d8408326 SWK |
44 | }; |
45 | ||
578b6065 JS |
46 | struct exynos_mixer_ops { |
47 | /* manager */ | |
1055b39f | 48 | int (*iommu_on)(void *ctx, bool enable); |
d8408326 SWK |
49 | int (*enable_vblank)(void *ctx, int pipe); |
50 | void (*disable_vblank)(void *ctx); | |
8137a2e2 | 51 | void (*wait_for_vblank)(void *ctx); |
cf8fc4f1 | 52 | void (*dpms)(void *ctx, int mode); |
578b6065 JS |
53 | |
54 | /* overlay */ | |
d8408326 SWK |
55 | void (*win_mode_set)(void *ctx, struct exynos_drm_overlay *overlay); |
56 | void (*win_commit)(void *ctx, int zpos); | |
57 | void (*win_disable)(void *ctx, int zpos); | |
438c0f85 RS |
58 | |
59 | /* display */ | |
60 | int (*check_timing)(void *ctx, struct fb_videomode *timing); | |
d8408326 SWK |
61 | }; |
62 | ||
768c3059 RS |
63 | void exynos_hdmi_drv_attach(struct exynos_drm_hdmi_context *ctx); |
64 | void exynos_mixer_drv_attach(struct exynos_drm_hdmi_context *ctx); | |
578b6065 JS |
65 | void exynos_hdmi_ops_register(struct exynos_hdmi_ops *ops); |
66 | void exynos_mixer_ops_register(struct exynos_mixer_ops *ops); | |
d8408326 | 67 | #endif |