[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_plane.c

/*
 * Copyright (C) 2011 Samsung Electronics Co.Ltd
 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#include <drm/drmP.h>

#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_plane_helper.h>
#include <drm/exynos_drm.h>
#include "exynos_drm_drv.h"
#include "exynos_drm_crtc.h"
#include "exynos_drm_fb.h"
#include "exynos_drm_gem.h"
#include "exynos_drm_plane.h"

/*
 * This function is to get X or Y size shown via screen. This needs length and
 * start position of CRTC.
 *
 *      <--- length --->
 * CRTC ----------------
 *      ^ start        ^ end
 *
 * There are six cases from a to f.
 *
 *             <----- SCREEN ----->
 *             0                 last
 *   ----------|------------------|----------
 * CRTCs
 * a -------
 *        b -------
 *        c --------------------------
 *                 d --------
 *                           e -------
 *                                  f -------
 */
static int exynos_plane_get_size(int start, unsigned length, unsigned last)
{
	int end = start + length;
	int size = 0;

	if (start <= 0) {
		if (end > 0)
			size = min_t(unsigned, end, last);
	} else if (start <= last) {
		size = min_t(unsigned, last - start, length);
	}

	return size;
}

static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)
{
	struct drm_plane_state *state = &exynos_state->base;
	struct drm_crtc *crtc = state->crtc;
	struct drm_crtc_state *crtc_state =
			drm_atomic_get_existing_crtc_state(state->state, crtc);
	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
	int crtc_x, crtc_y;
	unsigned int crtc_w, crtc_h;
	unsigned int src_x, src_y;
	unsigned int src_w, src_h;
	unsigned int actual_w;
	unsigned int actual_h;

	/*
	 * The original src/dest coordinates are stored in exynos_state->base,
	 * but we want to keep another copy internal to our driver that we can
	 * clip/modify ourselves.
	 */

	crtc_x = state->crtc_x;
	crtc_y = state->crtc_y;
	crtc_w = state->crtc_w;
	crtc_h = state->crtc_h;

	src_x = state->src_x >> 16;
	src_y = state->src_y >> 16;
	src_w = state->src_w >> 16;
	src_h = state->src_h >> 16;

	/* set ratio */
	exynos_state->h_ratio = (src_w << 16) / crtc_w;
	exynos_state->v_ratio = (src_h << 16) / crtc_h;

	/* clip to visible area */
	actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
	actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);

	if (crtc_x < 0) {
		if (actual_w)
			src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
		crtc_x = 0;
	}

	if (crtc_y < 0) {
		if (actual_h)
			src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
		crtc_y = 0;
	}

	/* set drm framebuffer data. */
	exynos_state->src.x = src_x;
	exynos_state->src.y = src_y;
	exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16;
	exynos_state->src.h = (actual_h * exynos_state->v_ratio) >> 16;

	/* set plane range to be displayed. */
	exynos_state->crtc.x = crtc_x;
	exynos_state->crtc.y = crtc_y;
	exynos_state->crtc.w = actual_w;
	exynos_state->crtc.h = actual_h;

	DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
			exynos_state->crtc.x, exynos_state->crtc.y,
			exynos_state->crtc.w, exynos_state->crtc.h);
}

static void exynos_drm_plane_reset(struct drm_plane *plane)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_plane_state *exynos_state;

	if (plane->state) {
		exynos_state = to_exynos_plane_state(plane->state);
		if (exynos_state->base.fb)
			drm_framebuffer_unreference(exynos_state->base.fb);
		kfree(exynos_state);
		plane->state = NULL;
	}

	exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	if (exynos_state) {
		exynos_state->zpos = exynos_plane->config->zpos;
		plane->state = &exynos_state->base;
		plane->state->plane = plane;
	}
}

static struct drm_plane_state *
exynos_drm_plane_duplicate_state(struct drm_plane *plane)
{
	struct exynos_drm_plane_state *exynos_state;
	struct exynos_drm_plane_state *copy;

	exynos_state = to_exynos_plane_state(plane->state);
	copy = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	if (!copy)
		return NULL;

	__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);
	copy->zpos = exynos_state->zpos;
	return &copy->base;
}

static void exynos_drm_plane_destroy_state(struct drm_plane *plane,
					   struct drm_plane_state *old_state)
{
	struct exynos_drm_plane_state *old_exynos_state =
					to_exynos_plane_state(old_state);
	__drm_atomic_helper_plane_destroy_state(plane, old_state);
	kfree(old_exynos_state);
}

static int exynos_drm_plane_atomic_set_property(struct drm_plane *plane,
						struct drm_plane_state *state,
						struct drm_property *property,
						uint64_t val)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_plane_state *exynos_state =
					to_exynos_plane_state(state);
	struct exynos_drm_private *dev_priv = plane->dev->dev_private;
	const struct exynos_drm_plane_config *config = exynos_plane->config;

	if (property == dev_priv->plane_zpos_property &&
	    (config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS))
		exynos_state->zpos = val;
	else
		return -EINVAL;

	return 0;
}

static int exynos_drm_plane_atomic_get_property(struct drm_plane *plane,
					  const struct drm_plane_state *state,
					  struct drm_property *property,
					  uint64_t *val)
{
	const struct exynos_drm_plane_state *exynos_state =
		container_of(state, const struct exynos_drm_plane_state, base);
	struct exynos_drm_private *dev_priv = plane->dev->dev_private;

	if (property == dev_priv->plane_zpos_property)
		*val = exynos_state->zpos;
	else
		return -EINVAL;

	return 0;
}

static struct drm_plane_funcs exynos_plane_funcs = {
	.update_plane	= drm_atomic_helper_update_plane,
	.disable_plane	= drm_atomic_helper_disable_plane,
	.destroy	= drm_plane_cleanup,
	.set_property	= drm_atomic_helper_plane_set_property,
	.reset		= exynos_drm_plane_reset,
	.atomic_duplicate_state = exynos_drm_plane_duplicate_state,
	.atomic_destroy_state = exynos_drm_plane_destroy_state,
	.atomic_set_property = exynos_drm_plane_atomic_set_property,
	.atomic_get_property = exynos_drm_plane_atomic_get_property,
};

static int
exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
			    struct exynos_drm_plane_state *state)
{
	bool width_ok = false, height_ok = false;

	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
		return 0;

	if (state->src.w == state->crtc.w)
		width_ok = true;

	if (state->src.h == state->crtc.h)
		height_ok = true;

	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	    state->h_ratio == (1 << 15))
		width_ok = true;

	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	    state->v_ratio == (1 << 15))
		height_ok = true;

	if (width_ok & height_ok)
		return 0;

	DRM_DEBUG_KMS("scaling mode is not supported");
	return -ENOTSUPP;
}

static int exynos_plane_atomic_check(struct drm_plane *plane,
				     struct drm_plane_state *state)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_plane_state *exynos_state =
						to_exynos_plane_state(state);
	int ret = 0;

	if (!state->crtc || !state->fb)
		return 0;

	/* translate state into exynos_state */
	exynos_plane_mode_set(exynos_state);

	ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
	return ret;
}

static void exynos_plane_atomic_update(struct drm_plane *plane,
				       struct drm_plane_state *old_state)
{
	struct drm_plane_state *state = plane->state;
	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(state->crtc);
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);

	if (!state->crtc)
		return;

	plane->crtc = state->crtc;
	exynos_plane->pending_fb = state->fb;

	if (exynos_crtc->ops->update_plane)
		exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
}

static void exynos_plane_atomic_disable(struct drm_plane *plane,
					struct drm_plane_state *old_state)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);

	if (!old_state->crtc)
		return;

	if (exynos_crtc->ops->disable_plane)
		exynos_crtc->ops->disable_plane(exynos_crtc, exynos_plane);
}

static const struct drm_plane_helper_funcs plane_helper_funcs = {
	.atomic_check = exynos_plane_atomic_check,
	.atomic_update = exynos_plane_atomic_update,
	.atomic_disable = exynos_plane_atomic_disable,
};

static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
					      unsigned int zpos)
{
	struct drm_device *dev = plane->dev;
	struct exynos_drm_private *dev_priv = dev->dev_private;
	struct drm_property *prop;

	prop = dev_priv->plane_zpos_property;
	if (!prop) {
		prop = drm_property_create_range(dev, 0, "zpos",
						 0, MAX_PLANE - 1);
		if (!prop)
			return;

		dev_priv->plane_zpos_property = prop;
	}

	drm_object_attach_property(&plane->base, prop, zpos);
}

int exynos_plane_init(struct drm_device *dev,
		      struct exynos_drm_plane *exynos_plane,
		      unsigned int index, unsigned long possible_crtcs,
		      const struct exynos_drm_plane_config *config)
{
	int err;

	err = drm_universal_plane_init(dev, &exynos_plane->base,
				       possible_crtcs,
				       &exynos_plane_funcs,
				       config->pixel_formats,
				       config->num_pixel_formats,
				       config->type, NULL);
	if (err) {
		DRM_ERROR("failed to initialize plane\n");
		return err;
	}

	drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);

	exynos_plane->index = index;
	exynos_plane->config = config;

	exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos);

	return 0;
}
Commit	Line	Data
864ee9e6 JS	1	/*
	2	* Copyright (C) 2011 Samsung Electronics Co.Ltd
	3	* Authors: Joonyoung Shim <jy0922.shim@samsung.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2 of the License, or (at your
	8	* option) any later version.
	9	*
	10	*/
	11
760285e7	12	#include <drm/drmP.h>
864ee9e6	13
311521e2	14	#include <drm/drm_atomic.h>
4ea9526b	15	#include <drm/drm_atomic_helper.h>
311521e2 AH	16	#include <drm/drm_plane_helper.h>
311521e2 AH	17	#include <drm/exynos_drm.h>
864ee9e6	18	#include "exynos_drm_drv.h"
080be03d	19	#include "exynos_drm_crtc.h"
4070d212 JS	20	#include "exynos_drm_fb.h"
4070d212 JS	21	#include "exynos_drm_gem.h"
e30655d0	22	#include "exynos_drm_plane.h"
864ee9e6	23
2ab97921 JS	24	/*
	25	* This function is to get X or Y size shown via screen. This needs length and
	26	* start position of CRTC.
	27	*
	28	* <--- length --->
	29	* CRTC ----------------
	30	* ^ start ^ end
	31	*
60a705a9	32	* There are six cases from a to f.
2ab97921 JS	33	*
	34	* <----- SCREEN ----->
	35	* 0 last
	36	* ----------\|------------------\|----------
	37	* CRTCs
	38	* a -------
	39	* b -------
	40	* c --------------------------
	41	* d --------
	42	* e -------
	43	* f -------
	44	*/
	45	static int exynos_plane_get_size(int start, unsigned length, unsigned last)
	46	{
	47	int end = start + length;
	48	int size = 0;
	49
	50	if (start <= 0) {
	51	if (end > 0)
	52	size = min_t(unsigned, end, last);
	53	} else if (start <= last) {
	54	size = min_t(unsigned, last - start, length);
	55	}
	56
	57	return size;
	58	}
	59
0114f404	60	static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)
adf5691c	61	{
0114f404	62	struct drm_plane_state *state = &exynos_state->base;
311521e2 AH	63	struct drm_crtc *crtc = state->crtc;
	64	struct drm_crtc_state *crtc_state =
	65	drm_atomic_get_existing_crtc_state(state->state, crtc);
	66	struct drm_display_mode *mode = &crtc_state->adjusted_mode;
0114f404 MS	67	int crtc_x, crtc_y;
	68	unsigned int crtc_w, crtc_h;
	69	unsigned int src_x, src_y;
	70	unsigned int src_w, src_h;
adf5691c GP	71	unsigned int actual_w;
	72	unsigned int actual_h;
	73
0114f404 MS	74	/*
	75	* The original src/dest coordinates are stored in exynos_state->base,
	76	* but we want to keep another copy internal to our driver that we can
	77	* clip/modify ourselves.
	78	*/
	79
	80	crtc_x = state->crtc_x;
	81	crtc_y = state->crtc_y;
	82	crtc_w = state->crtc_w;
	83	crtc_h = state->crtc_h;
	84
	85	src_x = state->src_x >> 16;
	86	src_y = state->src_y >> 16;
	87	src_w = state->src_w >> 16;
	88	src_h = state->src_h >> 16;
	89
d16a11a0 MS	90	/* set ratio */
	91	exynos_state->h_ratio = (src_w << 16) / crtc_w;
	92	exynos_state->v_ratio = (src_h << 16) / crtc_h;
	93
	94	/* clip to visible area */
020e79de JS	95	actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
020e79de JS	96	actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);
2ab97921 JS	97
	98	if (crtc_x < 0) {
	99	if (actual_w)
d16a11a0	100	src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
2ab97921 JS	101	crtc_x = 0;
	102	}
	103
	104	if (crtc_y < 0) {
	105	if (actual_h)
d16a11a0	106	src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
2ab97921 JS	107	crtc_y = 0;
2ab97921 JS	108	}
4070d212 JS	109
4070d212 JS	110	/* set drm framebuffer data. */
0114f404 MS	111	exynos_state->src.x = src_x;
	112	exynos_state->src.y = src_y;
	113	exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16;
	114	exynos_state->src.h = (actual_h * exynos_state->v_ratio) >> 16;
8837deea GP	115
8837deea GP	116	/* set plane range to be displayed. */
0114f404 MS	117	exynos_state->crtc.x = crtc_x;
	118	exynos_state->crtc.y = crtc_y;
	119	exynos_state->crtc.w = actual_w;
	120	exynos_state->crtc.h = actual_h;
d88d2463	121
8837deea	122	DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
0114f404 MS	123	exynos_state->crtc.x, exynos_state->crtc.y,
	124	exynos_state->crtc.w, exynos_state->crtc.h);
	125	}
	126
	127	static void exynos_drm_plane_reset(struct drm_plane *plane)
	128	{
0ea72405	129	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
0114f404 MS	130	struct exynos_drm_plane_state *exynos_state;
	131
	132	if (plane->state) {
	133	exynos_state = to_exynos_plane_state(plane->state);
	134	if (exynos_state->base.fb)
	135	drm_framebuffer_unreference(exynos_state->base.fb);
	136	kfree(exynos_state);
	137	plane->state = NULL;
	138	}
	139
	140	exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	141	if (exynos_state) {
0ea72405	142	exynos_state->zpos = exynos_plane->config->zpos;
0114f404 MS	143	plane->state = &exynos_state->base;
	144	plane->state->plane = plane;
	145	}
	146	}
	147
	148	static struct drm_plane_state *
	149	exynos_drm_plane_duplicate_state(struct drm_plane *plane)
	150	{
	151	struct exynos_drm_plane_state *exynos_state;
	152	struct exynos_drm_plane_state *copy;
	153
	154	exynos_state = to_exynos_plane_state(plane->state);
	155	copy = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
	156	if (!copy)
	157	return NULL;
4070d212	158
0114f404	159	__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);
0ea72405	160	copy->zpos = exynos_state->zpos;
0114f404 MS	161	return &copy->base;
0114f404 MS	162	}
4070d212	163
0114f404 MS	164	static void exynos_drm_plane_destroy_state(struct drm_plane *plane,
	165	struct drm_plane_state *old_state)
	166	{
	167	struct exynos_drm_plane_state *old_exynos_state =
	168	to_exynos_plane_state(old_state);
	169	__drm_atomic_helper_plane_destroy_state(plane, old_state);
	170	kfree(old_exynos_state);
4070d212 JS	171	}
4070d212 JS	172
0ea72405 MS	173	static int exynos_drm_plane_atomic_set_property(struct drm_plane *plane,
	174	struct drm_plane_state *state,
	175	struct drm_property *property,
	176	uint64_t val)
	177	{
	178	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	179	struct exynos_drm_plane_state *exynos_state =
	180	to_exynos_plane_state(state);
	181	struct exynos_drm_private *dev_priv = plane->dev->dev_private;
	182	const struct exynos_drm_plane_config *config = exynos_plane->config;
	183
	184	if (property == dev_priv->plane_zpos_property &&
	185	(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS))
	186	exynos_state->zpos = val;
	187	else
	188	return -EINVAL;
	189
	190	return 0;
	191	}
	192
	193	static int exynos_drm_plane_atomic_get_property(struct drm_plane *plane,
	194	const struct drm_plane_state *state,
	195	struct drm_property *property,
	196	uint64_t *val)
	197	{
	198	const struct exynos_drm_plane_state *exynos_state =
	199	container_of(state, const struct exynos_drm_plane_state, base);
	200	struct exynos_drm_private *dev_priv = plane->dev->dev_private;
	201
	202	if (property == dev_priv->plane_zpos_property)
	203	*val = exynos_state->zpos;
	204	else
	205	return -EINVAL;
	206
	207	return 0;
	208	}
	209
864ee9e6	210	static struct drm_plane_funcs exynos_plane_funcs = {
910874a8 GP	211	.update_plane = drm_atomic_helper_update_plane,
910874a8 GP	212	.disable_plane = drm_atomic_helper_disable_plane,
97464d7d	213	.destroy = drm_plane_cleanup,
0ea72405	214	.set_property = drm_atomic_helper_plane_set_property,
0114f404 MS	215	.reset = exynos_drm_plane_reset,
	216	.atomic_duplicate_state = exynos_drm_plane_duplicate_state,
	217	.atomic_destroy_state = exynos_drm_plane_destroy_state,
0ea72405 MS	218	.atomic_set_property = exynos_drm_plane_atomic_set_property,
0ea72405 MS	219	.atomic_get_property = exynos_drm_plane_atomic_get_property,
864ee9e6 JS	220	};
864ee9e6 JS	221
6178d3d1 MS	222	static int
	223	exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
	224	struct exynos_drm_plane_state *state)
	225	{
	226	bool width_ok = false, height_ok = false;
	227
	228	if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
	229	return 0;
	230
	231	if (state->src.w == state->crtc.w)
	232	width_ok = true;
	233
	234	if (state->src.h == state->crtc.h)
	235	height_ok = true;
	236
	237	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	238	state->h_ratio == (1 << 15))
	239	width_ok = true;
	240
	241	if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
	242	state->v_ratio == (1 << 15))
	243	height_ok = true;
	244
	245	if (width_ok & height_ok)
	246	return 0;
	247
	248	DRM_DEBUG_KMS("scaling mode is not supported");
	249	return -ENOTSUPP;
	250	}
	251
43dbdad2 GP	252	static int exynos_plane_atomic_check(struct drm_plane *plane,
	253	struct drm_plane_state *state)
	254	{
d5f5223c	255	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
0114f404 MS	256	struct exynos_drm_plane_state *exynos_state =
	257	to_exynos_plane_state(state);
	258	int ret = 0;
d5f5223c	259
0114f404	260	if (!state->crtc \|\| !state->fb)
d5f5223c GP	261	return 0;
d5f5223c GP	262
0114f404 MS	263	/* translate state into exynos_state */
0114f404 MS	264	exynos_plane_mode_set(exynos_state);
d5f5223c	265
6178d3d1	266	ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
0114f404	267	return ret;
43dbdad2 GP	268	}
	269
	270	static void exynos_plane_atomic_update(struct drm_plane *plane,
	271	struct drm_plane_state *old_state)
	272	{
	273	struct drm_plane_state *state = plane->state;
d5f5223c GP	274	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(state->crtc);
d5f5223c GP	275	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
43dbdad2 GP	276
	277	if (!state->crtc)
	278	return;
	279
0114f404	280	plane->crtc = state->crtc;
822f6dfd GP	281	exynos_plane->pending_fb = state->fb;
822f6dfd GP	282
9cc7610a	283	if (exynos_crtc->ops->update_plane)
1e1d1393	284	exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
43dbdad2 GP	285	}
43dbdad2 GP	286
b744868c GP	287	static void exynos_plane_atomic_disable(struct drm_plane *plane,
	288	struct drm_plane_state *old_state)
	289	{
	290	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	291	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);
	292
	293	if (!old_state->crtc)
	294	return;
	295
9cc7610a	296	if (exynos_crtc->ops->disable_plane)
0114f404	297	exynos_crtc->ops->disable_plane(exynos_crtc, exynos_plane);
b744868c GP	298	}
b744868c GP	299
43dbdad2 GP	300	static const struct drm_plane_helper_funcs plane_helper_funcs = {
	301	.atomic_check = exynos_plane_atomic_check,
	302	.atomic_update = exynos_plane_atomic_update,
b744868c	303	.atomic_disable = exynos_plane_atomic_disable,
43dbdad2 GP	304	};
43dbdad2 GP	305
6e2a3b66 GP	306	static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
6e2a3b66 GP	307	unsigned int zpos)
00ae67cf JS	308	{
	309	struct drm_device *dev = plane->dev;
	310	struct exynos_drm_private *dev_priv = dev->dev_private;
	311	struct drm_property *prop;
	312
00ae67cf JS	313	prop = dev_priv->plane_zpos_property;
00ae67cf JS	314	if (!prop) {
0ea72405 MS	315	prop = drm_property_create_range(dev, 0, "zpos",
0ea72405 MS	316	0, MAX_PLANE - 1);
00ae67cf JS	317	if (!prop)
	318	return;
	319
	320	dev_priv->plane_zpos_property = prop;
	321	}
	322
6e2a3b66	323	drm_object_attach_property(&plane->base, prop, zpos);
00ae67cf JS	324	}
00ae67cf JS	325
7ee14cdc GP	326	int exynos_plane_init(struct drm_device *dev,
7ee14cdc GP	327	struct exynos_drm_plane *exynos_plane,
40bdfb0a	328	unsigned int index, unsigned long possible_crtcs,
fd2d2fc2	329	const struct exynos_drm_plane_config *config)
864ee9e6	330	{
b5d2eb3b	331	int err;
864ee9e6	332
fd2d2fc2 MS	333	err = drm_universal_plane_init(dev, &exynos_plane->base,
	334	possible_crtcs,
	335	&exynos_plane_funcs,
	336	config->pixel_formats,
	337	config->num_pixel_formats,
870a1718	338	config->type, NULL);
b5d2eb3b JS	339	if (err) {
b5d2eb3b JS	340	DRM_ERROR("failed to initialize plane\n");
7ee14cdc	341	return err;
b5d2eb3b JS	342	}
b5d2eb3b JS	343
43dbdad2 GP	344	drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);
43dbdad2 GP	345
40bdfb0a	346	exynos_plane->index = index;
fd2d2fc2	347	exynos_plane->config = config;
6e2a3b66	348
0ea72405	349	exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos);
864ee9e6	350
7ee14cdc	351	return 0;
864ee9e6	352	}