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864ee9e6 JS |
1 | /* |
2 | * Copyright (C) 2011 Samsung Electronics Co.Ltd | |
3 | * Authors: Joonyoung Shim <jy0922.shim@samsung.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License as published by the | |
7 | * Free Software Foundation; either version 2 of the License, or (at your | |
8 | * option) any later version. | |
9 | * | |
10 | */ | |
11 | ||
12 | #include "drmP.h" | |
13 | ||
14 | #include "exynos_drm.h" | |
864ee9e6 JS |
15 | #include "exynos_drm_drv.h" |
16 | #include "exynos_drm_encoder.h" | |
4070d212 JS |
17 | #include "exynos_drm_fb.h" |
18 | #include "exynos_drm_gem.h" | |
864ee9e6 | 19 | |
fdc575e7 JS |
20 | #define to_exynos_plane(x) container_of(x, struct exynos_plane, base) |
21 | ||
864ee9e6 JS |
22 | struct exynos_plane { |
23 | struct drm_plane base; | |
24 | struct exynos_drm_overlay overlay; | |
25 | bool enabled; | |
26 | }; | |
27 | ||
ba3849d5 EK |
28 | static const uint32_t formats[] = { |
29 | DRM_FORMAT_XRGB8888, | |
6b1c762d SWK |
30 | DRM_FORMAT_ARGB8888, |
31 | DRM_FORMAT_NV12, | |
6b1c762d | 32 | DRM_FORMAT_NV12MT, |
ba3849d5 EK |
33 | }; |
34 | ||
4070d212 JS |
35 | int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc, |
36 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, | |
37 | unsigned int crtc_w, unsigned int crtc_h, | |
38 | uint32_t src_x, uint32_t src_y, | |
39 | uint32_t src_w, uint32_t src_h) | |
40 | { | |
41 | struct exynos_plane *exynos_plane = to_exynos_plane(plane); | |
42 | struct exynos_drm_overlay *overlay = &exynos_plane->overlay; | |
43 | unsigned int actual_w; | |
44 | unsigned int actual_h; | |
45 | int nr; | |
46 | int i; | |
47 | ||
48 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | |
49 | ||
50 | nr = exynos_drm_format_num_buffers(fb->pixel_format); | |
51 | for (i = 0; i < nr; i++) { | |
52 | struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i); | |
53 | ||
54 | if (!buffer) { | |
55 | DRM_LOG_KMS("buffer is null\n"); | |
56 | return -EFAULT; | |
57 | } | |
58 | ||
59 | overlay->dma_addr[i] = buffer->dma_addr; | |
60 | overlay->vaddr[i] = buffer->kvaddr; | |
61 | ||
62 | DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n", | |
63 | i, (unsigned long)overlay->vaddr[i], | |
64 | (unsigned long)overlay->dma_addr[i]); | |
65 | } | |
66 | ||
67 | actual_w = min((unsigned)(crtc->mode.hdisplay - crtc_x), crtc_w); | |
68 | actual_h = min((unsigned)(crtc->mode.vdisplay - crtc_y), crtc_h); | |
69 | ||
70 | /* set drm framebuffer data. */ | |
71 | overlay->fb_x = src_x; | |
72 | overlay->fb_y = src_y; | |
73 | overlay->fb_width = fb->width; | |
74 | overlay->fb_height = fb->height; | |
75 | overlay->src_width = src_w; | |
76 | overlay->src_height = src_h; | |
77 | overlay->bpp = fb->bits_per_pixel; | |
78 | overlay->pitch = fb->pitches[0]; | |
79 | overlay->pixel_format = fb->pixel_format; | |
80 | ||
81 | /* set overlay range to be displayed. */ | |
82 | overlay->crtc_x = crtc_x; | |
83 | overlay->crtc_y = crtc_y; | |
84 | overlay->crtc_width = actual_w; | |
85 | overlay->crtc_height = actual_h; | |
86 | ||
87 | /* set drm mode data. */ | |
88 | overlay->mode_width = crtc->mode.hdisplay; | |
89 | overlay->mode_height = crtc->mode.vdisplay; | |
90 | overlay->refresh = crtc->mode.vrefresh; | |
91 | overlay->scan_flag = crtc->mode.flags; | |
92 | ||
93 | DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)", | |
94 | overlay->crtc_x, overlay->crtc_y, | |
95 | overlay->crtc_width, overlay->crtc_height); | |
96 | ||
97 | exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set); | |
98 | ||
99 | return 0; | |
100 | } | |
101 | ||
102 | void exynos_plane_commit(struct drm_plane *plane) | |
103 | { | |
104 | struct exynos_plane *exynos_plane = to_exynos_plane(plane); | |
105 | struct exynos_drm_overlay *overlay = &exynos_plane->overlay; | |
106 | ||
107 | exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, | |
108 | exynos_drm_encoder_plane_commit); | |
cf5188ac JS |
109 | } |
110 | ||
111 | void exynos_plane_dpms(struct drm_plane *plane, int mode) | |
112 | { | |
113 | struct exynos_plane *exynos_plane = to_exynos_plane(plane); | |
114 | struct exynos_drm_overlay *overlay = &exynos_plane->overlay; | |
115 | ||
116 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | |
117 | ||
118 | if (mode == DRM_MODE_DPMS_ON) { | |
119 | if (exynos_plane->enabled) | |
120 | return; | |
121 | ||
122 | exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, | |
123 | exynos_drm_encoder_plane_enable); | |
4070d212 | 124 | |
cf5188ac JS |
125 | exynos_plane->enabled = true; |
126 | } else { | |
127 | if (!exynos_plane->enabled) | |
128 | return; | |
129 | ||
130 | exynos_drm_fn_encoder(plane->crtc, &overlay->zpos, | |
131 | exynos_drm_encoder_plane_disable); | |
132 | ||
133 | exynos_plane->enabled = false; | |
134 | } | |
4070d212 JS |
135 | } |
136 | ||
864ee9e6 JS |
137 | static int |
138 | exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc, | |
139 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, | |
140 | unsigned int crtc_w, unsigned int crtc_h, | |
141 | uint32_t src_x, uint32_t src_y, | |
142 | uint32_t src_w, uint32_t src_h) | |
143 | { | |
864ee9e6 JS |
144 | int ret; |
145 | ||
146 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | |
147 | ||
4070d212 JS |
148 | ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y, |
149 | crtc_w, crtc_h, src_x >> 16, src_y >> 16, | |
150 | src_w >> 16, src_h >> 16); | |
864ee9e6 JS |
151 | if (ret < 0) |
152 | return ret; | |
153 | ||
4070d212 JS |
154 | plane->crtc = crtc; |
155 | plane->fb = crtc->fb; | |
864ee9e6 | 156 | |
4070d212 | 157 | exynos_plane_commit(plane); |
cf5188ac | 158 | exynos_plane_dpms(plane, DRM_MODE_DPMS_ON); |
864ee9e6 JS |
159 | |
160 | return 0; | |
161 | } | |
162 | ||
163 | static int exynos_disable_plane(struct drm_plane *plane) | |
164 | { | |
864ee9e6 JS |
165 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); |
166 | ||
cf5188ac | 167 | exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF); |
864ee9e6 JS |
168 | |
169 | return 0; | |
170 | } | |
171 | ||
172 | static void exynos_plane_destroy(struct drm_plane *plane) | |
173 | { | |
fdc575e7 | 174 | struct exynos_plane *exynos_plane = to_exynos_plane(plane); |
864ee9e6 JS |
175 | |
176 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | |
177 | ||
178 | exynos_disable_plane(plane); | |
179 | drm_plane_cleanup(plane); | |
180 | kfree(exynos_plane); | |
181 | } | |
182 | ||
00ae67cf JS |
183 | static int exynos_plane_set_property(struct drm_plane *plane, |
184 | struct drm_property *property, | |
185 | uint64_t val) | |
186 | { | |
187 | struct drm_device *dev = plane->dev; | |
188 | struct exynos_plane *exynos_plane = to_exynos_plane(plane); | |
189 | struct exynos_drm_private *dev_priv = dev->dev_private; | |
190 | ||
191 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | |
192 | ||
193 | if (property == dev_priv->plane_zpos_property) { | |
194 | exynos_plane->overlay.zpos = val; | |
195 | return 0; | |
196 | } | |
197 | ||
198 | return -EINVAL; | |
199 | } | |
200 | ||
864ee9e6 JS |
201 | static struct drm_plane_funcs exynos_plane_funcs = { |
202 | .update_plane = exynos_update_plane, | |
203 | .disable_plane = exynos_disable_plane, | |
204 | .destroy = exynos_plane_destroy, | |
00ae67cf | 205 | .set_property = exynos_plane_set_property, |
864ee9e6 JS |
206 | }; |
207 | ||
00ae67cf JS |
208 | static void exynos_plane_attach_zpos_property(struct drm_plane *plane) |
209 | { | |
210 | struct drm_device *dev = plane->dev; | |
211 | struct exynos_drm_private *dev_priv = dev->dev_private; | |
212 | struct drm_property *prop; | |
213 | ||
214 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); | |
215 | ||
216 | prop = dev_priv->plane_zpos_property; | |
217 | if (!prop) { | |
218 | prop = drm_property_create_range(dev, 0, "zpos", 0, | |
219 | MAX_PLANE - 1); | |
220 | if (!prop) | |
221 | return; | |
222 | ||
223 | dev_priv->plane_zpos_property = prop; | |
224 | } | |
225 | ||
226 | drm_object_attach_property(&plane->base, prop, 0); | |
227 | } | |
228 | ||
b5d2eb3b JS |
229 | struct drm_plane *exynos_plane_init(struct drm_device *dev, |
230 | unsigned int possible_crtcs, bool priv) | |
864ee9e6 JS |
231 | { |
232 | struct exynos_plane *exynos_plane; | |
b5d2eb3b | 233 | int err; |
864ee9e6 | 234 | |
00ae67cf JS |
235 | DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); |
236 | ||
864ee9e6 | 237 | exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL); |
b5d2eb3b JS |
238 | if (!exynos_plane) { |
239 | DRM_ERROR("failed to allocate plane\n"); | |
240 | return NULL; | |
241 | } | |
864ee9e6 | 242 | |
b5d2eb3b | 243 | err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs, |
ba3849d5 | 244 | &exynos_plane_funcs, formats, ARRAY_SIZE(formats), |
b5d2eb3b JS |
245 | priv); |
246 | if (err) { | |
247 | DRM_ERROR("failed to initialize plane\n"); | |
248 | kfree(exynos_plane); | |
249 | return NULL; | |
250 | } | |
251 | ||
00ae67cf JS |
252 | if (priv) |
253 | exynos_plane->overlay.zpos = DEFAULT_ZPOS; | |
254 | else | |
255 | exynos_plane_attach_zpos_property(&exynos_plane->base); | |
864ee9e6 | 256 | |
00ae67cf | 257 | return &exynos_plane->base; |
864ee9e6 | 258 | } |