[deliverable/linux.git] / drivers / gpu / drm / exynos / exynos_drm_plane.c

/*
 * Copyright (C) 2011 Samsung Electronics Co.Ltd
 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#include <drm/drmP.h>

#include <drm/exynos_drm.h>
#include <drm/drm_plane_helper.h>
#include "exynos_drm_drv.h"
#include "exynos_drm_crtc.h"
#include "exynos_drm_fb.h"
#include "exynos_drm_gem.h"
#include "exynos_drm_plane.h"

static const uint32_t formats[] = {
	DRM_FORMAT_XRGB8888,
	DRM_FORMAT_ARGB8888,
	DRM_FORMAT_NV12,
};

/*
 * This function is to get X or Y size shown via screen. This needs length and
 * start position of CRTC.
 *
 *      <--- length --->
 * CRTC ----------------
 *      ^ start        ^ end
 *
 * There are six cases from a to f.
 *
 *             <----- SCREEN ----->
 *             0                 last
 *   ----------|------------------|----------
 * CRTCs
 * a -------
 *        b -------
 *        c --------------------------
 *                 d --------
 *                           e -------
 *                                  f -------
 */
static int exynos_plane_get_size(int start, unsigned length, unsigned last)
{
	int end = start + length;
	int size = 0;

	if (start <= 0) {
		if (end > 0)
			size = min_t(unsigned, end, last);
	} else if (start <= last) {
		size = min_t(unsigned, last - start, length);
	}

	return size;
}

int exynos_check_plane(struct drm_plane *plane, struct drm_framebuffer *fb)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	int nr;
	int i;

	nr = exynos_drm_fb_get_buf_cnt(fb);
	for (i = 0; i < nr; i++) {
		struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);

		if (!buffer) {
			DRM_DEBUG_KMS("buffer is null\n");
			return -EFAULT;
		}

		exynos_plane->dma_addr[i] = buffer->dma_addr;

		DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
				i, (unsigned long)exynos_plane->dma_addr[i]);
	}

	return 0;
}

void exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
			  struct drm_framebuffer *fb, int crtc_x, int crtc_y,
			  unsigned int crtc_w, unsigned int crtc_h,
			  uint32_t src_x, uint32_t src_y,
			  uint32_t src_w, uint32_t src_h)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	unsigned int actual_w;
	unsigned int actual_h;

	actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
	actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);

	if (crtc_x < 0) {
		if (actual_w)
			src_x -= crtc_x;
		crtc_x = 0;
	}

	if (crtc_y < 0) {
		if (actual_h)
			src_y -= crtc_y;
		crtc_y = 0;
	}

	/* set drm framebuffer data. */
	exynos_plane->fb_x = src_x;
	exynos_plane->fb_y = src_y;
	exynos_plane->fb_width = fb->width;
	exynos_plane->fb_height = fb->height;
	exynos_plane->src_width = src_w;
	exynos_plane->src_height = src_h;
	exynos_plane->bpp = fb->bits_per_pixel;
	exynos_plane->pitch = fb->pitches[0];
	exynos_plane->pixel_format = fb->pixel_format;

	/* set plane range to be displayed. */
	exynos_plane->crtc_x = crtc_x;
	exynos_plane->crtc_y = crtc_y;
	exynos_plane->crtc_width = actual_w;
	exynos_plane->crtc_height = actual_h;

	/* set drm mode data. */
	exynos_plane->mode_width = crtc->mode.hdisplay;
	exynos_plane->mode_height = crtc->mode.vdisplay;
	exynos_plane->refresh = crtc->mode.vrefresh;
	exynos_plane->scan_flag = crtc->mode.flags;

	DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
			exynos_plane->crtc_x, exynos_plane->crtc_y,
			exynos_plane->crtc_width, exynos_plane->crtc_height);

	plane->crtc = crtc;
}

int
exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
		     struct drm_framebuffer *fb, int crtc_x, int crtc_y,
		     unsigned int crtc_w, unsigned int crtc_h,
		     uint32_t src_x, uint32_t src_y,
		     uint32_t src_w, uint32_t src_h)
{

	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	int ret;

	ret = exynos_check_plane(plane, fb);
	if (ret < 0)
		return ret;

	exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
			      crtc_w, crtc_h, src_x >> 16, src_y >> 16,
			      src_w >> 16, src_h >> 16);

	if (exynos_crtc->ops->win_commit)
		exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos);

	return 0;
}

static int exynos_disable_plane(struct drm_plane *plane)
{
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc);

	if (exynos_crtc && exynos_crtc->ops->win_disable)
		exynos_crtc->ops->win_disable(exynos_crtc,
					      exynos_plane->zpos);

	return 0;
}

static void exynos_plane_destroy(struct drm_plane *plane)
{
	exynos_disable_plane(plane);
	drm_plane_cleanup(plane);
}

static int exynos_plane_set_property(struct drm_plane *plane,
				     struct drm_property *property,
				     uint64_t val)
{
	struct drm_device *dev = plane->dev;
	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	struct exynos_drm_private *dev_priv = dev->dev_private;

	if (property == dev_priv->plane_zpos_property) {
		exynos_plane->zpos = val;
		return 0;
	}

	return -EINVAL;
}

static struct drm_plane_funcs exynos_plane_funcs = {
	.update_plane	= exynos_update_plane,
	.disable_plane	= exynos_disable_plane,
	.destroy	= exynos_plane_destroy,
	.set_property	= exynos_plane_set_property,
};

static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
					      unsigned int zpos)
{
	struct drm_device *dev = plane->dev;
	struct exynos_drm_private *dev_priv = dev->dev_private;
	struct drm_property *prop;

	prop = dev_priv->plane_zpos_property;
	if (!prop) {
		prop = drm_property_create_range(dev, 0, "zpos", 0,
						 MAX_PLANE - 1);
		if (!prop)
			return;

		dev_priv->plane_zpos_property = prop;
	}

	drm_object_attach_property(&plane->base, prop, zpos);
}

int exynos_plane_init(struct drm_device *dev,
		      struct exynos_drm_plane *exynos_plane,
		      unsigned long possible_crtcs, enum drm_plane_type type,
		      unsigned int zpos)
{
	int err;

	err = drm_universal_plane_init(dev, &exynos_plane->base, possible_crtcs,
				       &exynos_plane_funcs, formats,
				       ARRAY_SIZE(formats), type);
	if (err) {
		DRM_ERROR("failed to initialize plane\n");
		return err;
	}

	exynos_plane->zpos = zpos;

	if (type == DRM_PLANE_TYPE_OVERLAY)
		exynos_plane_attach_zpos_property(&exynos_plane->base, zpos);

	return 0;
}
Commit	Line	Data
864ee9e6 JS	1	/*
	2	* Copyright (C) 2011 Samsung Electronics Co.Ltd
	3	* Authors: Joonyoung Shim <jy0922.shim@samsung.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License as published by the
	7	* Free Software Foundation; either version 2 of the License, or (at your
	8	* option) any later version.
	9	*
	10	*/
	11
760285e7	12	#include <drm/drmP.h>
864ee9e6	13
760285e7	14	#include <drm/exynos_drm.h>
adf5691c	15	#include <drm/drm_plane_helper.h>
864ee9e6	16	#include "exynos_drm_drv.h"
080be03d	17	#include "exynos_drm_crtc.h"
4070d212 JS	18	#include "exynos_drm_fb.h"
4070d212 JS	19	#include "exynos_drm_gem.h"
e30655d0	20	#include "exynos_drm_plane.h"
864ee9e6	21
ba3849d5 EK	22	static const uint32_t formats[] = {
ba3849d5 EK	23	DRM_FORMAT_XRGB8888,
6b1c762d SWK	24	DRM_FORMAT_ARGB8888,
6b1c762d SWK	25	DRM_FORMAT_NV12,
ba3849d5 EK	26	};
ba3849d5 EK	27
2ab97921 JS	28	/*
	29	* This function is to get X or Y size shown via screen. This needs length and
	30	* start position of CRTC.
	31	*
	32	* <--- length --->
	33	* CRTC ----------------
	34	* ^ start ^ end
	35	*
60a705a9	36	* There are six cases from a to f.
2ab97921 JS	37	*
	38	* <----- SCREEN ----->
	39	* 0 last
	40	* ----------\|------------------\|----------
	41	* CRTCs
	42	* a -------
	43	* b -------
	44	* c --------------------------
	45	* d --------
	46	* e -------
	47	* f -------
	48	*/
	49	static int exynos_plane_get_size(int start, unsigned length, unsigned last)
	50	{
	51	int end = start + length;
	52	int size = 0;
	53
	54	if (start <= 0) {
	55	if (end > 0)
	56	size = min_t(unsigned, end, last);
	57	} else if (start <= last) {
	58	size = min_t(unsigned, last - start, length);
	59	}
	60
	61	return size;
	62	}
	63
adf5691c	64	int exynos_check_plane(struct drm_plane plane, struct drm_framebuffer fb)
4070d212	65	{
8837deea	66	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
4070d212 JS	67	int nr;
	68	int i;
	69
01ed8126	70	nr = exynos_drm_fb_get_buf_cnt(fb);
4070d212 JS	71	for (i = 0; i < nr; i++) {
	72	struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
	73
	74	if (!buffer) {
133dcdeb	75	DRM_DEBUG_KMS("buffer is null\n");
4070d212 JS	76	return -EFAULT;
	77	}
	78
8837deea	79	exynos_plane->dma_addr[i] = buffer->dma_addr;
4070d212	80
ddd8e959	81	DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
8837deea	82	i, (unsigned long)exynos_plane->dma_addr[i]);
4070d212 JS	83	}
4070d212 JS	84
adf5691c GP	85	return 0;
	86	}
	87
	88	void exynos_plane_mode_set(struct drm_plane plane, struct drm_crtc crtc,
	89	struct drm_framebuffer *fb, int crtc_x, int crtc_y,
	90	unsigned int crtc_w, unsigned int crtc_h,
	91	uint32_t src_x, uint32_t src_y,
	92	uint32_t src_w, uint32_t src_h)
	93	{
	94	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
adf5691c GP	95	unsigned int actual_w;
	96	unsigned int actual_h;
	97
2ab97921 JS	98	actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
	99	actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
	100
	101	if (crtc_x < 0) {
	102	if (actual_w)
	103	src_x -= crtc_x;
2ab97921 JS	104	crtc_x = 0;
	105	}
	106
	107	if (crtc_y < 0) {
	108	if (actual_h)
	109	src_y -= crtc_y;
2ab97921 JS	110	crtc_y = 0;
2ab97921 JS	111	}
4070d212 JS	112
4070d212 JS	113	/* set drm framebuffer data. */
8837deea GP	114	exynos_plane->fb_x = src_x;
	115	exynos_plane->fb_y = src_y;
	116	exynos_plane->fb_width = fb->width;
	117	exynos_plane->fb_height = fb->height;
	118	exynos_plane->src_width = src_w;
	119	exynos_plane->src_height = src_h;
	120	exynos_plane->bpp = fb->bits_per_pixel;
	121	exynos_plane->pitch = fb->pitches[0];
	122	exynos_plane->pixel_format = fb->pixel_format;
	123
	124	/* set plane range to be displayed. */
	125	exynos_plane->crtc_x = crtc_x;
	126	exynos_plane->crtc_y = crtc_y;
	127	exynos_plane->crtc_width = actual_w;
	128	exynos_plane->crtc_height = actual_h;
4070d212 JS	129
4070d212 JS	130	/* set drm mode data. */
8837deea GP	131	exynos_plane->mode_width = crtc->mode.hdisplay;
	132	exynos_plane->mode_height = crtc->mode.vdisplay;
	133	exynos_plane->refresh = crtc->mode.vrefresh;
	134	exynos_plane->scan_flag = crtc->mode.flags;
4070d212	135
8837deea GP	136	DRM_DEBUG_KMS("plane : offset_x/y(%d,%d), width/height(%d,%d)",
	137	exynos_plane->crtc_x, exynos_plane->crtc_y,
	138	exynos_plane->crtc_width, exynos_plane->crtc_height);
4070d212	139
72ed6ccd	140	plane->crtc = crtc;
4070d212 JS	141	}
4070d212 JS	142
0e0a649f	143	int
864ee9e6 JS	144	exynos_update_plane(struct drm_plane plane, struct drm_crtc crtc,
	145	struct drm_framebuffer *fb, int crtc_x, int crtc_y,
	146	unsigned int crtc_w, unsigned int crtc_h,
	147	uint32_t src_x, uint32_t src_y,
	148	uint32_t src_w, uint32_t src_h)
	149	{
9d5310c0	150
93bca243	151	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
9d5310c0	152	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
864ee9e6 JS	153	int ret;
864ee9e6 JS	154
adf5691c	155	ret = exynos_check_plane(plane, fb);
864ee9e6 JS	156	if (ret < 0)
	157	return ret;
	158
adf5691c GP	159	exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
	160	crtc_w, crtc_h, src_x >> 16, src_y >> 16,
	161	src_w >> 16, src_h >> 16);
	162
93bca243 GP	163	if (exynos_crtc->ops->win_commit)
93bca243 GP	164	exynos_crtc->ops->win_commit(exynos_crtc, exynos_plane->zpos);
864ee9e6 JS	165
	166	return 0;
	167	}
	168
	169	static int exynos_disable_plane(struct drm_plane *plane)
	170	{
d9ea6256 JS	171	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
	172	struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc);
	173
995fdfb9	174	if (exynos_crtc && exynos_crtc->ops->win_disable)
d9ea6256 JS	175	exynos_crtc->ops->win_disable(exynos_crtc,
d9ea6256 JS	176	exynos_plane->zpos);
864ee9e6 JS	177
	178	return 0;
	179	}
	180
	181	static void exynos_plane_destroy(struct drm_plane *plane)
	182	{
864ee9e6 JS	183	exynos_disable_plane(plane);
864ee9e6 JS	184	drm_plane_cleanup(plane);
864ee9e6 JS	185	}
864ee9e6 JS	186
00ae67cf JS	187	static int exynos_plane_set_property(struct drm_plane *plane,
	188	struct drm_property *property,
	189	uint64_t val)
	190	{
	191	struct drm_device *dev = plane->dev;
8837deea	192	struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
00ae67cf JS	193	struct exynos_drm_private *dev_priv = dev->dev_private;
00ae67cf JS	194
00ae67cf	195	if (property == dev_priv->plane_zpos_property) {
8837deea	196	exynos_plane->zpos = val;
00ae67cf JS	197	return 0;
	198	}
	199
	200	return -EINVAL;
	201	}
	202
864ee9e6 JS	203	static struct drm_plane_funcs exynos_plane_funcs = {
	204	.update_plane = exynos_update_plane,
	205	.disable_plane = exynos_disable_plane,
	206	.destroy = exynos_plane_destroy,
00ae67cf	207	.set_property = exynos_plane_set_property,
864ee9e6 JS	208	};
864ee9e6 JS	209
6e2a3b66 GP	210	static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
6e2a3b66 GP	211	unsigned int zpos)
00ae67cf JS	212	{
	213	struct drm_device *dev = plane->dev;
	214	struct exynos_drm_private *dev_priv = dev->dev_private;
	215	struct drm_property *prop;
	216
00ae67cf JS	217	prop = dev_priv->plane_zpos_property;
	218	if (!prop) {
	219	prop = drm_property_create_range(dev, 0, "zpos", 0,
	220	MAX_PLANE - 1);
	221	if (!prop)
	222	return;
	223
	224	dev_priv->plane_zpos_property = prop;
	225	}
	226
6e2a3b66	227	drm_object_attach_property(&plane->base, prop, zpos);
00ae67cf JS	228	}
00ae67cf JS	229
7ee14cdc GP	230	int exynos_plane_init(struct drm_device *dev,
7ee14cdc GP	231	struct exynos_drm_plane *exynos_plane,
6e2a3b66 GP	232	unsigned long possible_crtcs, enum drm_plane_type type,
6e2a3b66 GP	233	unsigned int zpos)
864ee9e6	234	{
b5d2eb3b	235	int err;
864ee9e6	236
72ed6ccd AH	237	err = drm_universal_plane_init(dev, &exynos_plane->base, possible_crtcs,
	238	&exynos_plane_funcs, formats,
	239	ARRAY_SIZE(formats), type);
b5d2eb3b JS	240	if (err) {
b5d2eb3b JS	241	DRM_ERROR("failed to initialize plane\n");
7ee14cdc	242	return err;
b5d2eb3b JS	243	}
b5d2eb3b JS	244
6e2a3b66 GP	245	exynos_plane->zpos = zpos;
	246
	247	if (type == DRM_PLANE_TYPE_OVERLAY)
	248	exynos_plane_attach_zpos_property(&exynos_plane->base, zpos);
864ee9e6	249
7ee14cdc	250	return 0;
864ee9e6	251	}